<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux.git/drivers/watchdog/Makefile, branch master</title>
<subtitle>Linux kernel source tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/'/>
<entry>
<title>watchdog: Remove AMD Elan SC520 processor watchdog driver</title>
<updated>2026-05-10T15:31:34+00:00</updated>
<author>
<name>Guenter Roeck</name>
<email>linux@roeck-us.net</email>
</author>
<published>2026-05-05T16:23:43+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=550c3bcdda0e9e3b3258b2fa9da040a96db058fb'/>
<id>550c3bcdda0e9e3b3258b2fa9da040a96db058fb</id>
<content type='text'>
AMD Elan support was removed from the upstream kernel with commit
8b793a92d862 ("x86/cpu: Remove M486/M486SX/ELAN support"). Its
watchdog driver can no longer be enabled except for test builds.
Remove it.

Signed-off-by: Guenter Roeck &lt;linux@roeck-us.net&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
AMD Elan support was removed from the upstream kernel with commit
8b793a92d862 ("x86/cpu: Remove M486/M486SX/ELAN support"). Its
watchdog driver can no longer be enabled except for test builds.
Remove it.

Signed-off-by: Guenter Roeck &lt;linux@roeck-us.net&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>watchdog: atcwdt200: Add driver for Andes ATCWDT200</title>
<updated>2026-05-10T15:31:34+00:00</updated>
<author>
<name>CL Wang</name>
<email>cl634@andestech.com</email>
</author>
<published>2026-01-15T08:14:43+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=e4e0848ad046da9304e0656a71f74ddfbb316e98'/>
<id>e4e0848ad046da9304e0656a71f74ddfbb316e98</id>
<content type='text'>
Add support for the Andes ATCWDT200 watchdog timer. The driver implements
programmable reset and interrupt timers, and includes automatic detection
of the supported IntTime bit-width.

Integrated with the Linux watchdog framework, it supports basic operations
including start, stop, ping, timeout configuration, and system reset via
the restart handler.

Signed-off-by: CL Wang &lt;cl634@andestech.com&gt;
Link: https://lore.kernel.org/r/20260115081444.2452357-3-cl634@andestech.com
Signed-off-by: Guenter Roeck &lt;linux@roeck-us.net&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add support for the Andes ATCWDT200 watchdog timer. The driver implements
programmable reset and interrupt timers, and includes automatic detection
of the supported IntTime bit-width.

Integrated with the Linux watchdog framework, it supports basic operations
including start, stop, ping, timeout configuration, and system reset via
the restart handler.

Signed-off-by: CL Wang &lt;cl634@andestech.com&gt;
Link: https://lore.kernel.org/r/20260115081444.2452357-3-cl634@andestech.com
Signed-off-by: Guenter Roeck &lt;linux@roeck-us.net&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>watchdog: Add driver for Gunyah Watchdog</title>
<updated>2026-05-03T15:47:56+00:00</updated>
<author>
<name>Hrishabh Rajput</name>
<email>hrishabh.rajput@oss.qualcomm.com</email>
</author>
<published>2026-03-11T05:46:31+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=ca316e145c35d59bf1c0b48ff4e38091e19b80a8'/>
<id>ca316e145c35d59bf1c0b48ff4e38091e19b80a8</id>
<content type='text'>
On Qualcomm SoCs running under the Gunyah hypervisor, access to watchdog
through MMIO is not available on all platforms. Depending on the
hypervisor configuration, the watchdog is either fully emulated or
exposed via ARM's SMC Calling Conventions (SMCCC) through the Vendor
Specific Hypervisor Service Calls space.

Add driver to support the SMC-based watchdog provided by the Gunyah
Hypervisor. Device registration is done in the QCOM SCM driver after
checks to restrict the watchdog initialization to Qualcomm devices
running under Gunyah.

Gunyah watchdog is not a hardware but an SMC-based vendor-specific
hypervisor interface provided by the Gunyah hypervisor. The design
involving QCOM SCM driver for registering the platform device has been
devised to avoid adding non-hardware nodes to devicetree.

Tested-by: Shivendra Pratap &lt;shivendra.pratap@oss.qualcomm.com&gt;
Tested-by: Neil Armstrong &lt;neil.armstrong@linaro.org&gt;
Tested-by: Mukesh Ojha &lt;mukesh.ojha@oss.qualcomm.com&gt;
Reviewed-by: Guenter Roeck &lt;linux@roeck-us.net&gt;
Reviewed-by: Dmitry Baryshkov &lt;dmitry.baryshkov@oss.qualcomm.com&gt;
Signed-off-by: Hrishabh Rajput &lt;hrishabh.rajput@oss.qualcomm.com&gt;
Signed-off-by: Pavankumar Kondeti &lt;pavan.kondeti@oss.qualcomm.com&gt;
Link: https://lore.kernel.org/r/20260311-gunyah_watchdog-v8-2-4c1c0689de22@oss.qualcomm.com
Signed-off-by: Guenter Roeck &lt;linux@roeck-us.net&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
On Qualcomm SoCs running under the Gunyah hypervisor, access to watchdog
through MMIO is not available on all platforms. Depending on the
hypervisor configuration, the watchdog is either fully emulated or
exposed via ARM's SMC Calling Conventions (SMCCC) through the Vendor
Specific Hypervisor Service Calls space.

Add driver to support the SMC-based watchdog provided by the Gunyah
Hypervisor. Device registration is done in the QCOM SCM driver after
checks to restrict the watchdog initialization to Qualcomm devices
running under Gunyah.

Gunyah watchdog is not a hardware but an SMC-based vendor-specific
hypervisor interface provided by the Gunyah hypervisor. The design
involving QCOM SCM driver for registering the platform device has been
devised to avoid adding non-hardware nodes to devicetree.

Tested-by: Shivendra Pratap &lt;shivendra.pratap@oss.qualcomm.com&gt;
Tested-by: Neil Armstrong &lt;neil.armstrong@linaro.org&gt;
Tested-by: Mukesh Ojha &lt;mukesh.ojha@oss.qualcomm.com&gt;
Reviewed-by: Guenter Roeck &lt;linux@roeck-us.net&gt;
Reviewed-by: Dmitry Baryshkov &lt;dmitry.baryshkov@oss.qualcomm.com&gt;
Signed-off-by: Hrishabh Rajput &lt;hrishabh.rajput@oss.qualcomm.com&gt;
Signed-off-by: Pavankumar Kondeti &lt;pavan.kondeti@oss.qualcomm.com&gt;
Link: https://lore.kernel.org/r/20260311-gunyah_watchdog-v8-2-4c1c0689de22@oss.qualcomm.com
Signed-off-by: Guenter Roeck &lt;linux@roeck-us.net&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>watchdog: remove driver for integrated WDT of ZFx86 486-based SoC</title>
<updated>2026-05-03T15:33:06+00:00</updated>
<author>
<name>Ethan Nelson-Moore</name>
<email>enelsonmoore@gmail.com</email>
</author>
<published>2026-04-28T01:48:02+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=151d4c1b2fbf7d9604a5f4de1bcb80a53a9ead1c'/>
<id>151d4c1b2fbf7d9604a5f4de1bcb80a53a9ead1c</id>
<content type='text'>
The machzwd driver supports the integrated watchdog of the ZF Micro
ZFx86 SoC, which contains a 486-compatible core [1]. Since 486
support was removed in commit 8b793a92d862 ("x86/cpu: Remove
M486/M486SX/ELAN support"), the driver is no longer useful, Remove it.

[1] https://www.zfmicro.com/zfx86.html

Signed-off-by: Ethan Nelson-Moore &lt;enelsonmoore@gmail.com&gt;
Reviewed-by: Guenter Roeck &lt;linux@roeck-us.net&gt;
Link: https://lore.kernel.org/r/20260428014806.35400-1-enelsonmoore@gmail.com
Signed-off-by: Guenter Roeck &lt;linux@roeck-us.net&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The machzwd driver supports the integrated watchdog of the ZF Micro
ZFx86 SoC, which contains a 486-compatible core [1]. Since 486
support was removed in commit 8b793a92d862 ("x86/cpu: Remove
M486/M486SX/ELAN support"), the driver is no longer useful, Remove it.

[1] https://www.zfmicro.com/zfx86.html

Signed-off-by: Ethan Nelson-Moore &lt;enelsonmoore@gmail.com&gt;
Reviewed-by: Guenter Roeck &lt;linux@roeck-us.net&gt;
Link: https://lore.kernel.org/r/20260428014806.35400-1-enelsonmoore@gmail.com
Signed-off-by: Guenter Roeck &lt;linux@roeck-us.net&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>watchdog: iTCO: Drop vendor support</title>
<updated>2026-01-18T09:55:08+00:00</updated>
<author>
<name>Guenter Roeck</name>
<email>linux@roeck-us.net</email>
</author>
<published>2025-11-18T19:29:58+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=0bf75b9c8a0eb1ef46ce85a393dd27ae801fc207'/>
<id>0bf75b9c8a0eb1ef46ce85a393dd27ae801fc207</id>
<content type='text'>
iTCO vendor support was introduced in 2006 to support SuperMicro boards
with Pentium 3 CPUs. It was extended in 2009 to support motherbords
with broken BIOS (specifically Intel DG33TL). The code is long since
obsolete, so let's drop support for it.

Signed-off-by: Guenter Roeck &lt;linux@roeck-us.net&gt;
Reviewed-by: Wim Van Sebroeck &lt;wim@linux-watchdog.org&gt;
Signed-off-by: Wim Van Sebroeck &lt;wim@linux-watchdog.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
iTCO vendor support was introduced in 2006 to support SuperMicro boards
with Pentium 3 CPUs. It was extended in 2009 to support motherbords
with broken BIOS (specifically Intel DG33TL). The code is long since
obsolete, so let's drop support for it.

Signed-off-by: Guenter Roeck &lt;linux@roeck-us.net&gt;
Reviewed-by: Wim Van Sebroeck &lt;wim@linux-watchdog.org&gt;
Signed-off-by: Wim Van Sebroeck &lt;wim@linux-watchdog.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>watchdog: renesas_wwdt: add driver</title>
<updated>2025-11-15T14:19:55+00:00</updated>
<author>
<name>Wolfram Sang</name>
<email>wsa+renesas@sang-engineering.com</email>
</author>
<published>2025-10-17T10:15:49+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=babe81b06158da7e845d19fae0a9205baf2b211d'/>
<id>babe81b06158da7e845d19fae0a9205baf2b211d</id>
<content type='text'>
This driver adds support for the Renesas Window Watchdog Timer (WWDT).
Because it can only be setup once after boot and we cannot know if this
already happened in early boot stages, it is mandated that the firmware
configures the watchdog. Linux then adapts according to the given
setup. Note that this watchdog only reports an overflow to the Error
Control Module (ECM) and does not reset the SoC on its own.

Signed-off-by: Wolfram Sang &lt;wsa+renesas@sang-engineering.com&gt;
Reviewed-by: Guenter Roeck &lt;linux@roeck-us.net&gt;
Signed-off-by: Guenter Roeck &lt;linux@roeck-us.net&gt;
Signed-off-by: Wim Van Sebroeck &lt;wim@linux-watchdog.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This driver adds support for the Renesas Window Watchdog Timer (WWDT).
Because it can only be setup once after boot and we cannot know if this
already happened in early boot stages, it is mandated that the firmware
configures the watchdog. Linux then adapts according to the given
setup. Note that this watchdog only reports an overflow to the Error
Control Module (ECM) and does not reset the SoC on its own.

Signed-off-by: Wolfram Sang &lt;wsa+renesas@sang-engineering.com&gt;
Reviewed-by: Guenter Roeck &lt;linux@roeck-us.net&gt;
Signed-off-by: Guenter Roeck &lt;linux@roeck-us.net&gt;
Signed-off-by: Wim Van Sebroeck &lt;wim@linux-watchdog.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>watchdog: Add Nuvoton NCT6694 WDT support</title>
<updated>2025-09-16T13:41:57+00:00</updated>
<author>
<name>Ming Yu</name>
<email>a0282524688@gmail.com</email>
</author>
<published>2025-09-12T09:19:50+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=f9d737a7d84ff4c1df4244361e66ddda400678dc'/>
<id>f9d737a7d84ff4c1df4244361e66ddda400678dc</id>
<content type='text'>
This driver supports Watchdog timer functionality for NCT6694 MFD
device based on USB interface.

Acked-by: Guenter Roeck &lt;linux@roeck-us.net&gt;
Signed-off-by: Ming Yu &lt;a0282524688@gmail.com&gt;
Link: https://lore.kernel.org/r/20250912091952.1169369-6-a0282524688@gmail.com
Signed-off-by: Lee Jones &lt;lee@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This driver supports Watchdog timer functionality for NCT6694 MFD
device based on USB interface.

Acked-by: Guenter Roeck &lt;linux@roeck-us.net&gt;
Signed-off-by: Ming Yu &lt;a0282524688@gmail.com&gt;
Link: https://lore.kernel.org/r/20250912091952.1169369-6-a0282524688@gmail.com
Signed-off-by: Lee Jones &lt;lee@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>watchdog: Add driver for Intel OC WDT</title>
<updated>2025-06-01T11:16:33+00:00</updated>
<author>
<name>Diogo Ivo</name>
<email>diogo.ivo@siemens.com</email>
</author>
<published>2025-03-17T10:55:06+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=535d1784d8a96dce79023ac5081de1aa8669388a'/>
<id>535d1784d8a96dce79023ac5081de1aa8669388a</id>
<content type='text'>
Add a driver for the Intel Over-Clocking Watchdog found in Intel
Platform Controller (PCH) chipsets. This watchdog is controlled
via a simple single-register interface and would otherwise be
standard except for the presence of a LOCK bit that can only be
set once per power cycle, needing extra handling around it.

Signed-off-by: Diogo Ivo &lt;diogo.ivo@siemens.com&gt;
Reviewed-by: Guenter Roeck &lt;linux@roeck-us.net&gt;
Link: https://lore.kernel.org/r/20250317-ivo-intel_oc_wdt-v3-1-32c396f4eefd@siemens.com
Signed-off-by: Guenter Roeck &lt;linux@roeck-us.net&gt;
Signed-off-by: Wim Van Sebroeck &lt;wim@linux-watchdog.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add a driver for the Intel Over-Clocking Watchdog found in Intel
Platform Controller (PCH) chipsets. This watchdog is controlled
via a simple single-register interface and would otherwise be
standard except for the presence of a LOCK bit that can only be
set once per power cycle, needing extra handling around it.

Signed-off-by: Diogo Ivo &lt;diogo.ivo@siemens.com&gt;
Reviewed-by: Guenter Roeck &lt;linux@roeck-us.net&gt;
Link: https://lore.kernel.org/r/20250317-ivo-intel_oc_wdt-v3-1-32c396f4eefd@siemens.com
Signed-off-by: Guenter Roeck &lt;linux@roeck-us.net&gt;
Signed-off-by: Wim Van Sebroeck &lt;wim@linux-watchdog.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>watchdog: Add the Watchdog Timer for the NXP S32 platform</title>
<updated>2025-05-24T14:57:54+00:00</updated>
<author>
<name>Daniel Lezcano</name>
<email>daniel.lezcano@linaro.org</email>
</author>
<published>2025-04-10T08:26:14+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=bd3f54ec559b554671e5a683e05794abe3a609df'/>
<id>bd3f54ec559b554671e5a683e05794abe3a609df</id>
<content type='text'>
The S32 platform has several Watchdog Timer available and tied with a
CPU. The SWT0 is the only one which directly asserts the reset line,
other SWT require an external setup to configure the reset behavior
which is not part of this change.

As a side note, in the NXP documentation, the s32g2 and s32g3
reference manuals refer the watchdog as the 'Software Timer Watchdog'
where the name can be misleading as it is actually a hardware
watchdog.

The maximum watchdog timeout value depends on the clock feeding the
SWT counter which is 32bits wide. On the s32g274-rb2, the clock has a
rate of 51MHz which result on 83 seconds maximum timeout.

The timeout can be specified via the device tree with the usual
existing bindings 'timeout-sec' or via the module param timeout.

The watchdog can be loaded with the 'nowayout' option, preventing the
watchdog to be stopped.

The watchdog can be started at boot time with the 'early-enable'
option, thus letting the watchdog framework to service the watchdog
counter.

The watchdog support the magic character to stop when the userspace
releases the device.

Cc: Ghennadi Procopciuc &lt;ghennadi.procopciuc@nxp.com&gt;
Cc: Thomas Fossati &lt;thomas.fossati@linaro.org&gt;
Signed-off-by: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
Tested-by: Alexandru-Catalin Ionita &lt;alexandru-catalin.ionita@nxp.com&gt;
Reviewed-by: Guenter Roeck &lt;linux@roeck-us.net&gt;
Link: https://lore.kernel.org/r/20250410082616.1855860-3-daniel.lezcano@linaro.org
Signed-off-by: Guenter Roeck &lt;linux@roeck-us.net&gt;
Signed-off-by: Wim Van Sebroeck &lt;wim@linux-watchdog.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The S32 platform has several Watchdog Timer available and tied with a
CPU. The SWT0 is the only one which directly asserts the reset line,
other SWT require an external setup to configure the reset behavior
which is not part of this change.

As a side note, in the NXP documentation, the s32g2 and s32g3
reference manuals refer the watchdog as the 'Software Timer Watchdog'
where the name can be misleading as it is actually a hardware
watchdog.

The maximum watchdog timeout value depends on the clock feeding the
SWT counter which is 32bits wide. On the s32g274-rb2, the clock has a
rate of 51MHz which result on 83 seconds maximum timeout.

The timeout can be specified via the device tree with the usual
existing bindings 'timeout-sec' or via the module param timeout.

The watchdog can be loaded with the 'nowayout' option, preventing the
watchdog to be stopped.

The watchdog can be started at boot time with the 'early-enable'
option, thus letting the watchdog framework to service the watchdog
counter.

The watchdog support the magic character to stop when the userspace
releases the device.

Cc: Ghennadi Procopciuc &lt;ghennadi.procopciuc@nxp.com&gt;
Cc: Thomas Fossati &lt;thomas.fossati@linaro.org&gt;
Signed-off-by: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
Tested-by: Alexandru-Catalin Ionita &lt;alexandru-catalin.ionita@nxp.com&gt;
Reviewed-by: Guenter Roeck &lt;linux@roeck-us.net&gt;
Link: https://lore.kernel.org/r/20250410082616.1855860-3-daniel.lezcano@linaro.org
Signed-off-by: Guenter Roeck &lt;linux@roeck-us.net&gt;
Signed-off-by: Wim Van Sebroeck &lt;wim@linux-watchdog.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>watchdog: lenovo_se30_wdt: Watchdog driver for Lenovo SE30 platform</title>
<updated>2025-03-09T14:19:43+00:00</updated>
<author>
<name>Mark Pearson</name>
<email>mpearson-lenovo@squebb.ca</email>
</author>
<published>2025-01-31T20:48:55+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=c284153a2c5537db4fec51ac850c17d2eb1ffcfe'/>
<id>c284153a2c5537db4fec51ac850c17d2eb1ffcfe</id>
<content type='text'>
Watchdog driver implementation for Lenovo SE30 platform.

Signed-off-by: Mark Pearson &lt;mpearson-lenovo@squebb.ca&gt;
Reviewed-by: Guenter Roeck &lt;linux@roeck-us.net&gt;
Link: https://lore.kernel.org/r/20250131204855.1827-1-mpearson-lenovo@squebb.ca
Signed-off-by: Guenter Roeck &lt;linux@roeck-us.net&gt;
Signed-off-by: Wim Van Sebroeck &lt;wim@linux-watchdog.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Watchdog driver implementation for Lenovo SE30 platform.

Signed-off-by: Mark Pearson &lt;mpearson-lenovo@squebb.ca&gt;
Reviewed-by: Guenter Roeck &lt;linux@roeck-us.net&gt;
Link: https://lore.kernel.org/r/20250131204855.1827-1-mpearson-lenovo@squebb.ca
Signed-off-by: Guenter Roeck &lt;linux@roeck-us.net&gt;
Signed-off-by: Wim Van Sebroeck &lt;wim@linux-watchdog.org&gt;
</pre>
</div>
</content>
</entry>
</feed>
