linux.git/drivers/usb/dwc3/platform_data.h, branch v4.1 Linux kernel source tree usb: dwc3: make LPM configurable in DT 2015-03-10T20:33:33+00:00 Robert Baldyga r.baldyga@samsung.com 2015-03-09T14:06:12+00:00 eac68e8f979b82d257eea0a4bbcda7b169d330bf This patch removes "Enable USB3 LPM Capability" option from Kconfig and adds snps,usb3_lpm_capable devicetree property instead of it. USB3 LPM (Link Power Management) capability is hardware property, and it's platform dependent, so if our hardware supports this feature, we want rather to configure it in devicetree than having it as Kconfig option. Signed-off-by: Robert Baldyga <r.baldyga@samsung.com> Signed-off-by: Felipe Balbi <balbi@ti.com> 
This patch removes "Enable USB3 LPM Capability" option from Kconfig
and adds snps,usb3_lpm_capable devicetree property instead of it.

USB3 LPM (Link Power Management) capability is hardware property, and
it's platform dependent, so if our hardware supports this feature, we
want rather to configure it in devicetree than having it as Kconfig option.

Signed-off-by: Robert Baldyga <r.baldyga@samsung.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
usb: dwc3: make HIRD threshold configurable 2014-11-03T16:03:41+00:00 Huang Rui ray.huang@amd.com 2014-10-31T03:11:18+00:00 460d098cb6728134e0e4ba3d58e10bb43032daa5 HIRD threshold should be configurable by different platforms. From DesignWare databook: When HIRD_Threshold[4] is set to 1b1 and HIRD value is greater than or equal to the value in HIRD_Threshold[3:0], dwc3 asserts output signals utmi_l1_suspend_n to put PHY into Deep Low-Power mode in L1. When HIRD_Threshold[4] is set to 1b0 or the HIRD value is less than HIRD_Threshold[3:0], dwc3 asserts output signals utmi_sleep_n on L1. Signed-off-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Felipe Balbi <balbi@ti.com> 
HIRD threshold should be configurable by different platforms.

From DesignWare databook:
When HIRD_Threshold[4] is set to 1b1 and HIRD value is greater than or
equal to the value in HIRD_Threshold[3:0], dwc3 asserts output signals
utmi_l1_suspend_n to put PHY into Deep Low-Power mode in L1.

When HIRD_Threshold[4] is set to 1b0 or the HIRD value is less than
HIRD_Threshold[3:0], dwc3 asserts output signals utmi_sleep_n on L1.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
usb: dwc3: add disable usb2 suspend phy quirk 2014-11-03T16:03:39+00:00 Huang Rui ray.huang@amd.com 2014-10-31T03:11:14+00:00 0effe0a3e741c0e2318f541ce207c9bd6cfe985c This patch adds disable usb2 suspend phy quirk, and some special platforms can configure that if it is needed. Signed-off-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Felipe Balbi <balbi@ti.com> 
This patch adds disable usb2 suspend phy quirk, and some special platforms
can configure that if it is needed.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
usb: dwc3: add disable usb3 suspend phy quirk 2014-11-03T16:03:39+00:00 Huang Rui ray.huang@amd.com 2014-10-31T03:11:13+00:00 59acfa208164205f94a11f454d08cd88f06b9908 This patch adds disable usb3 suspend phy quirk, and some special platforms can configure that if it is needed. Signed-off-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Felipe Balbi <balbi@ti.com> 
This patch adds disable usb3 suspend phy quirk, and some special platforms
can configure that if it is needed.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
usb: dwc3: add Tx de-emphasis quirk 2014-11-03T16:03:39+00:00 Huang Rui ray.huang@amd.com 2014-10-31T03:11:12+00:00 6b6a0c9a3ffa3107994d92d5758cbe274c5a97b6 This patch adds Tx de-emphasis quirk, and the Tx de-emphasis value is configurable according to PIPE3 specification. Value Description 0 -6dB de-emphasis 1 -3.5dB de-emphasis 2 No de-emphasis 3 Reserved It can be configured on DT or platform data. Signed-off-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Felipe Balbi <balbi@ti.com> 
This patch adds Tx de-emphasis quirk, and the Tx de-emphasis value is
configurable according to PIPE3 specification.

Value		Description
0		-6dB de-emphasis
1		-3.5dB de-emphasis
2		No de-emphasis
3		Reserved

It can be configured on DT or platform data.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
usb: dwc3: add rx_detect to polling lfps quirk 2014-11-03T16:03:38+00:00 Huang Rui ray.huang@amd.com 2014-10-28T11:54:33+00:00 14f4ac53dfb2321b07a0e690df797fba61102fa6 This patch adds RX_DETECT to Polling.LFPS control quirk, and some special platforms can configure that if it is needed. [ balbi@ti.com : added DeviceTree binding documentation ] Signed-off-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Felipe Balbi <balbi@ti.com> 
This patch adds RX_DETECT to Polling.LFPS control quirk, and some special
platforms can configure that if it is needed.

[ balbi@ti.com : added DeviceTree binding documentation ]

Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
usb: dwc3: add lfps filter quirk 2014-11-03T16:03:38+00:00 Huang Rui ray.huang@amd.com 2014-10-28T11:54:32+00:00 fb67afca177a215684d6124137f61e639c5483d4 This patch adds LFPS filter quirk, and some special platforms can configure that if it is needed. [ balbi@ti.com : added DeviceTree binding documentation ] Signed-off-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Felipe Balbi <balbi@ti.com> 
This patch adds LFPS filter quirk, and some special platforms can configure
that if it is needed.

[ balbi@ti.com : added DeviceTree binding documentation ]

Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
usb: dwc3: add delay phy power change quirk 2014-11-03T16:03:37+00:00 Huang Rui ray.huang@amd.com 2014-10-28T11:54:31+00:00 41c06ffdf9cc63edd875cc8ff8ae002cd9b14f96 This patch adds delay PHY power change from P0 to P1/P2/P3 when link state changing from U0 to U1/U2/U3 respectively, and some special platforms can configure that if it is needed. [ balbi@ti.com : added DeviceTree binding documentation ] Signed-off-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Felipe Balbi <balbi@ti.com> 
This patch adds delay PHY power change from P0 to P1/P2/P3 when link state
changing from U0 to U1/U2/U3 respectively, and some special platforms can
configure that if it is needed.

[ balbi@ti.com : added DeviceTree binding documentation ]

Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
usb: dwc3: add delay p1p2p3 quirk 2014-11-03T16:03:37+00:00 Huang Rui ray.huang@amd.com 2014-10-28T11:54:30+00:00 a2a1d0f5838d6aa0d1306ef9bb1011f501faa695 This patch adds delay P0 to P1/P2/P3 quirk for U2/U2/U3, and some special platforms can configure that if it is needed. [ balbi@ti.com : added DeviceTree binding documentation ] Signed-off-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Felipe Balbi <balbi@ti.com> 
This patch adds delay P0 to P1/P2/P3 quirk for U2/U2/U3, and some special
platforms can configure that if it is needed.

[ balbi@ti.com : added DeviceTree binding documentation ]

Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
usb: dwc3: add request p1p2p3 quirk 2014-11-03T16:03:37+00:00 Huang Rui ray.huang@amd.com 2014-10-28T11:54:29+00:00 df31f5b3a6d3ef0bb692edff13167e9a1c5aa25e This patch adds request P1/P2/P3 quirk for U2/U2/U3, and some special platforms can configure that if it is needed. [ balbi@ti.com : added DeviceTree binding documentation ] Signed-off-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Felipe Balbi <balbi@ti.com> 
This patch adds request P1/P2/P3 quirk for U2/U2/U3, and some special
platforms can configure that if it is needed.

[ balbi@ti.com : added DeviceTree binding documentation ]

Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>