linux.git/drivers/usb/dwc2/params.c, branch v5.9

Revert "usb: dwc2: don't use ID/Vbus detection if usb-role-switch on STM32MP15 SoCs"

2020-07-27T13:33:12+00:00

This reverts commit 916f8b627288039d9e771a9b2ab1b3c79b303039.

This was not meant to be applied as-is at the moment.

Cc: Minas Harutyunyan 
Cc: Amelie Delaunay 
Cc: Felipe Balbi 
Signed-off-by: Greg Kroah-Hartman

usb: dwc2: don't use ID/Vbus detection if usb-role-switch on STM32MP15 SoCs

2020-07-23T11:45:36+00:00

If usb-role-switch is present in the device tree, it means that ID and Vbus
signals are not connected to the OTG controller but to an external
component (GPIOs, Type-C controller). In this configuration, usb role
switch is used to force valid sessions on STM32MP15 SoCs.

Acked-by: Minas Harutyunyan 
Signed-off-by: Amelie Delaunay 
Signed-off-by: Felipe Balbi

usb: dwc2: use well defined macros for power_down

2020-06-18T08:13:16+00:00

Use the well defined macros such as DWC2_POWER_DOWN_PARAM_NONE,
DWC2_POWER_DOWN_PARAM_PARTIAL and DWC2_POWER_DOWN_PARAM_HIBERNATION
to make code more readable.

Signed-off-by: Jisheng Zhang 
Acked-by: Minas Harutyunyan 
Link: https://lore.kernel.org/r/20200616162617.38365cc8@xhacker.debian
Signed-off-by: Greg Kroah-Hartman

usb: dwc2: Update Core Reset programming flow.

2020-05-25T08:09:44+00:00

Starting from core version 4.20a Core Reset flow is changed.
Introduced new bit in GRSTCTL register - GRSTCTL_CSFTRST_DONE.
Core Reset new programming flow steps are follow:
1. Set GRSTCTL_CSFTRST bit.
2. Wait for bit GRSTCTL_CSFTRST_DONE is set.
3. Clear GRSTCTL_CSFTRST and GRSTCTL_CSFTRST_DONE bits.

Check core version functionality separated from dwc2_get_hwparams() to
new dwc2_check_core_version() function because Core Reset flow depend
on SNPSID.

Signed-off-by: Minas Harutyunyan 
Signed-off-by: Felipe Balbi

usb: dwc2: add support for STM32MP15 SoCs USB OTG HS and FS

2020-03-15T09:06:39+00:00

This patch introduces a new parameter to activate external ID pin and valid
vbus level detection, required on STM32MP15 SoC to support dual role,
either in HS or FS.
The STM32MP15 SoC uses the GGPIO register to enable the level detection.
The level detector requires to be powered.
Also adds the params structures for STM32MP15 OTG HS and STM32MP1 OTG FS.

Acked-by: Minas Harutyunyan 
Signed-off-by: Amelie Delaunay 
Signed-off-by: Felipe Balbi

usb: dwc2: Switch to use device_property_count_u32()

2019-07-25T09:07:41+00:00

Use use device_property_count_u32() directly, that makes code neater.

Signed-off-by: Andy Shevchenko 
Acked-by: Minas Harutyunyan 
Link: https://lore.kernel.org/r/20190723191639.67883-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Greg Kroah-Hartman

Merge tag 'usb-for-v5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb into usb-next

2019-07-01T10:01:33+00:00

Felipe writes:

usb: changes for v5.3 merge window

The biggest part here is a set of patches removing unnecesary variables
from several drivers.

Meson-g12a's dwc3 glue implemented IRQ-based OTG/DRD role swap.

Qcom's dwc3 glue added support for ACPI, mainly for the AArch64-based
SoCs.

DWC3 also got support for Intel Elkhart Lake platforms.

* tag 'usb-for-v5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb: (30 commits)
  usb: dwc3: remove unused @lock member of dwc3_ep struct
  usb: dwc3: pci: Add Support for Intel Elkhart Lake Devices
  usb: Replace snprintf with scnprintf in gether_get_ifname
  usb: gadget: ether: Fix race between gether_disconnect and rx_submit
  usb: gadget: storage: Remove warning message
  usb: dwc3: gadget: Add support for disabling U1 and U2 entries
  usb: gadget: send usb_gadget as an argument in get_config_params
  doc: dt: bindings: usb: dwc3: Update entries for disabling U1 and U2
  usb: dwc3: qcom: Use of_clk_get_parent_count()
  usb: dwc3: Fix core validation in probe, move after clocks are enabled
  usb: dwc3: qcom: Improve error handling
  usb: dwc3: qcom: Start USB in 'host mode' on the SDM845
  usb: dwc3: qcom: Add support for booting with ACPI
  soc: qcom: geni: Add support for ACPI
  Revert "usb: dwc2: host: Setting qtd to NULL after freeing it"
  usb: gadget: net2272: remove redundant assignments to pointer 's'
  usb: gadget: Zero ffs_io_data
  USB: omap_udc: Remove unneeded variable
  fotg210-udc: Remove unneeded variable
  usb: gadget: at91_udc: Remove unneeded variable
  ...

usb: dwc2: Force 8bit UTMI width for Samsung Exynos SoCs

2019-06-18T08:58:28+00:00

Samsung Exynos SoCs require to force UTMI width to 8bit, otherwise the
host side of the shared USB2 PHY doesn't work.

Reported-by: Krzysztof Kozlowski 
Fixes: 707d80f0a3c5 ("usb: dwc2: gadget: Replace phyif with phy_utmi_width")
Signed-off-by: Marek Szyprowski 
Acked-by: Minas Harutyunyan 
Acked-by: Krzysztof Kozlowski 
Tested-by: Krzysztof Kozlowski 
Signed-off-by: Felipe Balbi

usb: dwc2: Use generic PHY width in params setup

2019-06-18T07:27:14+00:00

Setting params.phy_utmi_width in dwc2_lowlevel_hw_init() is pointless since
it's value will be overwritten by dwc2_init_params().

This change make sure to take in account the generic PHY width information
during paraminitialisation, done in dwc2_set_param_phy_utmi_width().

By doing so, the phy_utmi_width params can still be overrided by
devicetree specific params and will also be checked against hardware
capabilities.

Fixes: 707d80f0a3c5 ("usb: dwc2: gadget: Replace phyif with phy_utmi_width")
Acked-by: Minas Harutyunyan 
Tested-by: Marek Szyprowski 
Signed-off-by: Jules Maselbas 
Signed-off-by: Felipe Balbi

usb: dwc2: Set lpm mode parameters depend on HW configuration

2019-05-03T06:13:49+00:00

If core not supported lpm, i.e. BCM2835 then confusing warnings seen
in log.

To avoid these warnings, added function dwc2_set_param_lpm() to set
lpm and other lpm related parameters based on lpm support by core.

Signed-off-by: Minas Harutyunyan 
Signed-off-by: Felipe Balbi