linux.git/drivers/usb/dwc2/params.c, branch v5.8 Linux kernel source tree usb: dwc2: Update Core Reset programming flow. 2020-05-25T08:09:44+00:00 Minas Harutyunyan Minas.Harutyunyan@synopsys.com 2020-05-21T06:05:44+00:00 65dc2e725286106f99c6f6b78e3d9c52c15f3a9c Starting from core version 4.20a Core Reset flow is changed. Introduced new bit in GRSTCTL register - GRSTCTL_CSFTRST_DONE. Core Reset new programming flow steps are follow: 1. Set GRSTCTL_CSFTRST bit. 2. Wait for bit GRSTCTL_CSFTRST_DONE is set. 3. Clear GRSTCTL_CSFTRST and GRSTCTL_CSFTRST_DONE bits. Check core version functionality separated from dwc2_get_hwparams() to new dwc2_check_core_version() function because Core Reset flow depend on SNPSID. Signed-off-by: Minas Harutyunyan <hminas@synopsys.com> Signed-off-by: Felipe Balbi <balbi@kernel.org> 
Starting from core version 4.20a Core Reset flow is changed.
Introduced new bit in GRSTCTL register - GRSTCTL_CSFTRST_DONE.
Core Reset new programming flow steps are follow:
1. Set GRSTCTL_CSFTRST bit.
2. Wait for bit GRSTCTL_CSFTRST_DONE is set.
3. Clear GRSTCTL_CSFTRST and GRSTCTL_CSFTRST_DONE bits.

Check core version functionality separated from dwc2_get_hwparams() to
new dwc2_check_core_version() function because Core Reset flow depend
on SNPSID.

Signed-off-by: Minas Harutyunyan <hminas@synopsys.com>
Signed-off-by: Felipe Balbi <balbi@kernel.org>
usb: dwc2: add support for STM32MP15 SoCs USB OTG HS and FS 2020-03-15T09:06:39+00:00 Amelie Delaunay amelie.delaunay@st.com 2020-01-24T08:41:31+00:00 a415083a11cc76f85322406fb91e2eb917c6cef9 This patch introduces a new parameter to activate external ID pin and valid vbus level detection, required on STM32MP15 SoC to support dual role, either in HS or FS. The STM32MP15 SoC uses the GGPIO register to enable the level detection. The level detector requires to be powered. Also adds the params structures for STM32MP15 OTG HS and STM32MP1 OTG FS. Acked-by: Minas Harutyunyan <hminas@synopsys.com> Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com> Signed-off-by: Felipe Balbi <balbi@kernel.org> 
This patch introduces a new parameter to activate external ID pin and valid
vbus level detection, required on STM32MP15 SoC to support dual role,
either in HS or FS.
The STM32MP15 SoC uses the GGPIO register to enable the level detection.
The level detector requires to be powered.
Also adds the params structures for STM32MP15 OTG HS and STM32MP1 OTG FS.

Acked-by: Minas Harutyunyan <hminas@synopsys.com>
Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: Felipe Balbi <balbi@kernel.org>
usb: dwc2: Switch to use device_property_count_u32() 2019-07-25T09:07:41+00:00 Andy Shevchenko andriy.shevchenko@linux.intel.com 2019-07-23T19:16:39+00:00 07e803ec9f6be4b216b89f8530ea30d2a397696d Use use device_property_count_u32() directly, that makes code neater. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Minas Harutyunyan <hminas@synopsys.com> Link: https://lore.kernel.org/r/20190723191639.67883-1-andriy.shevchenko@linux.intel.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> 
Use use device_property_count_u32() directly, that makes code neater.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Minas Harutyunyan <hminas@synopsys.com>
Link: https://lore.kernel.org/r/20190723191639.67883-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Merge tag 'usb-for-v5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb into usb-next 2019-07-01T10:01:33+00:00 Greg Kroah-Hartman gregkh@linuxfoundation.org 2019-07-01T10:01:33+00:00 f254e65ad694a9189163f5a60707a06225f5db25 Felipe writes: usb: changes for v5.3 merge window The biggest part here is a set of patches removing unnecesary variables from several drivers. Meson-g12a's dwc3 glue implemented IRQ-based OTG/DRD role swap. Qcom's dwc3 glue added support for ACPI, mainly for the AArch64-based SoCs. DWC3 also got support for Intel Elkhart Lake platforms. * tag 'usb-for-v5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb: (30 commits) usb: dwc3: remove unused @lock member of dwc3_ep struct usb: dwc3: pci: Add Support for Intel Elkhart Lake Devices usb: Replace snprintf with scnprintf in gether_get_ifname usb: gadget: ether: Fix race between gether_disconnect and rx_submit usb: gadget: storage: Remove warning message usb: dwc3: gadget: Add support for disabling U1 and U2 entries usb: gadget: send usb_gadget as an argument in get_config_params doc: dt: bindings: usb: dwc3: Update entries for disabling U1 and U2 usb: dwc3: qcom: Use of_clk_get_parent_count() usb: dwc3: Fix core validation in probe, move after clocks are enabled usb: dwc3: qcom: Improve error handling usb: dwc3: qcom: Start USB in 'host mode' on the SDM845 usb: dwc3: qcom: Add support for booting with ACPI soc: qcom: geni: Add support for ACPI Revert "usb: dwc2: host: Setting qtd to NULL after freeing it" usb: gadget: net2272: remove redundant assignments to pointer 's' usb: gadget: Zero ffs_io_data USB: omap_udc: Remove unneeded variable fotg210-udc: Remove unneeded variable usb: gadget: at91_udc: Remove unneeded variable ... 
Felipe writes:

usb: changes for v5.3 merge window

The biggest part here is a set of patches removing unnecesary variables
from several drivers.

Meson-g12a's dwc3 glue implemented IRQ-based OTG/DRD role swap.

Qcom's dwc3 glue added support for ACPI, mainly for the AArch64-based
SoCs.

DWC3 also got support for Intel Elkhart Lake platforms.

* tag 'usb-for-v5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb: (30 commits)
  usb: dwc3: remove unused @lock member of dwc3_ep struct
  usb: dwc3: pci: Add Support for Intel Elkhart Lake Devices
  usb: Replace snprintf with scnprintf in gether_get_ifname
  usb: gadget: ether: Fix race between gether_disconnect and rx_submit
  usb: gadget: storage: Remove warning message
  usb: dwc3: gadget: Add support for disabling U1 and U2 entries
  usb: gadget: send usb_gadget as an argument in get_config_params
  doc: dt: bindings: usb: dwc3: Update entries for disabling U1 and U2
  usb: dwc3: qcom: Use of_clk_get_parent_count()
  usb: dwc3: Fix core validation in probe, move after clocks are enabled
  usb: dwc3: qcom: Improve error handling
  usb: dwc3: qcom: Start USB in 'host mode' on the SDM845
  usb: dwc3: qcom: Add support for booting with ACPI
  soc: qcom: geni: Add support for ACPI
  Revert "usb: dwc2: host: Setting qtd to NULL after freeing it"
  usb: gadget: net2272: remove redundant assignments to pointer 's'
  usb: gadget: Zero ffs_io_data
  USB: omap_udc: Remove unneeded variable
  fotg210-udc: Remove unneeded variable
  usb: gadget: at91_udc: Remove unneeded variable
  ...
usb: dwc2: Force 8bit UTMI width for Samsung Exynos SoCs 2019-06-18T08:58:28+00:00 Marek Szyprowski m.szyprowski@samsung.com 2019-06-14T06:52:53+00:00 1112cf4c4109473fd8a30a4678d25f9321ef5d67 Samsung Exynos SoCs require to force UTMI width to 8bit, otherwise the host side of the shared USB2 PHY doesn't work. Reported-by: Krzysztof Kozlowski <krzk@kernel.org> Fixes: 707d80f0a3c5 ("usb: dwc2: gadget: Replace phyif with phy_utmi_width") Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Acked-by: Minas Harutyunyan <hminas@synopsys.com> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Tested-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com> 
Samsung Exynos SoCs require to force UTMI width to 8bit, otherwise the
host side of the shared USB2 PHY doesn't work.

Reported-by: Krzysztof Kozlowski <krzk@kernel.org>
Fixes: 707d80f0a3c5 ("usb: dwc2: gadget: Replace phyif with phy_utmi_width")
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Acked-by: Minas Harutyunyan <hminas@synopsys.com>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Tested-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
usb: dwc2: Use generic PHY width in params setup 2019-06-18T07:27:14+00:00 Jules Maselbas jmaselbas@kalray.eu 2019-05-09T09:15:28+00:00 42de8afc40c97002fceb500e2331f6a722be3c14 Setting params.phy_utmi_width in dwc2_lowlevel_hw_init() is pointless since it's value will be overwritten by dwc2_init_params(). This change make sure to take in account the generic PHY width information during paraminitialisation, done in dwc2_set_param_phy_utmi_width(). By doing so, the phy_utmi_width params can still be overrided by devicetree specific params and will also be checked against hardware capabilities. Fixes: 707d80f0a3c5 ("usb: dwc2: gadget: Replace phyif with phy_utmi_width") Acked-by: Minas Harutyunyan <hminas@synopsys.com> Tested-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Jules Maselbas <jmaselbas@kalray.eu> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com> 
Setting params.phy_utmi_width in dwc2_lowlevel_hw_init() is pointless since
it's value will be overwritten by dwc2_init_params().

This change make sure to take in account the generic PHY width information
during paraminitialisation, done in dwc2_set_param_phy_utmi_width().

By doing so, the phy_utmi_width params can still be overrided by
devicetree specific params and will also be checked against hardware
capabilities.

Fixes: 707d80f0a3c5 ("usb: dwc2: gadget: Replace phyif with phy_utmi_width")
Acked-by: Minas Harutyunyan <hminas@synopsys.com>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Jules Maselbas <jmaselbas@kalray.eu>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
usb: dwc2: Set lpm mode parameters depend on HW configuration 2019-05-03T06:13:49+00:00 Minas Harutyunyan minas.harutyunyan@synopsys.com 2019-03-04T13:08:07+00:00 28b5c129ca6e585ec95c160ec4297bc6c6360b6f If core not supported lpm, i.e. BCM2835 then confusing warnings seen in log. To avoid these warnings, added function dwc2_set_param_lpm() to set lpm and other lpm related parameters based on lpm support by core. Signed-off-by: Minas Harutyunyan <hminas@synopsys.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com> 
If core not supported lpm, i.e. BCM2835 then confusing warnings seen
in log.

To avoid these warnings, added function dwc2_set_param_lpm() to set
lpm and other lpm related parameters based on lpm support by core.

Signed-off-by: Minas Harutyunyan <hminas@synopsys.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
usb: dwc2: Add Amlogic G12A DWC2 Params 2019-05-03T06:13:47+00:00 Neil Armstrong narmstrong@baylibre.com 2019-04-23T08:51:26+00:00 fc4e326ee72cc36c942333c65d851247b31c567b This patchs sets the params for the DWC2 Controller found in the Amlogic G12A SoC family. It mainly sets the settings reported incorrect by the driver, leaving the remaining detected automatically by the driver and provided by the DT node. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Minas Harutyunyan <hminas@synopsys.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com> 
This patchs sets the params for the DWC2 Controller found in the
Amlogic G12A SoC family.

It mainly sets the settings reported incorrect by the driver,
leaving the remaining detected automatically by the driver and
provided by the DT node.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Minas Harutyunyan <hminas@synopsys.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
usb: dwc2: disable power_down on Amlogic devices 2018-12-10T07:18:19+00:00 Martin Blumenstingl martin.blumenstingl@googlemail.com 2018-12-09T19:01:29+00:00 cc10ce0c51b13d1566d0ec1dcb472fb86330b391 Disable power_down by setting the parameter to DWC2_POWER_DOWN_PARAM_NONE. This fixes a problem on various Amlogic Meson SoCs where USB devices are only recognized when plugged in before booting Linux. A hot-plugged USB device was not detected even though the device got power (my USB thumb drive for example has an LED which lit up). A similar fix was implemented for Rockchip SoCs in commit c216765d3a1def ("usb: dwc2: disable power_down on rockchip devices"). That commit suggests that a change in the dwc2 driver is the cause because the default value for the "hibernate" parameter (which then got renamed to "power_down" to support other modes) was changed in the v4.17 merge window with: commit 6d23ee9caa6790 ("Merge tag 'usb-for-v4.17' of git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb into usb-testing"). Cc: <stable@vger.kernel.org> # 4.19 Acked-by: Minas Harutyunyan <hminas@synopsys.com> Suggested-by: Christian Hewitt <christianshewitt@gmail.com> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com> 
Disable power_down by setting the parameter to
DWC2_POWER_DOWN_PARAM_NONE. This fixes a problem on various Amlogic
Meson SoCs where USB devices are only recognized when plugged in before
booting Linux. A hot-plugged USB device was not detected even though the
device got power (my USB thumb drive for example has an LED which lit
up).

A similar fix was implemented for Rockchip SoCs in commit c216765d3a1def
("usb: dwc2: disable power_down on rockchip devices"). That commit
suggests that a change in the dwc2 driver is the cause because the
default value for the "hibernate" parameter (which then got renamed to
"power_down" to support other modes) was changed in the v4.17 merge
window with:
commit 6d23ee9caa6790 ("Merge tag 'usb-for-v4.17' of git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb into usb-testing").

Cc: <stable@vger.kernel.org> # 4.19
Acked-by: Minas Harutyunyan <hminas@synopsys.com>
Suggested-by: Christian Hewitt <christianshewitt@gmail.com>
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
usb: dwc2: Disable power down feature on Samsung SoCs 2018-12-05T09:09:08+00:00 Marek Szyprowski m.szyprowski@samsung.com 2018-11-20T15:38:15+00:00 35a6054132286a4ab92b536595093b82e6bdfcbc Power down feature of DWC2 module integrated in Samsung SoCs doesn't work properly or needs some additional handling in PHY or SoC glue layer, so disable it for now. Without disabling power down, DWC2 causes random memory trashes and fails enumeration if there is no USB link to host on driver probe. Fixes: 03ea6d6e9e1ff1 ("usb: dwc2: Enable power down") Acked-by: Minas Harutyunyan <hminas@synopsys.com> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com> 
Power down feature of DWC2 module integrated in Samsung SoCs doesn't work
properly or needs some additional handling in PHY or SoC glue layer, so
disable it for now. Without disabling power down, DWC2 causes random memory
trashes and fails enumeration if there is no USB link to host on driver
probe.

Fixes: 03ea6d6e9e1ff1 ("usb: dwc2: Enable power down")
Acked-by: Minas Harutyunyan <hminas@synopsys.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>