linux.git/drivers/usb/dwc2/params.c, branch v4.17

Merge tag 'usb-for-v4.17' of git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb into usb-testing

2018-03-23T12:33:09+00:00

Felipe writes:

usb: changes for v4.17 merge window

Quite a lot happened in this cycle, with a total of 95 non-merge
commits. The most interesting parts are listed below:

Synopsys has been adding better support for USB 3.1 to dwc3. The same
series also sets g_mass_storage's max speed to SSP.

Roger Quadros (TI) added support for dual-role using the OTG block
available in some dwc3 implementations, this makes sure that AM437x
can swap roles in runtime.

We have a new SoC supported in dwc3 now - Amlogic Meson GX - thanks to
the work of Martin Blumenstingl.

We also have a ton of changes in dwc2 (51% of all changes, in
fact). The most interesting part there is the support for
Hibernation (a Synopsys PM feature).

Apart from these, we have our regular set of non-critical fixes all
over the place.

usb: dwc2: Force mode optimizations

2018-03-13T08:47:58+00:00

If the dr_mode is USB_DR_MODE_OTG, forcing the mode is needed during
driver probe to get the host and device specific HW parameters. Then we
clear the force mode bits so that the core operates in OTG mode.

The force mode bits should not be touched at any other time during the
driver lifetime and they should be preserved whenever the GUSBCFG
register is written to. The force mode bit values will persist across
soft resets of the core.

If the dr_mode is either USB_DR_MODE_HOST or USB_DR_MODE_PERIPHERAL, the
force mode is set just once at probe to configure the core as either a
host or peripheral.

Given the above, we no longer need any other reset delays, force delays,
or any forced modes anywhere else in the driver. So replace all calls to
dwc2_core_reset_and_force_dr_mode() with dwc2_core_reset() and remove
all other unnecessary delays.

Also remove the dwc2_force_mode_if_needed() function since the "if
needed" part is already taken care of by the polling in
dwc2_force_mode().

Finally, remove all other calls to dwc2_clear_force_mode().

Tested-by: Stefan Wahren 
Signed-off-by: John Youn 
Signed-off-by: Vardan Mikayelyan 
Signed-off-by: Grigor Tovmasyan 
Signed-off-by: Felipe Balbi

usb: dwc2: Enable power down

2018-03-13T08:47:57+00:00

Enable the power down option based on the core capability.

Signed-off-by: John Youn 
Signed-off-by: Vardan Mikayelyan 
Signed-off-by: Artur Petrosyan 
Signed-off-by: Grigor Tovmasyan 
Signed-off-by: Felipe Balbi

usb: dwc2: Add hibernation field into dwc2_hw_params

2018-03-13T08:47:53+00:00

Add parameter and it's initialization, needed for hibernation.

Reimplement dwc2_set_param_power_down() to support hibernation too.
Now 'power_down' parameter can be initialized with 0, 1 or 2.
0 - No
1 - Partial power down
2 - Hibernation

Signed-off-by: Vardan Mikayelyan 
Signed-off-by: John Youn 
Signed-off-by: Grigor Tovmasyan 
Signed-off-by: Felipe Balbi

usb: dwc2: Rename hibernation to partial_power_down

2018-03-13T08:47:53+00:00

No-op change, only rename.

This code was misnamed originally. It was only responsible for partial
power down and not for hibernation.

Rename core_params->hibernation to core_params->power_down,
dwc2_set_param_hibernation() to dwc2_set_param_power_down().

Signed-off-by: Vardan Mikayelyan 
Signed-off-by: John Youn 
Signed-off-by: Grigor Tovmasyan 
Signed-off-by: Felipe Balbi

usb: dwc2: Add core parameters for LPM support

2018-03-13T08:47:47+00:00

Add lpm, lpm_clock_gating, besl, hird_threshold_en and hird_threshold
core parameters. These will indicate LPM and LPM Errata support
as well as chosen L1 sleeping mode for the core and PHY.

Signed-off-by: Sevak Arakelyan 
Signed-off-by: Grigor Tovmasyan 
Signed-off-by: Felipe Balbi

usb: dwc2: Add ACG support to the driver

2018-03-13T08:47:46+00:00

Added function for supporting Active Clock Gating functionality
in the driver.

PCGCCTL1 (Power and Clock Control) register will be used
for controlling the core`s active clock gating feature, and
the previously reserved 12th bit in GHWCFG4 now indicates that the
controller supports the Dynamic Power Reduction (Active Clock Gating)
during no traffic scenarios such as L0, idle, resume and suspend
states.

dwc2_enable_acg() function sets GATEEN bit in PCGCCTL1 register
and enables ACG, if it supported.

According to ACG functional specification, enabling of ACG feature
in host mode done in host initialization, before turning Vbus on,
specifically in dwc2_core_host_init function.

Enabling of ACG feature in device mode done in device initialization,
before clearing the SftDiscon bit in DCTL.
This bit was cleared in dwc2_hsotg_core_connect() function.So
dwc2_enable_acg() called before dwc2_core_connect() calls.

Signed-off-by: Razmik Karapetyan 
Signed-off-by: Grigor Tovmasyan 
Signed-off-by: Felipe Balbi

usb: dwc2: Set AHB burst size to INCR

2018-03-13T08:47:40+00:00

Changed AHB burst size from INCR4 to INCR by default.
With this value driver shows excellent DMA performance.

Acked-by: John Youn 
Signed-off-by: Razmik Karapetyan 
Signed-off-by: Grigor Tovmasyan 
Signed-off-by: Felipe Balbi

usb: dwc2: Remove version check in GSNPSID

2018-03-13T08:47:39+00:00

Only check the ID portion of the GSNPSID register and don’t check
the version. This will allow the driver to work with version 4.00a
and later of the DWC_hsotg IP.

Acked-by: John Youn 
Signed-off-by: Gevorg Sahakyan 
Signed-off-by: Minas Harutyunyan 
Signed-off-by: Grigor Tovmasyan 
Signed-off-by: Felipe Balbi

usb: dwc2: fix STM32F7 USB OTG HS compatible

2018-03-05T08:43:57+00:00

This patch fixes compatible for STM32F7 USB OTG HS and consistently rename
dw2_set_params function.
The v2 former patch [1] had been acked by Paul Young, but v1 was merged.

[1] https://patchwork.kernel.org/patch/9925573/

Fixes: d8fae8b93682 ("usb: dwc2: add support for STM32F7xx USB OTG HS")
Signed-off-by: Amelie Delaunay 
Signed-off-by: Felipe Balbi