<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux.git/drivers/tty/serial/serial-tegra.c, branch v3.9</title>
<subtitle>Linux kernel source tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/'/>
<entry>
<title>serial: tegra: assume CONFIG_OF</title>
<updated>2013-02-15T22:47:04+00:00</updated>
<author>
<name>Stephen Warren</name>
<email>swarren@nvidia.com</email>
</author>
<published>2013-02-15T22:04:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=c3e1becebfe115f827ea2242218c9a8f627c094f'/>
<id>c3e1becebfe115f827ea2242218c9a8f627c094f</id>
<content type='text'>
Tegra only supports, and always enables, device tree. Remove all ifdefs
for DT support from the driver.

Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Tegra only supports, and always enables, device tree. Remove all ifdefs
for DT support from the driver.

Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>serial: tegra: Fix compilation error</title>
<updated>2013-01-25T16:52:24+00:00</updated>
<author>
<name>Venu Byravarasu</name>
<email>vbyravarasu@nvidia.com</email>
</author>
<published>2013-01-23T07:22:13+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=dbf5bef8da169b38db804996a661f8d634df8295'/>
<id>dbf5bef8da169b38db804996a661f8d634df8295</id>
<content type='text'>
Fix compilation error, by adding the correct header file
for Tegra clocks.

Signed-off-by: Venu Byravarasu &lt;vbyravarasu@nvidia.com&gt;
Reviewed-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Fix compilation error, by adding the correct header file
for Tegra clocks.

Signed-off-by: Venu Byravarasu &lt;vbyravarasu@nvidia.com&gt;
Reviewed-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>serial: tegra: Switch to using struct tty_port</title>
<updated>2013-01-18T01:32:11+00:00</updated>
<author>
<name>Thierry Reding</name>
<email>thierry.reding@avionic-design.de</email>
</author>
<published>2013-01-17T13:31:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=962963e4ee23bc7518dfee754de5f20d35de71d9'/>
<id>962963e4ee23bc7518dfee754de5f20d35de71d9</id>
<content type='text'>
Many of the tty functions were converted to use a struct tty_port
instead of a struct tty_struct. Update the Tegra driver accordingly to
avoid build breakage.

Signed-off-by: Thierry Reding &lt;thierry.reding@avionic-design.de&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Many of the tty functions were converted to use a struct tty_port
instead of a struct tty_struct. Update the Tegra driver accordingly to
avoid build breakage.

Signed-off-by: Thierry Reding &lt;thierry.reding@avionic-design.de&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>serial: tegra: add serial driver</title>
<updated>2013-01-16T06:15:17+00:00</updated>
<author>
<name>Laxman Dewangan</name>
<email>ldewangan@nvidia.com</email>
</author>
<published>2013-01-08T10:57:44+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=e9ea096dd2259454e0d09d0b0445fe8f0117add4'/>
<id>e9ea096dd2259454e0d09d0b0445fe8f0117add4</id>
<content type='text'>
NVIDIA's Tegra has multiple UART controller which supports:
- APB DMA based controller fifo read/write.
- End Of Data interrupt in incoming data to know whether end
  of frame achieve or not.
- HW controlled RTS and CTS flow control to reduce SW overhead.

Add serial driver to use all above feature.

Signed-off-by: Laxman Dewangan &lt;ldewangan@nvidia.com&gt;
Acked-by: Alan Cox &lt;alan@linux.intel.com&gt;
Reviewed-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
NVIDIA's Tegra has multiple UART controller which supports:
- APB DMA based controller fifo read/write.
- End Of Data interrupt in incoming data to know whether end
  of frame achieve or not.
- HW controlled RTS and CTS flow control to reduce SW overhead.

Add serial driver to use all above feature.

Signed-off-by: Laxman Dewangan &lt;ldewangan@nvidia.com&gt;
Acked-by: Alan Cox &lt;alan@linux.intel.com&gt;
Reviewed-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</pre>
</div>
</content>
</entry>
</feed>
