linux.git/drivers/spi/Makefile, branch v4.9

Merge remote-tracking branches 'spi/topic/octeon', 'spi/topic/pic32-sqi', 'spi/topic/pxa2xx' and 'spi/topic/qup' into spi-next

2016-09-30T16:14:14+00:00

Merge remote-tracking branches 'spi/topic/fsl-espi', 'spi/topic/imx', 'spi/topic/jcore', 'spi/topic/loopback' and 'spi/topic/meson' into spi-next

2016-09-30T16:14:10+00:00

spi: iproc-qspi: Add Broadcom iProc SoCs support

2016-09-24T19:03:25+00:00

This spi driver uses the common spi-bcm-qspi driver and implements iProc
SoCs specific interrupt controller. The common driver now calls the SoC
handlers when present. Adding support for both muxed l1 and unmuxed interrupt
sources.

Signed-off-by: Kamal Dasu 
Signed-off-by: Yendapally Reddy Dhananjaya Reddy 
Signed-off-by: Mark Brown

spi: brcmstb-qspi: Broadcom settop platform driver

2016-09-14T17:03:32+00:00

Adding the settop SoC platfrom driver, this driver is compatible
with the settop MSPI+BSPI and MSPI only blocks implemented on the
SoCs. Driver calls the spi-bcm-qspi probe(), remove() and pm_ops.

Signed-off-by: Kamal Dasu 
Signed-off-by: Mark Brown

spi: bcm-qspi: Add Broadcom MSPI driver

2016-09-14T17:03:32+00:00

Master SPI driver for Broadcom settop, iProc SoCs. The driver
is used for devices that use SPI protocol on BRCMSTB, NSP, NS2
SoCs. SoC platform driver call exported porbe(), remove()
and suspend/resume pm_ops implemented in this common driver.

Signed-off-by: Kamal Dasu 
Signed-off-by: Yendapally Reddy Dhananjaya Reddy
Signed-off-by: Mark Brown

spi: octeon: Add ThunderX driver

2016-08-19T15:24:39+00:00

Add ThunderX SPI driver using the shared part from the Octeon
driver. The main difference of the ThunderX driver is that it
is a PCI device so probing is different. The system clock settings
can be specified in device tree.

Signed-off-by: Jan Glauber 
Signed-off-by: Mark Brown

spi: add driver for J-Core SPI controller

2016-08-08T10:56:32+00:00

The J-Core "spi2" device is a PIO-based SPI master controller. It
differs from "bitbang" devices in that that it's clocked in hardware
rather than via soft clock modulation over gpio, and performs
byte-at-a-time transfers between the cpu and SPI controller.

This driver will be extended to support future versions of the J-Core
SPI controller with DMA transfers when they become available.

Signed-off-by: Rich Felker 
Signed-off-by: Mark Brown

spi: octeon: Split driver into Octeon specific and common parts

2016-07-24T20:54:29+00:00

Separate driver probing from SPI transfer functions.

Signed-off-by: Jan Glauber 
Tested-by: Steven J. Hill 
Signed-off-by: Mark Brown

spi: pic32-sqi: add SPI driver for PIC32 SQI controller.

2016-04-18T16:52:46+00:00

This driver implements SPI master interface for Quad SPI
controller, specifically for accessing quad SPI flash.
It uses descriptor-based DMA transfer mode and supports
half-duplex communication for single, dual and quad SPI
transactions.

Signed-off-by: Purna Chandra Mandal 
Cc: Mark Brown 
Signed-off-by: Mark Brown

spi: spi-pic32: Add PIC32 SPI master driver

2016-04-04T17:04:29+00:00

The PIC32 SPI driver is capable of performing SPI transfers
using PIO or external DMA engine. GPIO controlled /CS support
is made default in the driver for correct operation of the
controller. This can be enabled by adding "cs-gpios" property
of the SPI node in board dts file.

Signed-off-by: Purna Chandra Mandal 
Signed-off-by: Mark Brown