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<title>linux.git/drivers/spi/Makefile, branch v4.10</title>
<subtitle>Linux kernel source tree</subtitle>
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<entry>
<title>Merge remote-tracking branches 'spi/topic/fsl-lpspi', 'spi/topic/imx', 'spi/topic/jcore' and 'spi/topic/omap' into spi-next</title>
<updated>2016-12-12T15:54:14+00:00</updated>
<author>
<name>Mark Brown</name>
<email>broonie@kernel.org</email>
</author>
<published>2016-12-12T15:54:14+00:00</published>
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<entry>
<title>spi: Add support for Armada 3700 SPI Controller</title>
<updated>2016-12-08T16:05:34+00:00</updated>
<author>
<name>Romain Perier</name>
<email>romain.perier@free-electrons.com</email>
</author>
<published>2016-12-08T14:58:44+00:00</published>
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Marvell Armada 3700 SoC comprises an SPI Controller. This Controller
supports up to 4 SPI slave devices, with dedicated chip selects,supports
SPI mode 0/1/2 and 3, CPIO or Fifo mode with DMA transfers and different
SPI transfer mode (Single, Dual or Quad).

This commit adds basic driver support for FIFO mode. In this mode,
dedicated registers are used to store the instruction, the address, the
read mode and the data. Write and Read FIFO are used to store the
outcoming or incoming data. The data FIFOs are accessible via DMA or by
the CPU. Only the CPU is supported for now.

Signed-off-by: Romain Perier &lt;romain.perier@free-electrons.com&gt;
Tested-by: Gregory CLEMENT &lt;gregory.clement@free-electrons.com&gt;
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
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Marvell Armada 3700 SoC comprises an SPI Controller. This Controller
supports up to 4 SPI slave devices, with dedicated chip selects,supports
SPI mode 0/1/2 and 3, CPIO or Fifo mode with DMA transfers and different
SPI transfer mode (Single, Dual or Quad).

This commit adds basic driver support for FIFO mode. In this mode,
dedicated registers are used to store the instruction, the address, the
read mode and the data. Write and Read FIFO are used to store the
outcoming or incoming data. The data FIFOs are accessible via DMA or by
the CPU. Only the CPU is supported for now.

Signed-off-by: Romain Perier &lt;romain.perier@free-electrons.com&gt;
Tested-by: Gregory CLEMENT &lt;gregory.clement@free-electrons.com&gt;
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</pre>
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</content>
</entry>
<entry>
<title>spi: imx: add lpspi bus driver</title>
<updated>2016-11-22T19:13:16+00:00</updated>
<author>
<name>Gao Pan</name>
<email>pandy.gao@nxp.com</email>
</author>
<published>2016-11-22T13:52:17+00:00</published>
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This patch adds lpspi driver to support new i.MX products which use
lpspi instead of ecspi.

The lpspi can continue operating in stop mode when an appropriate
clock is available. It is also designed for low CPU overhead with
DMA offloading of FIFO register accesses.

Signed-off-by: Gao Pan &lt;pandy.gao@nxp.com&gt;
Reviewed-by: Fugang Duan &lt;B38611@freescale.com&gt;
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
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<pre>
This patch adds lpspi driver to support new i.MX products which use
lpspi instead of ecspi.

The lpspi can continue operating in stop mode when an appropriate
clock is available. It is also designed for low CPU overhead with
DMA offloading of FIFO register accesses.

Signed-off-by: Gao Pan &lt;pandy.gao@nxp.com&gt;
Reviewed-by: Fugang Duan &lt;B38611@freescale.com&gt;
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</pre>
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</entry>
<entry>
<title>Merge remote-tracking branches 'spi/topic/octeon', 'spi/topic/pic32-sqi', 'spi/topic/pxa2xx' and 'spi/topic/qup' into spi-next</title>
<updated>2016-09-30T16:14:14+00:00</updated>
<author>
<name>Mark Brown</name>
<email>broonie@kernel.org</email>
</author>
<published>2016-09-30T16:14:14+00:00</published>
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</entry>
<entry>
<title>Merge remote-tracking branches 'spi/topic/fsl-espi', 'spi/topic/imx', 'spi/topic/jcore', 'spi/topic/loopback' and 'spi/topic/meson' into spi-next</title>
<updated>2016-09-30T16:14:10+00:00</updated>
<author>
<name>Mark Brown</name>
<email>broonie@kernel.org</email>
</author>
<published>2016-09-30T16:14:10+00:00</published>
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<entry>
<title>spi: iproc-qspi: Add Broadcom iProc SoCs support</title>
<updated>2016-09-24T19:03:25+00:00</updated>
<author>
<name>Kamal Dasu</name>
<email>kdasu.kdev@gmail.com</email>
</author>
<published>2016-08-24T22:04:29+00:00</published>
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<id>cc20a38612dbc87dc7396affc9758e3bfbe92340</id>
<content type='text'>
This spi driver uses the common spi-bcm-qspi driver and implements iProc
SoCs specific interrupt controller. The common driver now calls the SoC
handlers when present. Adding support for both muxed l1 and unmuxed interrupt
sources.

Signed-off-by: Kamal Dasu &lt;kdasu.kdev@gmail.com&gt;
Signed-off-by: Yendapally Reddy Dhananjaya Reddy &lt;yendapally.reddy@broadcom.com&gt;
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
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<pre>
This spi driver uses the common spi-bcm-qspi driver and implements iProc
SoCs specific interrupt controller. The common driver now calls the SoC
handlers when present. Adding support for both muxed l1 and unmuxed interrupt
sources.

Signed-off-by: Kamal Dasu &lt;kdasu.kdev@gmail.com&gt;
Signed-off-by: Yendapally Reddy Dhananjaya Reddy &lt;yendapally.reddy@broadcom.com&gt;
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</pre>
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</content>
</entry>
<entry>
<title>spi: brcmstb-qspi: Broadcom settop platform driver</title>
<updated>2016-09-14T17:03:32+00:00</updated>
<author>
<name>Kamal Dasu</name>
<email>kdasu.kdev@gmail.com</email>
</author>
<published>2016-08-24T22:04:24+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=44f95d87a6187f5027568bbcdce491713d7de5e5'/>
<id>44f95d87a6187f5027568bbcdce491713d7de5e5</id>
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Adding the settop SoC platfrom driver, this driver is compatible
with the settop MSPI+BSPI and MSPI only blocks implemented on the
SoCs. Driver calls the spi-bcm-qspi probe(), remove() and pm_ops.

Signed-off-by: Kamal Dasu &lt;kdasu.kdev@gmail.com&gt;
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
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Adding the settop SoC platfrom driver, this driver is compatible
with the settop MSPI+BSPI and MSPI only blocks implemented on the
SoCs. Driver calls the spi-bcm-qspi probe(), remove() and pm_ops.

Signed-off-by: Kamal Dasu &lt;kdasu.kdev@gmail.com&gt;
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</pre>
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</content>
</entry>
<entry>
<title>spi: bcm-qspi: Add Broadcom MSPI driver</title>
<updated>2016-09-14T17:03:32+00:00</updated>
<author>
<name>Kamal Dasu</name>
<email>kdasu.kdev@gmail.com</email>
</author>
<published>2016-08-24T22:04:23+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=fa236a7ef24048bafaeed13f68df35a819794758'/>
<id>fa236a7ef24048bafaeed13f68df35a819794758</id>
<content type='text'>
Master SPI driver for Broadcom settop, iProc SoCs. The driver
is used for devices that use SPI protocol on BRCMSTB, NSP, NS2
SoCs. SoC platform driver call exported porbe(), remove()
and suspend/resume pm_ops implemented in this common driver.

Signed-off-by: Kamal Dasu &lt;kdasu.kdev@gmail.com&gt;
Signed-off-by: Yendapally Reddy Dhananjaya Reddy
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
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<pre>
Master SPI driver for Broadcom settop, iProc SoCs. The driver
is used for devices that use SPI protocol on BRCMSTB, NSP, NS2
SoCs. SoC platform driver call exported porbe(), remove()
and suspend/resume pm_ops implemented in this common driver.

Signed-off-by: Kamal Dasu &lt;kdasu.kdev@gmail.com&gt;
Signed-off-by: Yendapally Reddy Dhananjaya Reddy
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</pre>
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</content>
</entry>
<entry>
<title>spi: octeon: Add ThunderX driver</title>
<updated>2016-08-19T15:24:39+00:00</updated>
<author>
<name>Jan Glauber</name>
<email>jglauber@cavium.com</email>
</author>
<published>2016-08-19T14:03:20+00:00</published>
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<id>7347a6c7af8d9b5edf587678e80c7e5bc24ec2d5</id>
<content type='text'>
Add ThunderX SPI driver using the shared part from the Octeon
driver. The main difference of the ThunderX driver is that it
is a PCI device so probing is different. The system clock settings
can be specified in device tree.

Signed-off-by: Jan Glauber &lt;jglauber@cavium.com&gt;
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
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<pre>
Add ThunderX SPI driver using the shared part from the Octeon
driver. The main difference of the ThunderX driver is that it
is a PCI device so probing is different. The system clock settings
can be specified in device tree.

Signed-off-by: Jan Glauber &lt;jglauber@cavium.com&gt;
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</pre>
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</content>
</entry>
<entry>
<title>spi: add driver for J-Core SPI controller</title>
<updated>2016-08-08T10:56:32+00:00</updated>
<author>
<name>Rich Felker</name>
<email>dalias@libc.org</email>
</author>
<published>2016-08-04T04:30:37+00:00</published>
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The J-Core "spi2" device is a PIO-based SPI master controller. It
differs from "bitbang" devices in that that it's clocked in hardware
rather than via soft clock modulation over gpio, and performs
byte-at-a-time transfers between the cpu and SPI controller.

This driver will be extended to support future versions of the J-Core
SPI controller with DMA transfers when they become available.

Signed-off-by: Rich Felker &lt;dalias@libc.org&gt;
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
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The J-Core "spi2" device is a PIO-based SPI master controller. It
differs from "bitbang" devices in that that it's clocked in hardware
rather than via soft clock modulation over gpio, and performs
byte-at-a-time transfers between the cpu and SPI controller.

This driver will be extended to support future versions of the J-Core
SPI controller with DMA transfers when they become available.

Signed-off-by: Rich Felker &lt;dalias@libc.org&gt;
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</pre>
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