linux.git/drivers/soc/tegra, branch v4.12

soc/tegra: Add initial flowctrl support for Tegra132/210

2017-04-04T13:52:31+00:00

Tegra132 and Tegra210 support the flowctrl module and so add initial
support for these devices.

Please note that Tegra186 does not support the flowctrl module, so
update the initialisation function such that we do not fall back and
attempt to map the 'hardcoded' address range for Tegra186. Furthermore
64-bit Tegra devices have always had the flowctrl node defined in their
device-tree and so only use the 'hardcoded' addresses for 32-bit Tegra
devices.

Signed-off-by: Jon Hunter 
Signed-off-by: Thierry Reding

soc/tegra: flowctrl: Add basic platform driver

2017-04-04T13:49:46+00:00

Add a simple platform driver for the flowctrl module so that it gets
registered as a proper device.

Signed-off-by: Jon Hunter 
Signed-off-by: Thierry Reding

soc/tegra: Move Tegra flowctrl driver

2017-04-04T13:48:04+00:00

The flowctrl driver is required for both ARM and ARM64 Tegra devices
and in order to enable support for it for ARM64, move the Tegra flowctrl
driver into drivers/soc/tegra.

By moving the flowctrl driver, tegra_flowctrl_init() is now called by
via an early initcall and to prevent this function from attempting to
mapping IO space for a non-Tegra device, a test for 'soc_is_tegra()'
is also added.

Signed-off-by: Jon Hunter 
Signed-off-by: Thierry Reding

soc: tegra: make fuse-tegra explicitly non-modular

2017-04-04T13:43:52+00:00

The Makefiles currently controlling compilation of this code is:

drivers/soc/tegra/Makefile:obj-y += fuse/
drivers/soc/tegra/fuse/Makefile:obj-y += fuse-tegra.o

...meaning that it currently is not being built as a module by anyone.

Lets remove the couple traces of modularity so that when reading the
driver there is no doubt it is builtin-only.

Since module_platform_driver() uses the same init level priority as
builtin_platform_driver() the init ordering remains unchanged with
this commit.

Cc: Stephen Warren 
Cc: Thierry Reding 
Cc: Alexandre Courbot 
Cc: linux-tegra@vger.kernel.org
Signed-off-by: Paul Gortmaker 
Signed-off-by: Thierry Reding

soc/tegra: Implement Tegra186 PMC support

2017-04-04T13:43:50+00:00

The power management controller on Tegra186 has changed in backwards-
incompatible ways with respect to earlier generations. This implements a
new driver that supports inversion of the PMU interrupt as well as the
"recovery", "bootloader" and "forced-recovery" reboot commands.

Acked-by: Rob Herring 
Signed-off-by: Thierry Reding

soc/tegra: pmc: Use consistent naming for PM domains

2016-11-15T14:51:56+00:00

The various error messages refer to the PM domains as "power domain",
"genpd" and "PM domain". That's confusing, so convert all error messages
to use the most prominent: "PM domain".

Acked-by: Jon Hunter 
Signed-off-by: Thierry Reding

soc/tegra: pmc: Remove genpd when adding provider fails

2016-11-15T14:51:55+00:00

Commit 3fe577107ccf ("PM / Domains: Add support for removing PM
domains") add support for removing PM domains. Update the Tegra PMC
driver to remove PM domains if we fail to add a provider for the PM
domain.

Please note that the code under 'power_on_cleanup' label does not
really belong in the clean-up error path for tegra_powergate_add().
To keep the error path simple, remove this label and move the
associated code to where it needs to be invoked.

Signed-off-by: Jon Hunter 
Signed-off-by: Thierry Reding

soc/tegra: pmc: Check return code for pm_genpd_init()

2016-11-15T14:51:54+00:00

Commit 7eb231c337e0 ("PM / Domains: Convert pm_genpd_init() to return
an error code") updated pm_genpd_init() to return an error code. Update
the Tegra PMC driver to check the return value from pm_genpd_init() and
handle any errors returned.

Signed-off-by: Jon Hunter 
[treding@nvidia.com: use pr_err() instead of dev_err()]
Signed-off-by: Thierry Reding

soc/tegra: pmc: Clean-up I/O rail error messages

2016-11-15T14:51:53+00:00

Use pr_err() instead of dev_err() when the pmc->dev field has not been
initialized yet and add a few missing error messages as well as remove
duplicate ones.

Based on work by Jon Hunter .

Signed-off-by: Thierry Reding

soc/tegra: pmc: Simplify IO rail bit handling

2016-11-15T14:51:53+00:00

The function tegra_io_rail_prepare() converts the IO rail ID into a
bit position that is used to check the status and control the IO rail
in the PMC registers. However, rather than converting to a bit position
it is more useful to convert to a bit-mask because this is what is
actually used. By doing so the BIT() marco only needs to be used once
and we can use the IO_DPD_REQ_CODE_MASK when checking for erroneous rail
IDs.

Signed-off-by: Jon Hunter 
[treding@nvidia.com: rebase and rename bit -> mask]
Signed-off-by: Thierry Reding