linux.git/drivers/soc/imx, branch v5.19

soc: imx: imx8m-blk-ctrl: fix display clock for LCDIF2 power domain

2022-06-14T03:53:42+00:00

LCDIF2 has its own display clock, use this one.

Fixes: 07614fed00e9 ("soc: imx: imx8m-blk-ctrl: Add i.MX8MP media blk-ctrl")
Signed-off-by: Alexander Stein 
Reviewed-by: Paul Elder 
Tested-by: Martyn Welch 
Signed-off-by: Shawn Guo

Merge tag 'arm-drivers-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

2022-05-26T17:32:47+00:00

Pull ARM driver updates from Arnd Bergmann:
 "There are minor updates to SoC specific drivers for chips by Rockchip,
  Samsung, NVIDIA, TI, NXP, i.MX, Qualcomm, and Broadcom.

  Noteworthy driver changes include:

   - Several conversions of DT bindings to yaml format.

   - Renesas adds driver support for R-Car V4H, RZ/V2M and RZ/G2UL SoCs.

   - Qualcomm adds a bus driver for the SSC (Snapdragon Sensor Core),
     and support for more chips in the RPMh power domains and the
     soc-id.

   - NXP has a new driver for the HDMI blk-ctrl on i.MX8MP.

   - Apple M1 gains support for the on-chip NVMe controller, making it
     possible to finally use the internal disks. This also includes SoC
     drivers for their RTKit IPC and for the SART DMA address filter.

  For other subsystems that merge their drivers through the SoC tree, we
  have

   - Firmware drivers for the ARM firmware stack including TEE, OP-TEE,
     SCMI and FF-A get a number of smaller updates and cleanups. OP-TEE
     now has a cache for firmware argument structures as an
     optimization, and SCMI now supports the 3.1 version of the
     specification.

   - Reset controller updates to Amlogic, ASpeed, Renesas and ACPI
     drivers

   - Memory controller updates for Tegra, and a few updates for other
     platforms"

* tag 'arm-drivers-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (159 commits)
  memory: tegra: Add MC error logging on Tegra186 onward
  memory: tegra: Add memory controller channels support
  memory: tegra: Add APE memory clients for Tegra234
  memory: tegra: Add Tegra234 support
  nvme-apple: fix sparse endianess warnings
  soc/tegra: pmc: Document core domain fields
  soc: qcom: pdr: use static for servreg_* variables
  soc: imx: fix semicolon.cocci warnings
  soc: renesas: R-Car V3U is R-Car Gen4
  soc: imx: add i.MX8MP HDMI blk-ctrl
  soc: imx: imx8m-blk-ctrl: Add i.MX8MP media blk-ctrl
  soc: imx: add i.MX8MP HSIO blk-ctrl
  soc: imx: imx8m-blk-ctrl: set power device name
  soc: qcom: llcc: Add sc8180x and sc8280xp configurations
  dt-bindings: arm: msm: Add sc8180x and sc8280xp LLCC compatibles
  soc/tegra: pmc: Select REGMAP
  dt-bindings: reset: st,sti-powerdown: Convert to yaml
  dt-bindings: reset: st,sti-picophyreset: Convert to yaml
  dt-bindings: reset: socfpga: Convert to yaml
  dt-bindings: reset: snps,axs10x-reset: Convert to yaml
  ...

soc: imx: fix semicolon.cocci warnings

2022-05-05T12:51:52+00:00

drivers/soc/imx/imx8mp-blk-ctrl.c:227:61-62: Unneeded semicolon
drivers/soc/imx/imx8mp-blk-ctrl.c:192:61-62: Unneeded semicolon

 Remove unneeded semicolon.

Generated by: scripts/coccinelle/misc/semicolon.cocci

Fixes: 556f5cf9568a ("soc: imx: add i.MX8MP HSIO blk-ctrl")
CC: Lucas Stach 
Reported-by: kernel test robot 
Signed-off-by: kernel test robot 
Signed-off-by: Shawn Guo

soc: imx: add i.MX8MP HDMI blk-ctrl

2022-05-05T01:28:58+00:00

This adds driver support for the HDMI blk-ctrl found on the
i.MX8MP SoC.

Signed-off-by: Lucas Stach 
Signed-off-by: Shawn Guo

soc: imx: imx8m-blk-ctrl: Add i.MX8MP media blk-ctrl

2022-05-05T01:28:57+00:00

Add the description for the i.MX8MP media blk-ctrl.

Signed-off-by: Paul Elder 
Reviewed-by: Laurent Pinchart 
Signed-off-by: Laurent Pinchart 
Reviewed-by: Marek Vasut 
Tested-by: Marek Vasut  # MX8MP LCDIF #1 and #2
Signed-off-by: Lucas Stach 
Signed-off-by: Shawn Guo

soc: imx: add i.MX8MP HSIO blk-ctrl

2022-05-05T01:28:57+00:00

The i.MX8MP added some blk-ctrl peripherals that don't follow the regular
structure of the blk-ctrls in the previous SoCs. Add a new file for those
with currently only the HSIO blk-ctrl being supported. Others will be added
later on.

Signed-off-by: Lucas Stach 
Signed-off-by: Shawn Guo

soc: imx: imx8m-blk-ctrl: set power device name

2022-05-05T01:07:56+00:00

Set the name for the virtual power device to the name of the attached
blk-ctrl domain. Makes the debug output for the power domains a lot
more pleasant to read.

Signed-off-by: Lucas Stach 
Signed-off-by: Shawn Guo

soc: imx: imx8m-blk-ctrl: Fix IMX8MN_DISPBLK_PD_ISI hang

2022-04-10T01:32:08+00:00

The imx8mn clock list for the ISI lists four clocks, but DOMAIN_MAX_CLKS
was set to 3.  Because of this, attempts to enable the fourth clock failed,
threw some splat, and ultimately hung.

Fixes: 7f511d514e8c ("soc: imx: imx8m-blk-ctrl: add i.MX8MN DISP blk-ctrl")
Signed-off-by: Adam Ford 
Reviewed-by: Lucas Stach 
Signed-off-by: Shawn Guo

soc: imx: gpcv2: add support for i.MX8MP power domains

2022-04-08T12:02:36+00:00

This adds driver support for all the GPC power domains found on
the i.MX8MP SoC.

Signed-off-by: Lucas Stach 
Reviewed-by: Laurent Pinchart 
Tested-by: Laurent Pinchart 
Tested-by: Peng Fan 
Signed-off-by: Shawn Guo

soc: imx: gpcv2: add PGC control register indirection

2022-04-08T12:01:46+00:00

The PGC control registers in the shared (not per-PGC) region of the
GPC address space have different offsets on i.MX8MP to make space for
additional interrupt control registers.

Signed-off-by: Lucas Stach 
Reviewed-by: Laurent Pinchart 
Tested-by: Peng Fan 
Signed-off-by: Shawn Guo