linux.git/drivers/soc/fsl/qe, branch master

Merge tag 'soc_fsl-7.3-1' of https://git.kernel.org/pub/scm/linux/kernel/git/chleroy/linux into soc/drivers

2026-08-10T08:15:56+00:00

FSL SOC Changes for 7.3

Freescale QUICC Engine:
- Use generic I/O helpers in interrupt controller for IO Ports
- Move CONFIG_QE_GPIO out of powerpc
- Fix DT scan for GPIO nodes
- Convert IO ports interrupt controller to generic IRQ chip
- Add support of IRQs in GPIO controller
- Implement get_direction() in GPIO controller
- Check platform_driver_register() in interrupt controller for IO Ports

Data Path I/O:
- Replace maintainer
- Remove redundant dev_err()
- Fix kernel-doc typos

Freescale Management Complex:
- Use strscpy() to copy strings into arrays
- Remove redundant dev_err()
- Drop unused assignment of acpi_device_id::driver_data

Other changes:
- Add kernel and device tree binding support for RCW override,
completing the SerDes PHY driver functionality
- Fix kernel-doc warnings and typos in DPAA header

* tag 'soc_fsl-7.3-1' of https://git.kernel.org/pub/scm/linux/kernel/git/chleroy/linux: (31 commits)
  bus: fsl-mc: drop unused assignment of acpi_device_id::driver_data
  soc: fsl: qe: check platform_driver_register() in qe_ic_of_init()
  phy: lynx-10g: use RCW override procedure for dynamic protocol change
  soc: fsl: guts: implement the RCW override procedure
  dt-bindings: fsl: layerscape-dcfg: define DCFG_DCSR region
  soc: fsl: guts: make fsl_soc_data available after fsl_guts_init()
  soc: fsl: guts: make it easier to determine on which SoC we are running
  soc: fsl: guts: add a central fsl_guts_read() function
  soc: fsl: guts: add a global structure to hold state
  soc: fsl: guts: use a macro to encode the DCFG CCSR space
  soc: fsl: guts: perform fsl_guts_init() error teardown in reverse order of setup
  soc: fsl: dpio: fix kernel-doc typos
  soc: fsl: fix kernel-doc warnings and typos
  bus: fsl-mc: Remove redundant dev_err()
  soc: fsl: qe: Add support of IRQs in QE GPIO
  soc: fsl: qe: Rename irq variable to parent_irq
  soc: fsl: qe: Convert to generic IRQ chip
  soc: fsl: qe: Handle spurious interrupts
  soc: fsl: qe: Iterate over all pending interrupts in cascade handler
  soc: fsl: qe: Use generic_handle_domain_irq()
  ...

Signed-off-by: Arnd Bergmann

soc: fsl: qe: check platform_driver_register() in qe_ic_of_init()

2026-08-07T04:54:23+00:00

qe_ic_of_init() ignored the return value of platform_driver_register()
and always returned success. Propagate the error to the initcall.

Fixes: be7ecbd240b2 ("soc: fsl: qe: convert QE interrupt controller to platform_device")
Signed-off-by: Linkai Gong 
Reviewed-by: Maxim Kochetkov 
Link: https://lore.kernel.org/r/20260731094608.1883391-1-gonglinkai@kylinos.cn
Signed-off-by: Christophe Leroy (CS GROUP)

soc: fsl: qe: Add support of IRQs in QE GPIO

2026-08-07T04:52:26+00:00

Some QE GPIO pins have an associated interrupt line in the QE PIC to
signal state changes on the pin.

Because the GPIO controller does not perform any interrupt handling
itself, a nexus node (interrupt-map) is used to map each GPIO line
supporting IRQ to the parent QE PIC interrupt domain.

Add the to_irq() method in the corresponding GPIO controller driver,
that uses the nexus node to perform the translation.

Signed-off-by: Paul Louvel 
Reviewed-by: Christophe Leroy (CS GROUP) 
Link: https://lore.kernel.org/r/20260708-qe-pic-gpios-v2-10-1972044cfbd1@bootlin.com
[chleroy: Added dependency on !SPARC to fix build on sparc reported by 0-day kernel robot]
Signed-off-by: Christophe Leroy (CS GROUP)

soc: fsl: qe: Rename irq variable to parent_irq

2026-08-03T12:58:59+00:00

Rename the local variable holding the platform IRQ to parent_irq, which
better describes its role as the upstream/chained interrupt in the
hierarchy.

Signed-off-by: Paul Louvel 
Reviewed-by: Christophe Leroy (CS GROUP) 
Link: https://lore.kernel.org/r/20260708-qe-pic-gpios-v2-9-1972044cfbd1@bootlin.com
Signed-off-by: Christophe Leroy (CS GROUP)

soc: fsl: qe: Convert to generic IRQ chip

2026-08-03T12:58:59+00:00

The generic IRQ chip framework is available to handle IRQ chips. Using
this framework for the QE interrupt controller allows to simplify the
driver. Indeed, the framework internally handles operations coded
directly in the driver.

Signed-off-by: Paul Louvel 
Reviewed-by: Christophe Leroy (CS GROUP) 
Link: https://lore.kernel.org/r/20260708-qe-pic-gpios-v2-8-1972044cfbd1@bootlin.com
Signed-off-by: Christophe Leroy (CS GROUP)

soc: fsl: qe: Handle spurious interrupts

2026-08-03T12:58:59+00:00

When no interrupt bits are set in the event register, call
handle_bad_irq() to account for the spurious interrupt before
exiting the cascade handler.

Signed-off-by: Paul Louvel 
Reviewed-by: Christophe Leroy (CS GROUP) 
Link: https://lore.kernel.org/r/20260708-qe-pic-gpios-v2-7-1972044cfbd1@bootlin.com
Signed-off-by: Christophe Leroy (CS GROUP)

soc: fsl: qe: Iterate over all pending interrupts in cascade handler

2026-08-03T12:58:59+00:00

Instead of only servicing a single interrupt, the chained handler can
handle all IRQs that have their bit set in the event register.
This avoid multiple parent IRQ handler being serviced if more than one
interrupt are pending on the QE PIC.

Remove unused code.

Signed-off-by: Paul Louvel 
Reviewed-by: Christophe Leroy (CS GROUP) 
Link: https://lore.kernel.org/r/20260708-qe-pic-gpios-v2-6-1972044cfbd1@bootlin.com
Signed-off-by: Christophe Leroy (CS GROUP)

soc: fsl: qe: Use generic_handle_domain_irq()

2026-08-03T12:58:59+00:00

Replace the irq_find_mapping() + generic_handle_irq() pattern with
generic_handle_domain_irq(), which handles the IRQ domain lookup
internally. This is less error-prone and more idiomatic.

Remove the now-unused irq_find_mapping() call from qepic_get_irq().

Signed-off-by: Paul Louvel 
Reviewed-by: Christophe Leroy (CS GROUP) 
Link: https://lore.kernel.org/r/20260708-qe-pic-gpios-v2-5-1972044cfbd1@bootlin.com
Signed-off-by: Christophe Leroy (CS GROUP)

soc: fsl: qe: Add chained_irq_{enter,exit}() calls in cascade handler

2026-08-03T12:58:58+00:00

Wrap the cascade handler body with chained_irq_{enter,exit}() to
properly inform the parent IRQ chip that a chained interrupt is being
serviced.

Fixes: f0bcd784e1b76 ("soc: fsl: qe: Add an interrupt controller for QUICC Engine Ports")
Signed-off-by: Paul Louvel 
Cc: stable@kernel.org
Reviewed-by: Christophe Leroy (CS GROUP) 
Link: https://lore.kernel.org/r/20260708-qe-pic-gpios-v2-1-1972044cfbd1@bootlin.com
Signed-off-by: Christophe Leroy (CS GROUP)

soc: fsl: qe: implement get_direction()

2026-08-03T12:58:58+00:00

The lack of get_direction() callback in this driver causes GPIOLIB to
emit a warning. Implement it.

Fixes: e623c4303ed1 ("gpiolib: sanitize the return value of gpio_chip::get_direction()")
Reviewed-by: Bartosz Golaszewski 
Link: https://lore.kernel.org/r/30b3f278a10b46252783458c81dc438df176f86c.1785405882.git.chleroy@kernel.org
Signed-off-by: Christophe Leroy (CS GROUP)