linux.git/drivers/soc/amlogic, branch v5.13

soc: amlogic: meson-clk-measure: remove redundant dev_err call in meson_msr_probe()

2021-05-31T07:26:58+00:00

There is a error message within devm_ioremap_resource
already, so remove the dev_err call to avoid redundant
error message.

Reported-by: Hulk Robot 
Signed-off-by: Qiheng Lin 
Signed-off-by: Kevin Hilman 
Signed-off-by: Neil Armstrong 
Link: https://lore.kernel.org/r/20210409110243.41-1-linqiheng@huawei.com

soc: amlogic: replace devm_reset_control_array_get()

2020-12-01T00:23:11+00:00

devm_reset_control_array_get_exclusive() looks more readable

Signed-off-by: Yejune Deng 
Reviewed-by: Philipp Zabel 
Reviewed-by: Martin Blumenstingl 
Signed-off-by: Kevin Hilman 
Link: https://lore.kernel.org/r/1605667700-16681-1-git-send-email-yejune.deng@gmail.com

soc: amlogic: canvas: add missing put_device() call in meson_canvas_get()

2020-12-01T00:22:48+00:00

if of_find_device_by_node() succeed, meson_canvas_get() doesn't have
a corresponding put_device(). Thus add put_device() to fix the exception
handling for this function implementation.

Fixes: 382f8be04551 ("soc: amlogic: canvas: Fix meson_canvas_get when probe failed")
Signed-off-by: Yu Kuai 
Reviewed-by: Neil Armstrong 
Signed-off-by: Kevin Hilman 
Link: https://lore.kernel.org/r/20201117011322.522477-1-yukuai3@huawei.com

soc: meson: enable building drivers as modules

2020-10-26T18:33:43+00:00

Enable SoC drivers for 64-bit Amlogic SoCs to be built as modules.

Signed-off-by: Kevin Hilman

soc: amlogic: socinfo: build for specific arch

2020-10-26T18:33:27+00:00

The MX driver only supports 32-bit ARM SoCs and the GX driver only
supports 64-bit SoCs.  Only build for the right architecture.

Reviewed-by: Jerome Brunet 
Reviewed-by: Martin Blumenstingl 
Signed-off-by: Kevin Hilman

soc: amlogic: pm-domains: use always-on flag

2020-09-24T16:50:01+00:00

Rather than use a governor to keep these domains always-on, instead
use the flag GENPD_FLAG_ALWAYS_ON.  This has the same effect, but with
much lower overhead since the governor path is not used at all.

Signed-off-by: Kevin Hilman 
Acked-by: Neil Armstrong 
Signed-off-by: Kevin Hilman 
Link: https://lore.kernel.org/r/20200921222135.7145-1-khilman@baylibre.com

soc: amlogic: meson-ee-pwrc: add support for the Meson AXG SoCs

2020-09-18T20:22:14+00:00

The Power Controller in the Amlogic AXG SoCs is similar to the GXL one
but with less VPU memory domains to enable and a supplementary Audio
memory power domain.

Signed-off-by: Neil Armstrong 
Signed-off-by: Kevin Hilman 
Acked-by: Martin Blumenstingl 
Link: https://lore.kernel.org/r/20200917064702.1459-3-narmstrong@baylibre.com

soc: amlogic: meson-gx-socinfo: Fix S905X3 and S905D3 ID's

2020-06-29T23:00:53+00:00

Correct the SoC revision and package bits/mask values for S905D3/X3 to detect
a wider range of observed SoC IDs, and tweak sort order for A311D/S922X.

S905X3 05 0000 0101  (SEI610 initial devices)
S905X3 10 0001 0000  (ODROID-C4 and recent Android boxes)
S905X3 50 0101 0000  (SEI610 later revisions)
S905D3 04 0000 0100  (VIM3L devices in kernelci)
S905D3 b0 1011 0000  (VIM3L initial production)

Fixes commit c9cc9bec36d0 ("soc: amlogic: meson-gx-socinfo: Add SM1 and S905X3 IDs")

Suggested-by: Neil Armstrong 
Signed-off-by: Christian Hewitt 
Signed-off-by: Kevin Hilman 
Acked-by: Neil Armstrong 
Link: https://lore.kernel.org/r/20200609081318.28023-1-christianshewitt@gmail.com

soc: amlogic: meson-ee-pwrc: add support for the Meson GX SoCs

2020-05-19T23:02:14+00:00

Add support for the Meson GX SoCs to the meson-ee-pwrc driver.

The power domains on the GX SoCs are very similar to G12A. The only
known differences so far are:
- The GX SoCs do not have the HHI_VPU_MEM_PD_REG2 register (for the
  VPU power-domain)
- The GX SoCs have an additional reset line called "dvin"

Signed-off-by: Martin Blumenstingl 
Signed-off-by: Kevin Hilman 
Reviewed-by: Neil Armstrong 
Link: https://lore.kernel.org/r/20200515204709.1505498-5-martin.blumenstingl@googlemail.com

soc: amlogic: meson-ee-pwrc: add support for Meson8/Meson8b/Meson8m2

2020-05-19T23:02:14+00:00

This adds support for the power domains on Meson8/Meson8b/Meson8m2.
Meson8 doesn't use any reset lines while Meson8b and Meson8m2 use the
same set of reset lines (which is different from the newer SoCs).
Add dedicated compatible strings for Meson8, Meson8b and Meson8m2 to
support these differences.

Notable differences between Meson8 and G12A are:
- there is no HHI_VPU_MEM_PD_REG2 on the 32-bit SoCs
- the Meson8b datasheet describes an "audio DSP memory" power domain
  which is used for the hardware audio decoder
- the "amlogic,ao-sysctrl" only includes the power management related
  registers on the 32-bit SoCs, meaning the for example the
  AO_RTI_GEN_PWR_SLEEP0 register is at offset (0x2 << 2) rather than
  (0x3a << 2). As result of this (0x38 << 2) is subtracted from the
  register offsets, which is the start of the power management related
  registers.

Signed-off-by: Martin Blumenstingl 
Signed-off-by: Kevin Hilman 
Link: https://lore.kernel.org/r/20200515204709.1505498-4-martin.blumenstingl@googlemail.com