linux.git/drivers/rtc/Kconfig, branch vsnprintf Linux kernel source tree rtc: support for the Amlogic on-chip RTC 2024-11-12T14:05:31+00:00 Yiting Deng yiting.deng@amlogic.com 2024-11-12T03:10:15+00:00 c89ac9182ee297597f1c6971045382bae19c3f9d This is the third amlogic driver. The RTC hardware of A4 SoC is different from the previous one. This RTC hardware includes a timing function and an alarm function. But the existing has only timing function, alarm function is using the system clock to implement a virtual alarm. Add the RTC driver to support it. Signed-off-by: Yiting Deng <yiting.deng@amlogic.com> Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com> Link: https://lore.kernel.org/r/20241112-rtc-v6-2-a71b60d2f354@amlogic.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> 
This is the third amlogic driver. The RTC hardware of A4 SoC is different
from the previous one. This RTC hardware includes a timing function and
an alarm function. But the existing has only timing function, alarm
function is using the system clock to implement a virtual alarm. Add
the RTC driver to support it.

Signed-off-by: Yiting Deng <yiting.deng@amlogic.com>
Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com>
Link: https://lore.kernel.org/r/20241112-rtc-v6-2-a71b60d2f354@amlogic.com
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
rtc: add driver for Marvell 88PM886 PMIC RTC 2024-11-11T22:37:50+00:00 Karel Balej balejk@matfyz.cz 2024-10-12T19:31:39+00:00 82ee16cfb290ae259d1cd6658a6988b430258e94 RTC lives on the chip's base register page. Add the relevant register definitions and implement a basic set/read time functionality. Tested with the samsung,coreprimevelte smartphone which contains this PMIC and whose vendor kernel tree has also served as the sole reference for this. Signed-off-by: Karel Balej <balejk@matfyz.cz> Acked-by: Lee Jones <lee@kernel.org> Link: https://lore.kernel.org/r/20241012193345.18594-2-balejk@matfyz.cz Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> 
RTC lives on the chip's base register page. Add the relevant register
definitions and implement a basic set/read time functionality. Tested
with the samsung,coreprimevelte smartphone which contains this PMIC and
whose vendor kernel tree has also served as the sole reference for this.

Signed-off-by: Karel Balej <balejk@matfyz.cz>
Acked-by: Lee Jones <lee@kernel.org>
Link: https://lore.kernel.org/r/20241012193345.18594-2-balejk@matfyz.cz
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
rtc: pcf8563: Switch to regmap 2024-11-11T21:13:39+00:00 Nobuhiro Iwamatsu iwamatsu@nigauri.org 2024-10-10T08:49:49+00:00 00f1bb9b8486bc963211e6c8eae34a1e759efbd1 Switch the i2c_transfer methods to regmap APIs. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Link: https://lore.kernel.org/r/20241010084949.3351182-3-iwamatsu@nigauri.org Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> 
Switch the i2c_transfer methods to regmap APIs.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Link: https://lore.kernel.org/r/20241010084949.3351182-3-iwamatsu@nigauri.org
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
rtc: renesas-rtca3: Add driver for RTCA-3 available on Renesas RZ/G3S SoC 2024-10-31T23:16:17+00:00 Claudiu Beznea claudiu.beznea.uj@bp.renesas.com 2024-10-30T11:01:15+00:00 d4488377609e36cd9785533c29ccea4b86c292b9 The RTC IP (RTCA-3) available on the Renesas RZ/G3S SoC has calendar count mode and binary count mode (selectable though RCR2.CNTMD) capabilities, alarm capabilities, clock error correction capabilities. It can generate alarm, period, carry interrupts. Add a driver for RTCA-3 IP. The driver implements calendar count mode (as the conversion b/w RTC and system time is simpler, done with bcd2bin(), bin2bcd()), read and set time, read and set alarm, read and set an offset. Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Link: https://lore.kernel.org/r/20241030110120.332802-6-claudiu.beznea.uj@bp.renesas.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> 
The RTC IP (RTCA-3) available on the Renesas RZ/G3S SoC has calendar count
mode and binary count mode (selectable though RCR2.CNTMD) capabilities,
alarm capabilities, clock error correction capabilities. It can generate
alarm, period, carry interrupts.

Add a driver for RTCA-3 IP. The driver implements calendar count mode (as
the conversion b/w RTC and system time is simpler, done with bcd2bin(),
bin2bcd()), read and set time, read and set alarm, read and set
an offset.

Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Link: https://lore.kernel.org/r/20241030110120.332802-6-claudiu.beznea.uj@bp.renesas.com
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Merge tag 'rtc-6.12' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux 2024-09-25T21:38:37+00:00 Linus Torvalds torvalds@linux-foundation.org 2024-09-25T21:38:37+00:00 b2149f948c2d60880f94a68cc784eeefe1e78b77 Pull RTC updates from Alexandre Belloni: "More conversions of DT bindings to yaml. There is one new driver, for the DFRobot SD2405AL and support for important features of the stm32 RTC. Summary: New driver: - DFRobot SD2405AL Drivers: - stm32: add alarm A out and LSCO support - sun6i: disable automatic clock input switching - m48t59: set range" * tag 'rtc-6.12' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux: rtc: rc5t619: use proper module tables rtc: m48t59: set range dt-bindings: rtc: microcrystal,rv3028: add #clock-cells property rtc: m48t59: Remove division condition with direct comparison rtc: at91sam9: fix OF node leak in probe() error path rtc: sun6i: disable automatic clock input switching dt-bindings: rtc: Drop non-trivial duplicate compatibles dt-bindings: vendor-prefixes: Add DFRobot. dt-bindings: rtc: Add support for SD2405AL. rtc: Add driver for SD2405AL rtc: s35390a: Drop vendorless compatible string from match table rtc: twl: convert comma to semicolon dt-bindings: rtc: sprd,sc2731-rtc: convert to YAML rtc: stm32: add alarm A out feature rtc: stm32: add Low Speed Clock Output (LSCO) support rtc: stm32: add pinctrl and pinmux interfaces dt-bindings: rtc: stm32: describe pinmux nodes 
Pull RTC updates from Alexandre Belloni:
 "More conversions of DT bindings to yaml. There is one new driver, for
  the DFRobot SD2405AL and support for important features of the stm32
  RTC. Summary:

  New driver:
   - DFRobot SD2405AL

  Drivers:
   - stm32: add alarm A out and LSCO support
   - sun6i: disable automatic clock input switching
   - m48t59: set range"

* tag 'rtc-6.12' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux:
  rtc: rc5t619: use proper module tables
  rtc: m48t59: set range
  dt-bindings: rtc: microcrystal,rv3028: add #clock-cells property
  rtc: m48t59: Remove division condition with direct comparison
  rtc: at91sam9: fix OF node leak in probe() error path
  rtc: sun6i: disable automatic clock input switching
  dt-bindings: rtc: Drop non-trivial duplicate compatibles
  dt-bindings: vendor-prefixes: Add DFRobot.
  dt-bindings: rtc: Add support for SD2405AL.
  rtc: Add driver for SD2405AL
  rtc: s35390a: Drop vendorless compatible string from match table
  rtc: twl: convert comma to semicolon
  dt-bindings: rtc: sprd,sc2731-rtc: convert to YAML
  rtc: stm32: add alarm A out feature
  rtc: stm32: add Low Speed Clock Output (LSCO) support
  rtc: stm32: add pinctrl and pinmux interfaces
  dt-bindings: rtc: stm32: describe pinmux nodes
rtc: Add driver for SD2405AL 2024-09-11T22:33:24+00:00 Tóth János gomba007@gmail.com 2024-08-30T08:36:39+00:00 5af858acea22bc5d8a2ebddcad57babca1442dd1 Add support for the DFRobot SD2405AL I2C RTC Module. Datasheet: https://image.dfrobot.com/image/data/TOY0021/SD2405AL%20datasheet%20(Angelo%20v0.1).pdf Product: https://www.dfrobot.com/product-1600.html To instantiate (assuming device is connected to I2C-1) as root: echo sd2405al 0x32 > /sys/bus/i2c/devices/i2c-1/new_device as user: echo 'sd2405al 0x32' | sudo tee /sys/class/i2c-adapter/i2c-1/new_device The driver is tested with: + hwclock + tools/testing/selftests/rtc/setdate + tools/testing/selftests/rtc/rtctest Reviewed-by: Csókás Bence <csokas.bence@prolan.hu> Signed-off-by: Tóth János <gomba007@gmail.com> Link: https://lore.kernel.org/r/20240830-rtc-sd2405al-v7-1-2f7102621b1d@gmail.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> 
Add support for the DFRobot SD2405AL I2C RTC Module.

Datasheet:
	https://image.dfrobot.com/image/data/TOY0021/SD2405AL%20datasheet%20(Angelo%20v0.1).pdf

Product:
	https://www.dfrobot.com/product-1600.html

To instantiate (assuming device is connected to I2C-1)
as root:
	echo sd2405al 0x32 > /sys/bus/i2c/devices/i2c-1/new_device
as user:
	echo 'sd2405al 0x32' | sudo tee /sys/class/i2c-adapter/i2c-1/new_device

The driver is tested with:
	+ hwclock
	+ tools/testing/selftests/rtc/setdate
	+ tools/testing/selftests/rtc/rtctest

Reviewed-by: Csókás Bence <csokas.bence@prolan.hu>
Signed-off-by: Tóth János <gomba007@gmail.com>
Link: https://lore.kernel.org/r/20240830-rtc-sd2405al-v7-1-2f7102621b1d@gmail.com
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
rtc: support i.MX95 BBM RTC 2024-08-28T20:54:51+00:00 Peng Fan peng.fan@nxp.com 2024-08-23T09:05:22+00:00 3008598ef3b009252aaf2f5967df0b11d14258a6 The BBM module provides RTC feature. To i.MX95, this module is managed by System Manager and exported System Control Management Interface(SCMI). Linux could use i.MX SCMI BBM Extension protocol to use RTC feature. This driver is to use SCMI interface to get/set RTC. Reviewed-by: Cristian Marussi <cristian.marussi@arm.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Message-Id: <20240823-imx95-bbm-misc-v2-v8-6-e600ed9e9271@nxp.com> Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> 
The BBM module provides RTC feature. To i.MX95, this module is managed by
System Manager and exported System Control Management Interface(SCMI).
Linux could use i.MX SCMI BBM Extension protocol to use RTC feature.

This driver is to use SCMI interface to get/set RTC.

Reviewed-by: Cristian Marussi <cristian.marussi@arm.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Message-Id: <20240823-imx95-bbm-misc-v2-v8-6-e600ed9e9271@nxp.com>
Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
rtc: stm32: add Low Speed Clock Output (LSCO) support 2024-08-14T09:37:07+00:00 Valentin Caron valentin.caron@foss.st.com 2024-07-22T16:00:21+00:00 bb7b0df2be5c6b7bfe0cf9c93067c5b1489566ca RTC is able to output on a pin the "LSE" internal clock. STM32 RTC is now registered as a clock provider. It provides rtc_lsco clock, that means RTC_LSCO is output on either RTC_OUT1 or RTC_OUT2_RMP, depending on pinmux DT property. The clock is marked as CLK_IGNORE_UNUSED and CLK_IS_CRITICAL because RTC_LSCO can be early required by devices needed it to init. Add LSCO in pinmux functions. Add "stm32_rtc_clean_outs" to disable LSCO. As RTC is part of "backup" power domain, it is not reset during shutdown or reboot. So force LSCO disable at probe. Co-developed-by: Amelie Delaunay <amelie.delaunay@foss.st.com> Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com> Signed-off-by: Valentin Caron <valentin.caron@foss.st.com> Link: https://lore.kernel.org/r/20240722160022.454226-4-valentin.caron@foss.st.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> 
RTC is able to output on a pin the "LSE" internal clock.

STM32 RTC is now registered as a clock provider.
It provides rtc_lsco clock, that means RTC_LSCO is output on either
RTC_OUT1 or RTC_OUT2_RMP, depending on pinmux DT property.
The clock is marked as CLK_IGNORE_UNUSED and CLK_IS_CRITICAL because
RTC_LSCO can be early required by devices needed it to init.

Add LSCO in pinmux functions.

Add "stm32_rtc_clean_outs" to disable LSCO. As RTC is part of "backup"
power domain, it is not reset during shutdown or reboot. So force LSCO
disable at probe.

Co-developed-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
Signed-off-by: Valentin Caron <valentin.caron@foss.st.com>
Link: https://lore.kernel.org/r/20240722160022.454226-4-valentin.caron@foss.st.com
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
rtc: stm32: add pinctrl and pinmux interfaces 2024-08-14T09:37:07+00:00 Valentin Caron valentin.caron@foss.st.com 2024-07-22T16:00:20+00:00 16ad2bc09efbcb9cb24f8d879ac218421cbef690 STM32 RTC is capable to handle 3 specific pins of the soc. "out1, out2 and out2_rmp". To handle this, we use pinctrl framework. There is a single pin per group. Signed-off-by: Valentin Caron <valentin.caron@foss.st.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20240722160022.454226-3-valentin.caron@foss.st.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> 
STM32 RTC is capable to handle 3 specific pins of the soc.
"out1, out2 and out2_rmp". To handle this, we use pinctrl framework.
There is a single pin per group.

Signed-off-by: Valentin Caron <valentin.caron@foss.st.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20240722160022.454226-3-valentin.caron@foss.st.com
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
rtc: Add driver for Epson RX8111 2024-04-16T23:45:33+00:00 Waqar Hameed waqar.hameed@axis.com 2023-11-20T14:49:25+00:00 f8c81d15f4bb585f229a1f5f609a8544b89933ff Epson RX8111 is an RTC with alarm, timer and timestamp functionality. Add a basic driver with support for only reading/writing time (for now). Signed-off-by: Waqar Hameed <waqar.hameed@axis.com> Link: https://lore.kernel.org/r/0c3e1b03f276da47b26ac50f5d0ddf5c67aabe5c.1700491765.git.waqar.hameed@axis.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> 
Epson RX8111 is an RTC with alarm, timer and timestamp functionality.
Add a basic driver with support for only reading/writing time (for now).

Signed-off-by: Waqar Hameed <waqar.hameed@axis.com>
Link: https://lore.kernel.org/r/0c3e1b03f276da47b26ac50f5d0ddf5c67aabe5c.1700491765.git.waqar.hameed@axis.com
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>