<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux.git/drivers/pinctrl, branch v5.4-rc6</title>
<subtitle>Linux kernel source tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/'/>
<entry>
<title>pinctrl: aspeed-g6: Rename SD3 to EMMC and rework pin groups</title>
<updated>2019-10-16T13:58:27+00:00</updated>
<author>
<name>Johnny Huang</name>
<email>johnny_huang@aspeedtech.com</email>
</author>
<published>2019-10-08T04:41:53+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=d6e7a1a5119c4e719b0d63651f09762d7384bfed'/>
<id>d6e7a1a5119c4e719b0d63651f09762d7384bfed</id>
<content type='text'>
AST2600 EMMC support 3 types DAT bus sizes (1, 4 and 8-bit),
corresponding to 3 groups: EMMCG1, EMMCG4 and EMMCG8

Fixes: 58dc52ad00a0 ("pinctrl: aspeed: Add AST2600 pinmux support")
Signed-off-by: Johnny Huang &lt;johnny_huang@aspeedtech.com&gt;
Signed-off-by: Andrew Jeffery &lt;andrew@aj.id.au&gt;
Link: https://lore.kernel.org/r/20191008044153.12734-8-andrew@aj.id.au
Reviewed-by: Joel Stanley &lt;joel@jms.id.au&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
AST2600 EMMC support 3 types DAT bus sizes (1, 4 and 8-bit),
corresponding to 3 groups: EMMCG1, EMMCG4 and EMMCG8

Fixes: 58dc52ad00a0 ("pinctrl: aspeed: Add AST2600 pinmux support")
Signed-off-by: Johnny Huang &lt;johnny_huang@aspeedtech.com&gt;
Signed-off-by: Andrew Jeffery &lt;andrew@aj.id.au&gt;
Link: https://lore.kernel.org/r/20191008044153.12734-8-andrew@aj.id.au
Reviewed-by: Joel Stanley &lt;joel@jms.id.au&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pinctrl: aspeed-g6: Fix UART13 group pinmux</title>
<updated>2019-10-16T13:58:15+00:00</updated>
<author>
<name>Johnny Huang</name>
<email>johnny_huang@aspeedtech.com</email>
</author>
<published>2019-10-08T04:41:52+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=1550583432535dccaf1956c1d58e2866eacd173e'/>
<id>1550583432535dccaf1956c1d58e2866eacd173e</id>
<content type='text'>
When UART13G1 is set the pinmux configuration in SCU4B8 for UART13G0
should be cleared.

Fixes: 58dc52ad00a0 ("pinctrl: aspeed: Add AST2600 pinmux support")
Signed-off-by: Johnny Huang &lt;johnny_huang@aspeedtech.com&gt;
[AJ: Tweak commit message]
Signed-off-by: Andrew Jeffery &lt;andrew@aj.id.au&gt;
Link: https://lore.kernel.org/r/20191008044153.12734-7-andrew@aj.id.au
Reviewed-by: Joel Stanley &lt;joel@jms.id.au&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
When UART13G1 is set the pinmux configuration in SCU4B8 for UART13G0
should be cleared.

Fixes: 58dc52ad00a0 ("pinctrl: aspeed: Add AST2600 pinmux support")
Signed-off-by: Johnny Huang &lt;johnny_huang@aspeedtech.com&gt;
[AJ: Tweak commit message]
Signed-off-by: Andrew Jeffery &lt;andrew@aj.id.au&gt;
Link: https://lore.kernel.org/r/20191008044153.12734-7-andrew@aj.id.au
Reviewed-by: Joel Stanley &lt;joel@jms.id.au&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pinctrl: aspeed-g6: Make SIG_DESC_CLEAR() behave intuitively</title>
<updated>2019-10-16T13:58:09+00:00</updated>
<author>
<name>Andrew Jeffery</name>
<email>andrew@aj.id.au</email>
</author>
<published>2019-10-08T04:41:51+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=c136d4c71f755a189fe13a0cd4f3e8f538dda567'/>
<id>c136d4c71f755a189fe13a0cd4f3e8f538dda567</id>
<content type='text'>
Signal descriptors can represent multi-bit bitfields and so have
explicit "enable" and "disable" states. However many descriptor
instances only describe a single bit, and so the SIG_DESC_SET() macro is
provides an abstraction for the single-bit cases: Its expansion
configures the "enable" state to set the bit and "disable" to clear.

SIG_DESC_CLEAR() was introduced to provide a similar single-bit
abstraction for for descriptors to clear the bit of interest. However
its behaviour was defined as the literal inverse of SIG_DESC_SET() - the
impact is the bit of interest is set in the disable path. This behaviour
isn't intuitive and doesn't align with how we want to use the macro in
practice, so make it clear the bit for both the enable and disable
paths.

Signed-off-by: Andrew Jeffery &lt;andrew@aj.id.au&gt;
Link: https://lore.kernel.org/r/20191008044153.12734-6-andrew@aj.id.au
Reviewed-by: Joel Stanley &lt;joel@jms.id.au&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Signal descriptors can represent multi-bit bitfields and so have
explicit "enable" and "disable" states. However many descriptor
instances only describe a single bit, and so the SIG_DESC_SET() macro is
provides an abstraction for the single-bit cases: Its expansion
configures the "enable" state to set the bit and "disable" to clear.

SIG_DESC_CLEAR() was introduced to provide a similar single-bit
abstraction for for descriptors to clear the bit of interest. However
its behaviour was defined as the literal inverse of SIG_DESC_SET() - the
impact is the bit of interest is set in the disable path. This behaviour
isn't intuitive and doesn't align with how we want to use the macro in
practice, so make it clear the bit for both the enable and disable
paths.

Signed-off-by: Andrew Jeffery &lt;andrew@aj.id.au&gt;
Link: https://lore.kernel.org/r/20191008044153.12734-6-andrew@aj.id.au
Reviewed-by: Joel Stanley &lt;joel@jms.id.au&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pinctrl: aspeed-g6: Fix I3C3/I3C4 pinmux configuration</title>
<updated>2019-10-16T13:57:49+00:00</updated>
<author>
<name>Johnny Huang</name>
<email>johnny_huang@aspeedtech.com</email>
</author>
<published>2019-10-08T04:41:50+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=9979346f5560956daf2a73da854e88d60a5309cf'/>
<id>9979346f5560956daf2a73da854e88d60a5309cf</id>
<content type='text'>
The documentation to configure I3C3/FSI1 and I3C4/FSI2 was initially
unclear.

Fixes: 58dc52ad00a0 ("pinctrl: aspeed: Add AST2600 pinmux support")
Signed-off-by: Johnny Huang &lt;johnny_huang@aspeedtech.com&gt;
[AJ: Tweak commit message, resolve rebase conflicts]
Signed-off-by: Andrew Jeffery &lt;andrew@aj.id.au&gt;
Link: https://lore.kernel.org/r/20191008044153.12734-5-andrew@aj.id.au
Reviewed-by: Joel Stanley &lt;joel@jms.id.au&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The documentation to configure I3C3/FSI1 and I3C4/FSI2 was initially
unclear.

Fixes: 58dc52ad00a0 ("pinctrl: aspeed: Add AST2600 pinmux support")
Signed-off-by: Johnny Huang &lt;johnny_huang@aspeedtech.com&gt;
[AJ: Tweak commit message, resolve rebase conflicts]
Signed-off-by: Andrew Jeffery &lt;andrew@aj.id.au&gt;
Link: https://lore.kernel.org/r/20191008044153.12734-5-andrew@aj.id.au
Reviewed-by: Joel Stanley &lt;joel@jms.id.au&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pinctrl: aspeed-g6: Fix I2C14 SDA description</title>
<updated>2019-10-16T13:57:42+00:00</updated>
<author>
<name>Andrew Jeffery</name>
<email>andrew@aj.id.au</email>
</author>
<published>2019-10-08T04:41:49+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=b178f91f449caec552e66d9842dcc2090a2e0987'/>
<id>b178f91f449caec552e66d9842dcc2090a2e0987</id>
<content type='text'>
The I2C function the pin participated in was incorrectly named SDA14
which lead to a failure to mux:

[    6.884344] No function I2C14 found on pin 7 (7). Found signal(s) MACLINK4, SDA14, GPIOA7 for function(s) MACLINK4, SDA14, GPIOA7

Fixes: 58dc52ad00a0 ("pinctrl: aspeed: Add AST2600 pinmux support")
Signed-off-by: Andrew Jeffery &lt;andrew@aj.id.au&gt;
Link: https://lore.kernel.org/r/20191008044153.12734-4-andrew@aj.id.au
Reviewed-by: Joel Stanley &lt;joel@jms.id.au&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The I2C function the pin participated in was incorrectly named SDA14
which lead to a failure to mux:

[    6.884344] No function I2C14 found on pin 7 (7). Found signal(s) MACLINK4, SDA14, GPIOA7 for function(s) MACLINK4, SDA14, GPIOA7

Fixes: 58dc52ad00a0 ("pinctrl: aspeed: Add AST2600 pinmux support")
Signed-off-by: Andrew Jeffery &lt;andrew@aj.id.au&gt;
Link: https://lore.kernel.org/r/20191008044153.12734-4-andrew@aj.id.au
Reviewed-by: Joel Stanley &lt;joel@jms.id.au&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pinctrl: aspeed-g6: Sort pins for sanity</title>
<updated>2019-10-16T13:57:25+00:00</updated>
<author>
<name>Andrew Jeffery</name>
<email>andrew@aj.id.au</email>
</author>
<published>2019-10-08T04:41:48+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=377dfcdcc0469b6b38f7943de63a13132b066679'/>
<id>377dfcdcc0469b6b38f7943de63a13132b066679</id>
<content type='text'>
Some pins crept in that weren't ordered in the list.

Signed-off-by: Andrew Jeffery &lt;andrew@aj.id.au&gt;
Link: https://lore.kernel.org/r/20191008044153.12734-3-andrew@aj.id.au
Reviewed-by: Joel Stanley &lt;joel@jms.id.au&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Some pins crept in that weren't ordered in the list.

Signed-off-by: Andrew Jeffery &lt;andrew@aj.id.au&gt;
Link: https://lore.kernel.org/r/20191008044153.12734-3-andrew@aj.id.au
Reviewed-by: Joel Stanley &lt;joel@jms.id.au&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pinctrl: berlin: as370: fix a typo s/spififib/spdifib</title>
<updated>2019-10-16T12:12:55+00:00</updated>
<author>
<name>Jisheng Zhang</name>
<email>Jisheng.Zhang@synaptics.com</email>
</author>
<published>2019-10-11T07:55:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=8f1c9dffe30b04219690f8e94a27b2ab977a66f2'/>
<id>8f1c9dffe30b04219690f8e94a27b2ab977a66f2</id>
<content type='text'>
The function should be spdifib, fix this typo.

Fixes: 423ddc580b13 ("pinctrl: berlin: add the as370 SoC pinctrl driver")
Signed-off-by: Jisheng Zhang &lt;Jisheng.Zhang@synaptics.com&gt;
Link: https://lore.kernel.org/r/20191011154321.44f08f9a@xhacker.debian
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The function should be spdifib, fix this typo.

Fixes: 423ddc580b13 ("pinctrl: berlin: add the as370 SoC pinctrl driver")
Signed-off-by: Jisheng Zhang &lt;Jisheng.Zhang@synaptics.com&gt;
Link: https://lore.kernel.org/r/20191011154321.44f08f9a@xhacker.debian
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'intel-pinctrl-fixes-v5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/intel into fixes</title>
<updated>2019-10-10T23:22:57+00:00</updated>
<author>
<name>Linus Walleij</name>
<email>linus.walleij@linaro.org</email>
</author>
<published>2019-10-10T23:22:57+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=d2fe76dddaac1b15e06dc1f780e45f9e770d652d'/>
<id>d2fe76dddaac1b15e06dc1f780e45f9e770d652d</id>
<content type='text'>
intel-pinctrl fixes for v5.4

This includes two fixes for Intel pinctrl drivers:

  - Fix warning about shared irqchip
  - Restore Strago DMI workaround for all versions
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
intel-pinctrl fixes for v5.4

This includes two fixes for Intel pinctrl drivers:

  - Fix warning about shared irqchip
  - Restore Strago DMI workaround for all versions
</pre>
</div>
</content>
</entry>
<entry>
<title>pinctrl: armada-37xx: swap polarity on LED group</title>
<updated>2019-10-09T08:00:58+00:00</updated>
<author>
<name>Patrick Williams</name>
<email>alpawi@amazon.com</email>
</author>
<published>2019-10-01T15:51:38+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=b835d6953009dc350d61402a854b5a7178d8c615'/>
<id>b835d6953009dc350d61402a854b5a7178d8c615</id>
<content type='text'>
The configuration registers for the LED group have inverted
polarity, which puts the GPIO into open-drain state when used in
GPIO mode.  Switch to '0' for GPIO and '1' for LED modes.

Fixes: 87466ccd9401 ("pinctrl: armada-37xx: Add pin controller support for Armada 37xx")
Signed-off-by: Patrick Williams &lt;alpawi@amazon.com&gt;
Cc: &lt;stable@vger.kernel.org&gt;
Link: https://lore.kernel.org/r/20191001155154.99710-1-alpawi@amazon.com
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The configuration registers for the LED group have inverted
polarity, which puts the GPIO into open-drain state when used in
GPIO mode.  Switch to '0' for GPIO and '1' for LED modes.

Fixes: 87466ccd9401 ("pinctrl: armada-37xx: Add pin controller support for Armada 37xx")
Signed-off-by: Patrick Williams &lt;alpawi@amazon.com&gt;
Cc: &lt;stable@vger.kernel.org&gt;
Link: https://lore.kernel.org/r/20191001155154.99710-1-alpawi@amazon.com
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pinctrl: stmfx: fix null pointer on remove</title>
<updated>2019-10-05T16:39:09+00:00</updated>
<author>
<name>Amelie Delaunay</name>
<email>amelie.delaunay@st.com</email>
</author>
<published>2019-10-04T12:23:42+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=2fd215b8fdbe4d3a609adbe3a323696393cb1e53'/>
<id>2fd215b8fdbe4d3a609adbe3a323696393cb1e53</id>
<content type='text'>
dev_get_platdata(&amp;pdev-&gt;dev) returns a pointer on struct stmfx_pinctrl,
not on struct stmfx (platform_set_drvdata(pdev, pctl); in probe).
Pointer on struct stmfx is stored in driver data of pdev parent (in probe:
struct stmfx *stmfx = dev_get_drvdata(pdev-&gt;dev.parent);).

Fixes: 1490d9f841b1 ("pinctrl: Add STMFX GPIO expander Pinctrl/GPIO driver")
Signed-off-by: Amelie Delaunay &lt;amelie.delaunay@st.com&gt;
Link: https://lore.kernel.org/r/20191004122342.22018-1-amelie.delaunay@st.com
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
dev_get_platdata(&amp;pdev-&gt;dev) returns a pointer on struct stmfx_pinctrl,
not on struct stmfx (platform_set_drvdata(pdev, pctl); in probe).
Pointer on struct stmfx is stored in driver data of pdev parent (in probe:
struct stmfx *stmfx = dev_get_drvdata(pdev-&gt;dev.parent);).

Fixes: 1490d9f841b1 ("pinctrl: Add STMFX GPIO expander Pinctrl/GPIO driver")
Signed-off-by: Amelie Delaunay &lt;amelie.delaunay@st.com&gt;
Link: https://lore.kernel.org/r/20191004122342.22018-1-amelie.delaunay@st.com
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</pre>
</div>
</content>
</entry>
</feed>
