Pull pin control updates from Linus Walleij:
 "This is the bulk of pin control changes for the v5.4 kernel cycle:

  Core changes:

   - Fix errors in example code in the documentation.

  New drivers:

   - Add support for JZ4760, JZ4760B, X1000, X1000E and X1500 to the
     Ingenic driver.

   - Support Cirrus Logic Madera CS47L92 and CS47L15.

   - Support Allwinner Sunxi V3S.

   - Support Aspeed 2600 BMC.

   - Support Qualcomm SC7180.

   - Support Marvell MVEBU CS115.

  Driver improvements:

   - Clean up a few drivers to use the devm_platform_ioremap_resource()
     helper.

   - Pass the irqchip when registering the gpio_chip in some pin
     controllers that are also GPIO controllers.

   - Support suspend/resume in the Tegra driver.

   - Support pull-up on the Broadcom BCM2711.

   - The Intel driver can now request locked pads.

   - Fix the UFS reset pin in the Qualcomm SDM845 driver"

* tag 'pinctrl-v5.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (112 commits)
  pinctrl: meson-gxbb: Fix wrong pinning definition for uart_c
  pinctrl: sh-pfc: Unlock on error in sh_pfc_func_set_mux()
  pinctrl: bcm: remove redundant assignment to pointer log
  pinctrl: iproc: Add 'get_direction' support
  pinctrl: iproc-gpio: Handle interrupts for multiple instances
  pinctrl: iproc-gpio: Fix incorrect pinconf configurations
  pinctrl: intel: mark intel_pin_to_gpio __maybe_unused
  pinctrl: qcom: sdm845: Fix UFS_RESET pin
  pinctrl: mvebu: add additional variant for standalone CP115
  pinctrl: mvebu: Add CP110 missing pin functionality
  dt-bindings: cp110: document the new CP115 pinctrl compatible
  pinctrl: bcm2835: Pass irqchip when adding gpiochip
  pinctrl: meson: meson: Add of_node_put() before return
  pinctrl/gpio: Take MUX usage into account
  dt-bindings: pinctrl: qcom-pmic-gpio: Add pm8150l support
  dt-bindings: pinctrl: qcom-pmic-gpio: Add pm8150b support
  dt-bindings: pinctrl: qcom-pmic-gpio: Add pm8150 support
  pinctrl: amd: disable spurious-firing GPIO IRQs
  pinctrl: rza2: Include the appropriate headers
  pinctrl: rza2: Drop driver use of consumer flags
  ...

Pull GPIO updates from Linus Walleij:
 "This is the bulk of changes in the GPIO subsystem for the v5.4 kernel
  cycle.

  Core changes:

   - Support hierarchical GPIO irqchips.

     We now have three consumers that can use this: Intel IXP4xx,
     ThunderX and Qualcomm SPMI GPIO (in the pinctrl subsystem).

     The support code has been long in the making and hashed out so it
     should be easily adaptable for all hierarchical irqchip parents.
     The code only gets compiled in if hierarchical irqchip is used at
     the topmost irq controller at least, as the hierarchical irqchip
     requires strict hierarchy all the way up in the system.

   - Determine the need for a "valid_mask" for GPIO lines on the
     gpio_chip and conversely for the "valid_mask" for the GPIO
     interrupt chip interrupt lines by looking for a .init_valid_mask()
     callback in the main chip or GPIO interrupt chip respectively.
     Allocate it with bitmap_alloc().

   - Isolate the device tree/open firmware GPIO description code out in
     its own file properly.

   - Isolate the ACPI GPIO description code out in its own file
     properly.

   - Drop a whole lot of #ifdef:s in the main includes: it does not hurt
     to keep the include items around, and we get quicker and clearer
     compile failures if the appropriate kernel symbols are not selected
     for drivers.

  New/deleted drivers:

   - New driver for Aspeed SGPIO.

   - The KS8695 driver is deleted as the platform gets deleted from
     arch/arm in this kernel cycle.

   - The Cirrus Logic Madera driver now supports CS47L92 and CS47L15.

   - The Freescale MPC8xxx now supports LS1028A and LS1088A.

  Driver improvements:

   - We pass the GPIO irqchip intialization by directly filling in the
     struct instead of using set-up functions (the new way) for Intel
     MID, Lynxpoint, Merrifield, XLP, HLWD, Aspeed, ZX, VF610, TQMX86,
     MT7621, Zynq and EP93xx.

  Out-of-band changes:

   - Fix a GPIO header inclusion in Unicore - no response from
     maintainer.

   - Drop FMC subsystem from MAINTAINERS - was deleted in the GPIO tree
     last cycle so let's mop up the shards"

* tag 'gpio-v5.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (82 commits)
  gpiolib: of: add a fallback for wlf,reset GPIO name
  gpio: htc-egpio: Remove unused exported htc_egpio_get_wakeup_irq()
  gpio: remove explicit comparison with 0
  gpio: creg-snps: use devm_platform_ioremap_resource() to simplify code
  gpio: devres: Switch to EXPORT_SYMBOL_GPL()
  gpio: of: Switch to EXPORT_SYMBOL_GPL()
  gpio: of: Make of_gpio_simple_xlate() private
  gpio: of: Make of_get_named_gpiod_flags() private
  gpio: aspeed: Add in ast2600 details to Aspeed driver
  gpio: aspeed: Use ngpio property from device tree if available
  gpio: aspeed: Setup irqchip dynamically
  gpio/aspeed: Fix incorrect number of banks
  gpio: aspeed: Update documentation with ast2600 controllers
  gpio: Initialize the irqchip valid_mask with a callback
  gpiolib: acpi: make acpi_can_fallback_to_crs() static
  gpio: Fix further merge errors
  gpio: Fix up merge collision in include file
  gpio: of: Normalize return code variable name
  gpio: gpiolib: Normalize return code variable name
  gpio: ep93xx: Pass irqchip when adding gpiochip
  ...

Hi i tried to use the uart_C of the the odroid-c2.

I enabled it in the dts file. During boot it crashed when the
the sdcard slot is addressed.

After long search in the net i found this:

https://forum.odroid.com/viewtopic.php?f=139&t=25371&p=194370&hilit=uart_C#p177856

After changing the pin definitions accordingly erverything works.
Uart_c is functioning and sdcard ist working.

Fixes: 6db0f3a8a04e46 ("pinctrl: amlogic: gxbb: add more UART pins")
Signed-off-by: Otto Meier <gf435@gmx.net>
Link: https://lore.kernel.org/r/1cc32a18-464d-5531-7a1c-084390e2ecb1@gmx.net
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

We need to unlock and enable IRQs before we return on this error path.

Fixes: 8a0cc47ccc7c ("pinctrl: sh-pfc: Rollback to mux if required when the gpio is freed")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Link: https://lore.kernel.org/r/20190827093927.GB8443@mwanda
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

intel-pinctrl for v5.4 part 2

Just a single fix for build warning introduced in the previous pull.

The pointer log is being initialized with a value that is never read
and is being re-assigned a little later on. The assignment is
redundant and hence can be removed.

Addresses-Coverity: ("Unused value")
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Link: https://lore.kernel.org/r/20190905140919.29283-1-colin.king@canonical.com
Reviewed-by: Ray Jui <ray.jui@broadcom.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

Add 'get_direction' support to the iProc GPIO driver.

Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Link: https://lore.kernel.org/r/1568178685-30738-1-git-send-email-rayagonda.kokatanur@broadcom.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

Commit 674fa8daa8c9 ("pinctrl: aspeed-g5: Delay acquisition of regmaps")
was determined to be a partial fix to the problem of acquiring the LPC
Host Controller and GFX regmaps: The AST2500 pin controller may need to
fetch syscon regmaps during expression evaluation as well as when
setting mux state. For example, this case is hit by attempting to export
pins exposing the LPC Host Controller as GPIOs.

An optional eval() hook is added to the Aspeed pinmux operation struct
and called from aspeed_sig_expr_eval() if the pointer is set by the
SoC-specific driver. This enables the AST2500 to perform the custom
action of acquiring its regmap dependencies as required.

John Wang tested the fix on an Inspur FP5280G2 machine (AST2500-based)
where the issue was found, and I've booted the fix on Witherspoon
(AST2500) and Palmetto (AST2400) machines, and poked at relevant pins
under QEMU by forcing mux configurations via devmem before exporting
GPIOs to exercise the driver.

Fixes: 7d29ed88acbb ("pinctrl: aspeed: Read and write bits in LPC and GFX controllers")
Fixes: 674fa8daa8c9 ("pinctrl: aspeed-g5: Delay acquisition of regmaps")
Reported-by: John Wang <wangzqbj@inspur.com>
Tested-by: John Wang <wangzqbj@inspur.com>
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>

Link: https://lore.kernel.org/r/20190829071738.2523-1-andrew@aj.id.au
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

When multiple instance of iproc-gpio chips are present, a fix up
message[1] is printed during the probe of second and later instances.

This issue is because driver sharing same irq_chip data structure
among multiple instances of driver.

Fix this by allocating irq_chip data structure per instance of
iproc-gpio.

[1] fix up message addressed by this patch
[  7.862208] gpio gpiochip2: (689d0000.gpio): detected irqchip that
   is shared with multiple gpiochips: please fix the driver.

Fixes: 616043d58a89 ("pinctrl: Rename gpio driver from cygnus to iproc")
Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Link: https://lore.kernel.org/r/1567054348-19685-3-git-send-email-srinath.mannam@broadcom.com
[Rebased on top of new irq chip set-up code]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

Fix drive strength for AON/CRMU controller; fix pull-up/down setting
for CCM/CDRU controller.

Fixes: 616043d58a89 ("pinctrl: Rename gpio driver from cygnus to iproc")
Signed-off-by: Li Jin <li.jin@broadcom.com>
Link: https://lore.kernel.org/r/1567054348-19685-2-git-send-email-srinath.mannam@broadcom.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>