linux.git/drivers/pinctrl, branch v5.16-rc4

pinctrl: qcom: sm8350: Correct UFS and SDC offsets

2021-11-16T01:19:15+00:00

The downstream TLMM binding covers a group of TLMM-related hardware
blocks, but the upstream binding only captures the particular block
related to controlling the TLMM pins from an OS. In the translation of
the driver from downstream, the offset of 0x100000 was lost for the UFS
and SDC pingroups.

Fixes: d5d348a3271f ("pinctrl: qcom: Add SM8350 pinctrl driver")
Signed-off-by: Bjorn Andersson 
Reviewed-by: Vinod Koul 
Reviewed-by: Vladimir Zapolskiy 
Link: https://lore.kernel.org/r/20211104170835.1993686-1-bjorn.andersson@linaro.org
Signed-off-by: Linus Walleij

pinctrl: tegra194: remove duplicate initializer again

2021-11-16T01:19:15+00:00

An earlier bugfix removed a duplicate field initializer in
a macro, but it seems that this came back with the following
update:

drivers/pinctrl/tegra/pinctrl-tegra194.c:1341:28: error: initialized field overwritten [-Werror=override-init]
 1341 |                 .drv_reg = ((r)),                               \
      |                            ^
drivers/pinctrl/tegra/pinctrl-tegra194.c:1392:41: note: in expansion of macro 'DRV_PINGROUP_ENTRY_Y'
 1392 | #define drive_touch_clk_pcc4            DRV_PINGROUP_ENTRY_Y(0x2004,    12,     5,      20,     5,      -1,     -1,     -1,     -1,     1)
      |                                         ^~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/tegra/pinctrl-tegra194.c:1631:17: note: in expansion of macro 'drive_touch_clk_pcc4'
 1631 |                 drive_##pg_name,                                \
      |                 ^~~~~~
drivers/pinctrl/tegra/pinctrl-tegra194.c:1636:9: note: in expansion of macro 'PINGROUP'
 1636 |         PINGROUP(touch_clk_pcc4,        GP,             TOUCH,          RSVD2,          RSVD3,          0x2000,         1,      Y,      -1,     -1,     6,      8,      -1,     10,     11,     12,     N,      -1,     -1,     N,      "vddio_ao"),
      |         ^~~~~~~~
drivers/pinctrl/tegra/pinctrl-tegra194.c:1341:28: note: (near initialization for 'tegra194_groups[0].drv_reg')
 1341 |                 .drv_reg = ((r)),                               \
      |                            ^
drivers/pinctrl/tegra/pinctrl-tegra194.c:1392:41: note: in expansion of macro 'DRV_PINGROUP_ENTRY_Y'
 1392 | #define drive_touch_clk_pcc4            DRV_PINGROUP_ENTRY_Y(0x2004,    12,     5,      20,     5,      -1,     -1,     -1,     -1,     1)
      |                                         ^~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/tegra/pinctrl-tegra194.c:1631:17: note: in expansion of macro 'drive_touch_clk_pcc4'
 1631 |                 drive_##pg_name,                                \
      |                 ^~~~~~
drivers/pinctrl/tegra/pinctrl-tegra194.c:1636:9: note: in expansion of macro 'PINGROUP'
 1636 |         PINGROUP(touch_clk_pcc4,        GP,             TOUCH,          RSVD2,          RSVD3,          0x2000,         1,      Y,      -1,     -1,     6,      8,      -1,     10,     11,     12,     N,      -1,     -1,     N,      "vddio_ao"),
      |         ^~~~~~~~

Remove it again.

Fixes: 613c0826081b ("pinctrl: tegra: Add pinmux support for Tegra194")
Fixes: 92cadf68e50a ("pinctrl: tegra: pinctrl-tegra194: Do not initialise field twice")
Signed-off-by: Arnd Bergmann 
Link: https://lore.kernel.org/r/20211104133645.1186968-1-arnd@kernel.org
Signed-off-by: Linus Walleij

pinctrl: qcom: sdm845: Enable dual edge errata

2021-11-16T01:19:15+00:00

It has been observed that dual edge triggered wakeirq GPIOs on SDM845
doesn't trigger interrupts on the falling edge.

Enabling wakeirq_dual_edge_errata for SDM845 indicates that the PDC in
SDM845 suffers from the same problem described, and worked around, by
Doug in 'c3c0c2e18d94 ("pinctrl: qcom: Handle broken/missing PDC dual
edge IRQs on sc7180")', so enable the workaround for SDM845 as well.

The specific problem seen without this is that gpio-keys does not detect
the falling edge of the LID gpio on the Lenovo Yoga C630 and as such
consistently reports the LID as closed.

Fixes: e35a6ae0eb3a ("pinctrl/msm: Setup GPIO chip in hierarchy")
Signed-off-by: Bjorn Andersson 
Tested-By: Steev Klimaszewski 
Reviewed-by: Douglas Anderson 
Reviewed-by: Stephen Boyd 
Link: https://lore.kernel.org/r/20211102034115.1946036-1-bjorn.andersson@linaro.org
Signed-off-by: Linus Walleij

pinctrl: apple: Always return valid type in apple_gpio_irq_type

2021-11-16T01:19:15+00:00

apple_gpio_irq_type can possibly return -EINVAL which triggers the
following compile error with gcc 9 because the type no longer fits
into the mask.

  drivers/pinctrl/pinctrl-apple-gpio.c: In function 'apple_gpio_irq_set_type':
  ././include/linux/compiler_types.h:335:38: error: call to '__compiletime_assert_289' declared with attribute error: FIELD_PREP: value too large for the field
    335 |  _compiletime_assert(condition, msg, __compiletime_assert_, __COUNTER__)
        |                                      ^
  [...]
  drivers/pinctrl/pinctrl-apple-gpio.c:294:7: note: in expansion of macro 'FIELD_PREP'
    294 |       FIELD_PREP(REG_GPIOx_MODE, irqtype));
        |       ^~~~~~~~~~

Fix this by making the return value always valid and instead checking
for REG_GPIOx_IN_IRQ_OFF in apple_gpio_irq_set_type and return -EINVAL
from there.

Fixes: a0f160ffcb83 ("pinctrl: add pinctrl/GPIO driver for Apple SoCs")
Signed-off-by: Sven Peter 
Reviewed-by: Joey Gouly 
Link: https://lore.kernel.org/r/20211101150640.46553-1-sven@svenpeter.dev
Signed-off-by: Linus Walleij

pinctrl: ralink: include 'ralink_regs.h' in 'pinctrl-mt7620.c'

2021-11-16T01:19:14+00:00

mt7620.h, included by pinctrl-mt7620.c, mentions MT762X_SOC_MT7628AN
declared in ralink_regs.h.

Fixes: 745ec436de72 ("pinctrl: ralink: move MT7620 SoC pinmux config into a new 'pinctrl-mt7620.c' file")
Cc: stable@vger.kernel.org
Signed-off-by: Luiz Angelo Daros de Luca 
Signed-off-by: Sergio Paracuellos 
Link: https://lore.kernel.org/r/20211031064046.13533-1-sergio.paracuellos@gmail.com
Signed-off-by: Linus Walleij

pinctrl: qcom: fix unmet dependencies on GPIOLIB for GPIOLIB_IRQCHIP

2021-11-16T01:19:14+00:00

When PINCTRL_QCOM_SPMI_PMIC or PINCTRL_QCOM_SSBI_PMIC
is selected, and GPIOLIB is not selected, Kbuild
gives the following warnings:

WARNING: unmet direct dependencies detected for GPIOLIB_IRQCHIP
  Depends on [n]: GPIOLIB [=n]
  Selected by [y]:
  - PINCTRL_QCOM_SPMI_PMIC [=y] && PINCTRL [=y] && (ARCH_QCOM [=n] || COMPILE_TEST [=y]) && OF [=y] && SPMI [=y]

WARNING: unmet direct dependencies detected for GPIOLIB_IRQCHIP
  Depends on [n]: GPIOLIB [=n]
  Selected by [y]:
  - PINCTRL_QCOM_SSBI_PMIC [=y] && PINCTRL [=y] && (ARCH_QCOM [=n] || COMPILE_TEST [=y]) && OF [=y]

This is because these config options enable GPIOLIB_IRQCHIP
without selecting or depending on GPIOLIB, despite
GPIOLIB_IRQCHIP depending on GPIOLIB.

These unmet dependency bugs were detected by Kismet,
a static analysis tool for Kconfig. Please advise if this
is not the appropriate solution.

Signed-off-by: Julian Braha 
Link: https://lore.kernel.org/r/20211029004610.35131-1-julianbraha@gmail.com
Signed-off-by: Linus Walleij

pinctrl: tegra: Return const pointer from tegra_pinctrl_get_group()

2021-11-16T01:19:14+00:00

Instead of returning const pointer from tegra_pinctrl_get_group()
the return value is being casted.

This change helps return const pointer.

Signed-off-by: Prathamesh Shete 
Signed-off-by: Linus Walleij

pinctrl: amd: Fix wakeups when IRQ is shared with SCI

2021-11-16T01:19:14+00:00

On some Lenovo AMD Gen2 platforms the IRQ for the SCI and pinctrl drivers
are shared.  Due to how the s2idle loop handling works, this case needs
an extra explicit check whether the interrupt was caused by SCI or by
the GPIO controller.

To fix this rework the existing IRQ handler function to function as a
checker and an IRQ handler depending on the calling arguments.

BugLink: https://gitlab.freedesktop.org/drm/amd/-/issues/1738
Reported-by: Joerie de Gram 
Signed-off-by: Mario Limonciello 
Acked-by: Basavaraj Natikar 
Link: https://lore.kernel.org/r/20211101014853.6177-2-mario.limonciello@amd.com
Signed-off-by: Linus Walleij

Merge tag 'pinctrl-v5.16-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

2021-11-05T15:24:17+00:00

Pull pin control updates from Linus Walleij:
 "The most interesting aspect is that we now have initial support for
  the Apple pin controller as used in the M1 laptops and the iPhones
  which is a step forward for using Linux efficiently on this Apple
  silicon.

  Core changes:

   - Add infrastructure for per-parent interrupt data to support the
     Apple pin controller.

  New drivers:

   - New combined pin control and GPIO driver for the Apple SoC. This is
     used in all modern Apple silicon such as the M1 laptops but also in
     at least recent iPhone variants.

   - New subdriver for the Qualcomm SM6350

   - New subdriver for the Qualcomm QCM2290

   - New subdriver for the Qualcomm PM6350

   - New subdriver for the Uniphier NX1

   - New subdriver for the Samsung ExynosAutoV9

   - New subdriver for the Mediatek MT7986

   - New subdriver for the nVidia Tegra194

  Improvements:

   - Improve power management in the Mediatek driver.

   - Improvements to the Renesas internal consistency checker.

   - Convert the Rockchip pin control device tree bindings to YAML.

   - Finally convert the Qualcomm PMIC SSBI and SPMI MPP GPIO driver to
     use hierarchical interrupts.

   - Convert the Qualcomm PMIC MPP device tree bindings to YAML"

* tag 'pinctrl-v5.16-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (55 commits)
  pinctrl: add pinctrl/GPIO driver for Apple SoCs
  dt-bindings: pinctrl: Add apple,npins property to apple,pinctrl
  dt-bindings: pinctrl: add #interrupt-cells to apple,pinctrl
  gpio: Allow per-parent interrupt data
  pinctrl: tegra: Fix warnings and error
  pinctrl: intel: Kconfig: Add configuration menu to Intel pin control
  pinctrl: tegra: Use correct offset for pin group
  pinctrl: core: fix possible memory leak in pinctrl_enable()
  pinctrl: bcm2835: Allow building driver as a module
  pinctrl: equilibrium: Fix function addition in multiple groups
  pinctrl: tegra: Add pinmux support for Tegra194
  pinctrl: tegra: include lpdr pin properties
  pinctrl: mediatek: add support for MT7986 SoC
  dt-bindings: pinctrl: update bindings for MT7986 SoC
  pinctrl: microchip sgpio: use reset driver
  dt-bindings: pinctrl: pinctrl-microchip-sgpio: Add reset binding
  dt-bindings: pinctrl: qcom,pmic-mpp: switch to #interrupt-cells
  pinctrl: qcom: spmi-mpp: add support for hierarchical IRQ chip
  pinctrl: qcom: spmi-mpp: hardcode IRQ counts
  pinctrl: qcom: ssbi-mpp: add support for hierarchical IRQ chip
  ...

pinctrl: add pinctrl/GPIO driver for Apple SoCs

2021-10-26T22:16:52+00:00

This driver adds support for the pinctrl / GPIO hardware found
on some Apple SoCs.

Co-developed-by: Stan Skowronek 
Signed-off-by: Stan Skowronek 
Signed-off-by: Joey Gouly 
Acked-by: Hector Martin 
Reviewed-by: Marc Zyngier 
Link: https://lore.kernel.org/r/20211026175815.52703-5-joey.gouly@arm.com
Signed-off-by: Linus Walleij