<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux.git/drivers/pinctrl, branch v5.15-rc2</title>
<subtitle>Linux kernel source tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/'/>
<entry>
<title>Merge tag 'kbuild-v5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-kbuild</title>
<updated>2021-09-03T22:33:47+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2021-09-03T22:33:47+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=b250e6d141ce4f0d0ada60e4b5db577050e5feb0'/>
<id>b250e6d141ce4f0d0ada60e4b5db577050e5feb0</id>
<content type='text'>
Pull Kbuild updates from Masahiro Yamada:

 - Add -s option (strict mode) to merge_config.sh to make it fail when
   any symbol is redefined.

 - Show a warning if a different compiler is used for building external
   modules.

 - Infer --target from ARCH for CC=clang to let you cross-compile the
   kernel without CROSS_COMPILE.

 - Make the integrated assembler default (LLVM_IAS=1) for CC=clang.

 - Add &lt;linux/stdarg.h&gt; to the kernel source instead of borrowing
   &lt;stdarg.h&gt; from the compiler.

 - Add Nick Desaulniers as a Kbuild reviewer.

 - Drop stale cc-option tests.

 - Fix the combination of CONFIG_TRIM_UNUSED_KSYMS and CONFIG_LTO_CLANG
   to handle symbols in inline assembly.

 - Show a warning if 'FORCE' is missing for if_changed rules.

 - Various cleanups

* tag 'kbuild-v5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-kbuild: (39 commits)
  kbuild: redo fake deps at include/ksym/*.h
  kbuild: clean up objtool_args slightly
  modpost: get the *.mod file path more simply
  checkkconfigsymbols.py: Fix the '--ignore' option
  kbuild: merge vmlinux_link() between ARCH=um and other architectures
  kbuild: do not remove 'linux' link in scripts/link-vmlinux.sh
  kbuild: merge vmlinux_link() between the ordinary link and Clang LTO
  kbuild: remove stale *.symversions
  kbuild: remove unused quiet_cmd_update_lto_symversions
  gen_compile_commands: extract compiler command from a series of commands
  x86: remove cc-option-yn test for -mtune=
  arc: replace cc-option-yn uses with cc-option
  s390: replace cc-option-yn uses with cc-option
  ia64: move core-y in arch/ia64/Makefile to arch/ia64/Kbuild
  sparc: move the install rule to arch/sparc/Makefile
  security: remove unneeded subdir-$(CONFIG_...)
  kbuild: sh: remove unused install script
  kbuild: Fix 'no symbols' warning when CONFIG_TRIM_UNUSD_KSYMS=y
  kbuild: Switch to 'f' variants of integrated assembler flag
  kbuild: Shuffle blank line to improve comment meaning
  ...
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pull Kbuild updates from Masahiro Yamada:

 - Add -s option (strict mode) to merge_config.sh to make it fail when
   any symbol is redefined.

 - Show a warning if a different compiler is used for building external
   modules.

 - Infer --target from ARCH for CC=clang to let you cross-compile the
   kernel without CROSS_COMPILE.

 - Make the integrated assembler default (LLVM_IAS=1) for CC=clang.

 - Add &lt;linux/stdarg.h&gt; to the kernel source instead of borrowing
   &lt;stdarg.h&gt; from the compiler.

 - Add Nick Desaulniers as a Kbuild reviewer.

 - Drop stale cc-option tests.

 - Fix the combination of CONFIG_TRIM_UNUSED_KSYMS and CONFIG_LTO_CLANG
   to handle symbols in inline assembly.

 - Show a warning if 'FORCE' is missing for if_changed rules.

 - Various cleanups

* tag 'kbuild-v5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-kbuild: (39 commits)
  kbuild: redo fake deps at include/ksym/*.h
  kbuild: clean up objtool_args slightly
  modpost: get the *.mod file path more simply
  checkkconfigsymbols.py: Fix the '--ignore' option
  kbuild: merge vmlinux_link() between ARCH=um and other architectures
  kbuild: do not remove 'linux' link in scripts/link-vmlinux.sh
  kbuild: merge vmlinux_link() between the ordinary link and Clang LTO
  kbuild: remove stale *.symversions
  kbuild: remove unused quiet_cmd_update_lto_symversions
  gen_compile_commands: extract compiler command from a series of commands
  x86: remove cc-option-yn test for -mtune=
  arc: replace cc-option-yn uses with cc-option
  s390: replace cc-option-yn uses with cc-option
  ia64: move core-y in arch/ia64/Makefile to arch/ia64/Kbuild
  sparc: move the install rule to arch/sparc/Makefile
  security: remove unneeded subdir-$(CONFIG_...)
  kbuild: sh: remove unused install script
  kbuild: Fix 'no symbols' warning when CONFIG_TRIM_UNUSD_KSYMS=y
  kbuild: Switch to 'f' variants of integrated assembler flag
  kbuild: Shuffle blank line to improve comment meaning
  ...
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'pinctrl-v5.15-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl</title>
<updated>2021-09-02T21:22:56+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2021-09-02T21:22:56+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=c793011242d182e5f12800c12dbaf37af80be735'/>
<id>c793011242d182e5f12800c12dbaf37af80be735</id>
<content type='text'>
Pull pin control updates from Linus Walleij:
 "This is the bulk of pin control changes for the v5.15 kernel cycle, no
  core changes at all this time, just driver work!

  New drivers:

   - New subdriver for Intel Keem Bay (an ARM-based SoC)

   - New subdriver for Qualcomm MDM9607 and SM6115

   - New subdriver for ST Microelectronics STM32MP135

   - New subdriver for Freescale i.MX8ULP ("Ultra Low Power")

   - New subdriver for Ingenic X2100

   - Support for Qualcomm PMC8180, PMC8180C, SA8155p-adp PMIC GPIO

   - Support Samsung Exynos850

   - Support Renesas RZ/G2L

  Enhancements:

   - A major refactoring of the Rockchip driver, breaking part of it out
     to a separate GPIO driver in drivers/gpio

   - Pin bias support on Renesas r8a77995

   - Add SCI pins support to Ingenic JZ4755 and JZ4760

   - Mediatek device tree bindings converted to YAML"

* tag 'pinctrl-v5.15-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (53 commits)
  pinctrl: renesas: Add RZ/G2L pin and gpio controller driver
  pinctrl: samsung: Add Exynos850 SoC specific data
  dt-bindings: pinctrl: samsung: Add Exynos850 doc
  MAINTAINERS: Add maintainers for amd-pinctrl driver
  pinctrl: Add Intel Keem Bay pinctrl driver
  dt-bindings: pinctrl: Add bindings for Intel Keembay pinctrl driver
  pinctrl: zynqmp: Drop pinctrl_unregister for devm_ registered device
  dt-bindings: pinctrl: qcom-pmic-gpio: Remove the interrupts property
  dt-bindings: pinctrl: qcom-pmic-gpio: Convert qcom pmic gpio bindings to YAML
  dt-bindings: pinctrl: mt8195: Use real world values for drive-strength arguments
  dt-bindings: mediatek: convert pinctrl to yaml
  arm: dts: mt8183: Move pinfunc to include/dt-bindings/pinctrl
  arm: dts: mt8135: Move pinfunc to include/dt-bindings/pinctrl
  pinctrl: ingenic: Add .max_register in regmap_config
  pinctrl: ingenic: Fix bias config for X2000(E)
  pinctrl: ingenic: Fix incorrect pull up/down info
  pinctrl: Ingenic: Add pinctrl driver for X2100.
  dt-bindings: pinctrl: Add bindings for Ingenic X2100.
  pinctrl: Ingenic: Add SSI pins support for JZ4755 and JZ4760.
  pinctrl: Ingenic: Improve the code.
  ...
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pull pin control updates from Linus Walleij:
 "This is the bulk of pin control changes for the v5.15 kernel cycle, no
  core changes at all this time, just driver work!

  New drivers:

   - New subdriver for Intel Keem Bay (an ARM-based SoC)

   - New subdriver for Qualcomm MDM9607 and SM6115

   - New subdriver for ST Microelectronics STM32MP135

   - New subdriver for Freescale i.MX8ULP ("Ultra Low Power")

   - New subdriver for Ingenic X2100

   - Support for Qualcomm PMC8180, PMC8180C, SA8155p-adp PMIC GPIO

   - Support Samsung Exynos850

   - Support Renesas RZ/G2L

  Enhancements:

   - A major refactoring of the Rockchip driver, breaking part of it out
     to a separate GPIO driver in drivers/gpio

   - Pin bias support on Renesas r8a77995

   - Add SCI pins support to Ingenic JZ4755 and JZ4760

   - Mediatek device tree bindings converted to YAML"

* tag 'pinctrl-v5.15-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (53 commits)
  pinctrl: renesas: Add RZ/G2L pin and gpio controller driver
  pinctrl: samsung: Add Exynos850 SoC specific data
  dt-bindings: pinctrl: samsung: Add Exynos850 doc
  MAINTAINERS: Add maintainers for amd-pinctrl driver
  pinctrl: Add Intel Keem Bay pinctrl driver
  dt-bindings: pinctrl: Add bindings for Intel Keembay pinctrl driver
  pinctrl: zynqmp: Drop pinctrl_unregister for devm_ registered device
  dt-bindings: pinctrl: qcom-pmic-gpio: Remove the interrupts property
  dt-bindings: pinctrl: qcom-pmic-gpio: Convert qcom pmic gpio bindings to YAML
  dt-bindings: pinctrl: mt8195: Use real world values for drive-strength arguments
  dt-bindings: mediatek: convert pinctrl to yaml
  arm: dts: mt8183: Move pinfunc to include/dt-bindings/pinctrl
  arm: dts: mt8135: Move pinfunc to include/dt-bindings/pinctrl
  pinctrl: ingenic: Add .max_register in regmap_config
  pinctrl: ingenic: Fix bias config for X2000(E)
  pinctrl: ingenic: Fix incorrect pull up/down info
  pinctrl: Ingenic: Add pinctrl driver for X2100.
  dt-bindings: pinctrl: Add bindings for Ingenic X2100.
  pinctrl: Ingenic: Add SSI pins support for JZ4755 and JZ4760.
  pinctrl: Ingenic: Improve the code.
  ...
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'irq-core-2021-08-30' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip</title>
<updated>2021-08-30T21:38:37+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2021-08-30T21:38:37+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=7d6e3fa87e732ec1e7761bf325c0907685c8571b'/>
<id>7d6e3fa87e732ec1e7761bf325c0907685c8571b</id>
<content type='text'>
Pull irq updates from Thomas Gleixner:
 "Updates to the interrupt core and driver subsystems:

  Core changes:

   - The usual set of small fixes and improvements all over the place,
     but nothing stands out

  MSI changes:

   - Further consolidation of the PCI/MSI interrupt chip code

   - Make MSI sysfs code independent of PCI/MSI and expose the MSI
     interrupts of platform devices in the same way as PCI exposes them.

  Driver changes:

   - Support for ARM GICv3 EPPI partitions

   - Treewide conversion to generic_handle_domain_irq() for all chained
     interrupt controllers

   - Conversion to bitmap_zalloc() throughout the irq chip drivers

   - The usual set of small fixes and improvements"

* tag 'irq-core-2021-08-30' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (57 commits)
  platform-msi: Add ABI to show msi_irqs of platform devices
  genirq/msi: Move MSI sysfs handling from PCI to MSI core
  genirq/cpuhotplug: Demote debug printk to KERN_DEBUG
  irqchip/qcom-pdc: Trim unused levels of the interrupt hierarchy
  irqdomain: Export irq_domain_disconnect_hierarchy()
  irqchip/gic-v3: Fix priority comparison when non-secure priorities are used
  irqchip/apple-aic: Fix irq_disable from within irq handlers
  pinctrl/rockchip: drop the gpio related codes
  gpio/rockchip: drop irq_gc_lock/irq_gc_unlock for irq set type
  gpio/rockchip: support next version gpio controller
  gpio/rockchip: use struct rockchip_gpio_regs for gpio controller
  gpio/rockchip: add driver for rockchip gpio
  dt-bindings: gpio: change items restriction of clock for rockchip,gpio-bank
  pinctrl/rockchip: add pinctrl device to gpio bank struct
  pinctrl/rockchip: separate struct rockchip_pin_bank to a head file
  pinctrl/rockchip: always enable clock for gpio controller
  genirq: Fix kernel doc indentation
  EDAC/altera: Convert to generic_handle_domain_irq()
  powerpc: Bulk conversion to generic_handle_domain_irq()
  nios2: Bulk conversion to generic_handle_domain_irq()
  ...
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pull irq updates from Thomas Gleixner:
 "Updates to the interrupt core and driver subsystems:

  Core changes:

   - The usual set of small fixes and improvements all over the place,
     but nothing stands out

  MSI changes:

   - Further consolidation of the PCI/MSI interrupt chip code

   - Make MSI sysfs code independent of PCI/MSI and expose the MSI
     interrupts of platform devices in the same way as PCI exposes them.

  Driver changes:

   - Support for ARM GICv3 EPPI partitions

   - Treewide conversion to generic_handle_domain_irq() for all chained
     interrupt controllers

   - Conversion to bitmap_zalloc() throughout the irq chip drivers

   - The usual set of small fixes and improvements"

* tag 'irq-core-2021-08-30' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (57 commits)
  platform-msi: Add ABI to show msi_irqs of platform devices
  genirq/msi: Move MSI sysfs handling from PCI to MSI core
  genirq/cpuhotplug: Demote debug printk to KERN_DEBUG
  irqchip/qcom-pdc: Trim unused levels of the interrupt hierarchy
  irqdomain: Export irq_domain_disconnect_hierarchy()
  irqchip/gic-v3: Fix priority comparison when non-secure priorities are used
  irqchip/apple-aic: Fix irq_disable from within irq handlers
  pinctrl/rockchip: drop the gpio related codes
  gpio/rockchip: drop irq_gc_lock/irq_gc_unlock for irq set type
  gpio/rockchip: support next version gpio controller
  gpio/rockchip: use struct rockchip_gpio_regs for gpio controller
  gpio/rockchip: add driver for rockchip gpio
  dt-bindings: gpio: change items restriction of clock for rockchip,gpio-bank
  pinctrl/rockchip: add pinctrl device to gpio bank struct
  pinctrl/rockchip: separate struct rockchip_pin_bank to a head file
  pinctrl/rockchip: always enable clock for gpio controller
  genirq: Fix kernel doc indentation
  EDAC/altera: Convert to generic_handle_domain_irq()
  powerpc: Bulk conversion to generic_handle_domain_irq()
  nios2: Bulk conversion to generic_handle_domain_irq()
  ...
</pre>
</div>
</content>
</entry>
<entry>
<title>isystem: trim/fixup stdarg.h and other headers</title>
<updated>2021-08-19T00:02:55+00:00</updated>
<author>
<name>Alexey Dobriyan</name>
<email>adobriyan@gmail.com</email>
</author>
<published>2021-08-02T20:40:31+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=39f75da7bcc829ddc4d40bb60d0e95520de7898b'/>
<id>39f75da7bcc829ddc4d40bb60d0e95520de7898b</id>
<content type='text'>
Delete/fixup few includes in anticipation of global -isystem compile
option removal.

Note: crypto/aegis128-neon-inner.c keeps &lt;stddef.h&gt; due to redefinition
of uintptr_t error (one definition comes from &lt;stddef.h&gt;, another from
&lt;linux/types.h&gt;).

Signed-off-by: Alexey Dobriyan &lt;adobriyan@gmail.com&gt;
Signed-off-by: Masahiro Yamada &lt;masahiroy@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Delete/fixup few includes in anticipation of global -isystem compile
option removal.

Note: crypto/aegis128-neon-inner.c keeps &lt;stddef.h&gt; due to redefinition
of uintptr_t error (one definition comes from &lt;stddef.h&gt;, another from
&lt;linux/types.h&gt;).

Signed-off-by: Alexey Dobriyan &lt;adobriyan@gmail.com&gt;
Signed-off-by: Masahiro Yamada &lt;masahiroy@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge remote-tracking branch 'linusw/ib-rockchip' into irq/generic_handle_domain_irq</title>
<updated>2021-08-18T19:38:01+00:00</updated>
<author>
<name>Marc Zyngier</name>
<email>maz@kernel.org</email>
</author>
<published>2021-08-18T19:38:01+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=6ecd53f49fad3dc2de2f34a035ffb06bd1972fde'/>
<id>6ecd53f49fad3dc2de2f34a035ffb06bd1972fde</id>
<content type='text'>
Merge Linus' ib-rockchip branch to avoid ugly conflicts
with the generic_handle_domain_irq rework.

Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Merge Linus' ib-rockchip branch to avoid ugly conflicts
with the generic_handle_domain_irq rework.

Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'samsung-pinctrl-5.15' of https://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/samsung into devel</title>
<updated>2021-08-17T19:58:41+00:00</updated>
<author>
<name>Linus Walleij</name>
<email>linus.walleij@linaro.org</email>
</author>
<published>2021-08-17T19:58:41+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=04853352952b7dd17f355ed54bd81305b341af55'/>
<id>04853352952b7dd17f355ed54bd81305b341af55</id>
<content type='text'>
Samsung pinctrl drivers changes for v5.15

1. Fix number of pins in one GPIO pin bank.
2. Add support for Exynos850 SoC (Exynos3830).
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Samsung pinctrl drivers changes for v5.15

1. Fix number of pins in one GPIO pin bank.
2. Add support for Exynos850 SoC (Exynos3830).
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'ib-rockchip' into devel</title>
<updated>2021-08-16T23:02:01+00:00</updated>
<author>
<name>Linus Walleij</name>
<email>linus.walleij@linaro.org</email>
</author>
<published>2021-08-16T23:02:01+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=0dda8b013329aab86d48f3376b2a5bb44c6b9437'/>
<id>0dda8b013329aab86d48f3376b2a5bb44c6b9437</id>
<content type='text'>
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
</pre>
</div>
</content>
</entry>
<entry>
<title>pinctrl/rockchip: drop the gpio related codes</title>
<updated>2021-08-16T23:01:50+00:00</updated>
<author>
<name>Jianqun Xu</name>
<email>jay.xu@rock-chips.com</email>
</author>
<published>2021-08-16T01:21:46+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=9ce9a02039de72ec8af1bd4bff14f1780337ffcc'/>
<id>9ce9a02039de72ec8af1bd4bff14f1780337ffcc</id>
<content type='text'>
With the patch to separate the gpio driver from the pinctrl driver, now
the pinctrl-rockchip can drop the gpio related codes now.

Signed-off-by: Jianqun Xu &lt;jay.xu@rock-chips.com&gt;
Link: https://lore.kernel.org/r/20210816012146.1119289-1-jay.xu@rock-chips.com
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
With the patch to separate the gpio driver from the pinctrl driver, now
the pinctrl-rockchip can drop the gpio related codes now.

Signed-off-by: Jianqun Xu &lt;jay.xu@rock-chips.com&gt;
Link: https://lore.kernel.org/r/20210816012146.1119289-1-jay.xu@rock-chips.com
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>gpio/rockchip: support next version gpio controller</title>
<updated>2021-08-16T23:01:50+00:00</updated>
<author>
<name>Jianqun Xu</name>
<email>jay.xu@rock-chips.com</email>
</author>
<published>2021-08-16T01:21:23+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=3bcbd1a85b68e5f864029fd6f0bb0bcc8e2f1082'/>
<id>3bcbd1a85b68e5f864029fd6f0bb0bcc8e2f1082</id>
<content type='text'>
The next version gpio controller on SoCs like rk3568 have more write
mask bits for registers.

Signed-off-by: Jianqun Xu &lt;jay.xu@rock-chips.com&gt;
Link: https://lore.kernel.org/r/20210816012123.1119179-1-jay.xu@rock-chips.com
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The next version gpio controller on SoCs like rk3568 have more write
mask bits for registers.

Signed-off-by: Jianqun Xu &lt;jay.xu@rock-chips.com&gt;
Link: https://lore.kernel.org/r/20210816012123.1119179-1-jay.xu@rock-chips.com
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>gpio/rockchip: use struct rockchip_gpio_regs for gpio controller</title>
<updated>2021-08-16T23:01:49+00:00</updated>
<author>
<name>Jianqun Xu</name>
<email>jay.xu@rock-chips.com</email>
</author>
<published>2021-08-16T01:21:11+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=ff96a8c21cdbf4a36fbad341af3a41db44bbf878'/>
<id>ff96a8c21cdbf4a36fbad341af3a41db44bbf878</id>
<content type='text'>
Store register offsets in the struct rockchip_gpio_regs, this patch
prepare for the driver update for new gpio controller.

Reviewed-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
Signed-off-by: Jianqun Xu &lt;jay.xu@rock-chips.com&gt;
Link: https://lore.kernel.org/r/20210816012111.1119125-1-jay.xu@rock-chips.com
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
<content type='xhtml'>
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Store register offsets in the struct rockchip_gpio_regs, this patch
prepare for the driver update for new gpio controller.

Reviewed-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
Signed-off-by: Jianqun Xu &lt;jay.xu@rock-chips.com&gt;
Link: https://lore.kernel.org/r/20210816012111.1119125-1-jay.xu@rock-chips.com
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
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