linux.git/drivers/pinctrl, branch v5.10-rc2 Linux kernel source tree Merge tag 'pinctrl-v5.10-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl 2020-10-14T22:25:04+00:00 Linus Torvalds torvalds@linux-foundation.org 2020-10-14T22:25:04+00:00 b4e1bce85fd8f43dc814049e2641cc6beaa8146b Pull pin control updates from Linus Walleij: "Core changes: - NONE whatsoever, we don't even touch the core files this time around. New drivers: - New driver for the Toshiba Visconti SoC. - New subdriver for the Qualcomm MSM8226 SoC. - New subdriver for the Actions Semiconductor S500 SoC. - New subdriver for the Mediatek MT8192 SoC. - New subdriver for the Microchip SAMA7G5 SoC. Driver enhancements: - Intel Cherryview and Baytrail cleanups and refactorings. - Enhanced support for the Renesas R8A7790, more pins and groups. - Some optimizations for the MCP23S08 MCP23x17 variant. - Some cleanups around the Actions Semiconductor subdrivers. - A bunch of cleanups around the SH-PFC and Emma Mobile drivers. - The "SH-PFC" (literally SuperH pin function controller, I think) subdirectory is now renamed to the more neutral "renesas", as these are not very much centered around SuperH anymore. - Non-critical fixes for the Aspeed driver. - Non-critical fixes for the Ingenic (MIPS!) driver. - Fix a bunch of missing pins on the AMD pinctrl driver" * tag 'pinctrl-v5.10-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (78 commits) pinctrl: amd: Add missing pins to the pin group list dt-bindings: pinctrl: sunxi: Allow pinctrl with more interrupt banks pinctrl: visconti: PINCTRL_TMPV7700 should depend on ARCH_VISCONTI pinctrl: mediatek: Free eint data on failure pinctrl: single: fix debug output when #pinctrl-cells = 2 pinctrl: single: fix pinctrl_spec.args_count bounds check pinctrl: sunrisepoint: Modify COMMUNITY macros to be consistent pinctrl: cannonlake: Modify COMMUNITY macros to be consistent pinctrl: tigerlake: Fix register offsets for TGL-H variant pinctrl: Document pinctrl-single,pins when #pinctrl-cells = 2 pinctrl: mediatek: use devm_platform_ioremap_resource_byname() pinctrl: nuvoton: npcm7xx: Constify static ops structs pinctrl: mediatek: mt7622: add antsel pins/groups pinctrl: ocelot: simplify the return expression of ocelot_gpiochip_register() pinctrl: at91-pio4: add support for sama7g5 SoC dt-bindings: pinctrl: at91-pio4: add microchip,sama7g5 pinctrl: spear: simplify the return expression of tvc_connect() pinctrl: spear: simplify the return expression of spear310_pinctrl_probe pinctrl: sprd: use module_platform_driver to simplify the code pinctrl: Ingenic: Add I2S pins support for Ingenic SoCs. ... 
Pull pin control updates from Linus Walleij:
 "Core changes:

   - NONE whatsoever, we don't even touch the core files this time
     around.

  New drivers:

   - New driver for the Toshiba Visconti SoC.

   - New subdriver for the Qualcomm MSM8226 SoC.

   - New subdriver for the Actions Semiconductor S500 SoC.

   - New subdriver for the Mediatek MT8192 SoC.

   - New subdriver for the Microchip SAMA7G5 SoC.

  Driver enhancements:

   - Intel Cherryview and Baytrail cleanups and refactorings.

   - Enhanced support for the Renesas R8A7790, more pins and groups.

   - Some optimizations for the MCP23S08 MCP23x17 variant.

   - Some cleanups around the Actions Semiconductor subdrivers.

   - A bunch of cleanups around the SH-PFC and Emma Mobile drivers.

   - The "SH-PFC" (literally SuperH pin function controller, I think)
     subdirectory is now renamed to the more neutral "renesas", as these
     are not very much centered around SuperH anymore.

   - Non-critical fixes for the Aspeed driver.

   - Non-critical fixes for the Ingenic (MIPS!) driver.

   - Fix a bunch of missing pins on the AMD pinctrl driver"

* tag 'pinctrl-v5.10-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (78 commits)
  pinctrl: amd: Add missing pins to the pin group list
  dt-bindings: pinctrl: sunxi: Allow pinctrl with more interrupt banks
  pinctrl: visconti: PINCTRL_TMPV7700 should depend on ARCH_VISCONTI
  pinctrl: mediatek: Free eint data on failure
  pinctrl: single: fix debug output when #pinctrl-cells = 2
  pinctrl: single: fix pinctrl_spec.args_count bounds check
  pinctrl: sunrisepoint: Modify COMMUNITY macros to be consistent
  pinctrl: cannonlake: Modify COMMUNITY macros to be consistent
  pinctrl: tigerlake: Fix register offsets for TGL-H variant
  pinctrl: Document pinctrl-single,pins when #pinctrl-cells = 2
  pinctrl: mediatek: use devm_platform_ioremap_resource_byname()
  pinctrl: nuvoton: npcm7xx: Constify static ops structs
  pinctrl: mediatek: mt7622: add antsel pins/groups
  pinctrl: ocelot: simplify the return expression of ocelot_gpiochip_register()
  pinctrl: at91-pio4: add support for sama7g5 SoC
  dt-bindings: pinctrl: at91-pio4: add microchip,sama7g5
  pinctrl: spear: simplify the return expression of tvc_connect()
  pinctrl: spear: simplify the return expression of spear310_pinctrl_probe
  pinctrl: sprd: use module_platform_driver to simplify the code
  pinctrl: Ingenic: Add I2S pins support for Ingenic SoCs.
  ...
Merge tag 'gpio-v5.10-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio 2020-10-13T17:09:33+00:00 Linus Torvalds torvalds@linux-foundation.org 2020-10-13T17:09:33+00:00 0486beaf88d2460e9dbcbba281dab683a838f0c6 Pull GPIO updates from Linus Walleij: "This time very little driver changes but lots of core changes. We have some interesting cooperative work for ARM and Intel alike, making the GPIO subsystem more and more suitable for industrial systems and the like, in addition to the in-kernel users. We touch driver core (device properties) and lib/* by adding one simple string array free function, these are authored by Andy Shevchenko who is a well known and recognized core helpers maintainers so this should be fine. We also see some Android GKI-related modularization in the MXC drivers. Core changes: - The big core change is the updated (v2) userspace character device API. This corrects badly designed 64-bit alignment around the line events. We also add the debounce request feature. This echoes the often quotes passage from Frederick Brooks "The mythical man-month" to always throw one away, which we have seen before in things such as V4L2. So we put in a new one and deprecate and obsolete the old one. - All example tools in tools/gpio/* are migrated to the new API to set a good example. The libgpiod userspace library has been augmented to use this new API pretty much from day 1. - Some misc API hardening by using strn* function calls has been added as well. - Use the simpler IDA interface for GPIO chip instance enumeration. - Add device core function for counting string arrays in device properties. - Provide a generic library function kfree_strarray() that can be used throughout the kernel. Driver enhancements: - The DesignWare dwapb-gpio driver has been enhanced and now uses the IRQ handling in the gpiolib core. - The mockup and aggregator drivers have seen some substantial code clean-up and now use more of the core kernel inftrastructure. - Misc cleanups using dev_err_probe(). - The MXC drivers (Freescale/NXP) can now be built modularized, which makes modularized GKI Android kernels happy" * tag 'gpio-v5.10-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (73 commits) gpiolib: Update header block in gpiolib-cdev.h gpiolib: cdev: switch from kstrdup() to kstrndup() docs: gpio: add a new document to its index.rst gpio: pca953x: Add support for the NXP PCAL9554B/C tools: gpio: add debounce support to gpio-event-mon tools: gpio: add multi-line monitoring to gpio-event-mon tools: gpio: port gpio-event-mon to v2 uAPI tools: gpio: port gpio-hammer to v2 uAPI tools: gpio: rename nlines to num_lines tools: gpio: port gpio-watch to v2 uAPI tools: gpio: port lsgpio to v2 uAPI gpio: uapi: document uAPI v1 as deprecated gpiolib: cdev: support setting debounce gpiolib: cdev: support GPIO_V2_LINE_SET_VALUES_IOCTL gpiolib: cdev: support GPIO_V2_LINE_SET_CONFIG_IOCTL gpiolib: cdev: support edge detection for uAPI v2 gpiolib: cdev: support GPIO_V2_GET_LINEINFO_IOCTL and GPIO_V2_GET_LINEINFO_WATCH_IOCTL gpiolib: cdev: support GPIO_V2_GET_LINE_IOCTL and GPIO_V2_LINE_GET_VALUES_IOCTL gpiolib: add build option for CDEV v1 ABI gpiolib: make cdev a build option ... 
Pull GPIO updates from Linus Walleij:
 "This time very little driver changes but lots of core changes.

  We have some interesting cooperative work for ARM and Intel alike,
  making the GPIO subsystem more and more suitable for industrial
  systems and the like, in addition to the in-kernel users.

  We touch driver core (device properties) and lib/* by adding one
  simple string array free function, these are authored by Andy
  Shevchenko who is a well known and recognized core helpers maintainers
  so this should be fine.

  We also see some Android GKI-related modularization in the MXC
  drivers.

  Core changes:

   - The big core change is the updated (v2) userspace character device
     API.

     This corrects badly designed 64-bit alignment around the line
     events. We also add the debounce request feature. This echoes the
     often quotes passage from Frederick Brooks "The mythical man-month"
     to always throw one away, which we have seen before in things such
     as V4L2. So we put in a new one and deprecate and obsolete the old
     one.

   - All example tools in tools/gpio/* are migrated to the new API to
     set a good example. The libgpiod userspace library has been
     augmented to use this new API pretty much from day 1.

   - Some misc API hardening by using strn* function calls has been
     added as well.

   - Use the simpler IDA interface for GPIO chip instance enumeration.

   - Add device core function for counting string arrays in device
     properties.

   - Provide a generic library function kfree_strarray() that can be
     used throughout the kernel.

  Driver enhancements:

   - The DesignWare dwapb-gpio driver has been enhanced and now uses the
     IRQ handling in the gpiolib core.

   - The mockup and aggregator drivers have seen some substantial code
     clean-up and now use more of the core kernel inftrastructure.

   - Misc cleanups using dev_err_probe().

   - The MXC drivers (Freescale/NXP) can now be built modularized, which
     makes modularized GKI Android kernels happy"

* tag 'gpio-v5.10-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (73 commits)
  gpiolib: Update header block in gpiolib-cdev.h
  gpiolib: cdev: switch from kstrdup() to kstrndup()
  docs: gpio: add a new document to its index.rst
  gpio: pca953x: Add support for the NXP PCAL9554B/C
  tools: gpio: add debounce support to gpio-event-mon
  tools: gpio: add multi-line monitoring to gpio-event-mon
  tools: gpio: port gpio-event-mon to v2 uAPI
  tools: gpio: port gpio-hammer to v2 uAPI
  tools: gpio: rename nlines to num_lines
  tools: gpio: port gpio-watch to v2 uAPI
  tools: gpio: port lsgpio to v2 uAPI
  gpio: uapi: document uAPI v1 as deprecated
  gpiolib: cdev: support setting debounce
  gpiolib: cdev: support GPIO_V2_LINE_SET_VALUES_IOCTL
  gpiolib: cdev: support GPIO_V2_LINE_SET_CONFIG_IOCTL
  gpiolib: cdev: support edge detection for uAPI v2
  gpiolib: cdev: support GPIO_V2_GET_LINEINFO_IOCTL and GPIO_V2_GET_LINEINFO_WATCH_IOCTL
  gpiolib: cdev: support GPIO_V2_GET_LINE_IOCTL and GPIO_V2_LINE_GET_VALUES_IOCTL
  gpiolib: add build option for CDEV v1 ABI
  gpiolib: make cdev a build option
  ...
Merge tag 'irq-core-2020-10-12' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip 2020-10-12T18:34:32+00:00 Linus Torvalds torvalds@linux-foundation.org 2020-10-12T18:34:32+00:00 c457cc800e892315d428a724ede09a085c4501be Pull irq updates from Thomas Gleixner: "Updates for the interrupt subsystem: Core: - Allow trimming of interrupt hierarchy to support odd hardware setups where only a subset of the interrupts requires the full hierarchy. - Allow the retrigger mechanism to follow a hierarchy to simplify driver code. - Provide a mechanism to force enable wakeup interrrupts on suspend. - More infrastructure to handle IPIs in the core code Architectures: - Convert ARM/ARM64 IPI handling to utilize the interrupt core code. Drivers: - The usual pile of new interrupt chips (MStar, Actions Owl, TI PRUSS, Designware ICTL) - ARM(64) IPI related conversions - Wakeup support for Qualcom PDC - Prevent hierarchy corruption in the NVIDIA Tegra driver - The usual small fixes, improvements and cleanups all over the place" * tag 'irq-core-2020-10-12' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (59 commits) dt-bindings: interrupt-controller: Add MStar interrupt controller irqchip/irq-mst: Add MStar interrupt controller support soc/tegra: pmc: Don't create fake interrupt hierarchy levels soc/tegra: pmc: Allow optional irq parent callbacks gpio: tegra186: Allow optional irq parent callbacks genirq/irqdomain: Allow partial trimming of irq_data hierarchy irqchip/qcom-pdc: Reset PDC interrupts during init irqchip/qcom-pdc: Set IRQCHIP_ENABLE_WAKEUP_ON_SUSPEND flag pinctrl: qcom: Set IRQCHIP_ENABLE_WAKEUP_ON_SUSPEND flag genirq/PM: Introduce IRQCHIP_ENABLE_WAKEUP_ON_SUSPEND flag pinctrl: qcom: Use return value from irq_set_wake() call pinctrl: qcom: Set IRQCHIP_SET_TYPE_MASKED and IRQCHIP_MASK_ON_SUSPEND flags ARM: Handle no IPI being registered in show_ipi_list() MAINTAINERS: Add entries for Actions Semi Owl SIRQ controller irqchip: Add Actions Semi Owl SIRQ controller dt-bindings: interrupt-controller: Add Actions SIRQ controller binding dt-bindings: dw-apb-ictl: Update binding to describe use as primary interrupt controller irqchip/dw-apb-ictl: Add primary interrupt controller support irqchip/dw-apb-ictl: Refactor priot to introducing hierarchical irq domains genirq: Add stub for set_handle_irq() when !GENERIC_IRQ_MULTI_HANDLER ... 
Pull irq updates from Thomas Gleixner:
 "Updates for the interrupt subsystem:

  Core:
   - Allow trimming of interrupt hierarchy to support odd hardware
     setups where only a subset of the interrupts requires the full
     hierarchy.

   - Allow the retrigger mechanism to follow a hierarchy to simplify
     driver code.

   - Provide a mechanism to force enable wakeup interrrupts on suspend.

   - More infrastructure to handle IPIs in the core code

  Architectures:
   - Convert ARM/ARM64 IPI handling to utilize the interrupt core code.

  Drivers:
   - The usual pile of new interrupt chips (MStar, Actions Owl, TI
     PRUSS, Designware ICTL)

   - ARM(64) IPI related conversions

   - Wakeup support for Qualcom PDC

   - Prevent hierarchy corruption in the NVIDIA Tegra driver

   - The usual small fixes, improvements and cleanups all over the
     place"

* tag 'irq-core-2020-10-12' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (59 commits)
  dt-bindings: interrupt-controller: Add MStar interrupt controller
  irqchip/irq-mst: Add MStar interrupt controller support
  soc/tegra: pmc: Don't create fake interrupt hierarchy levels
  soc/tegra: pmc: Allow optional irq parent callbacks
  gpio: tegra186: Allow optional irq parent callbacks
  genirq/irqdomain: Allow partial trimming of irq_data hierarchy
  irqchip/qcom-pdc: Reset PDC interrupts during init
  irqchip/qcom-pdc: Set IRQCHIP_ENABLE_WAKEUP_ON_SUSPEND flag
  pinctrl: qcom: Set IRQCHIP_ENABLE_WAKEUP_ON_SUSPEND flag
  genirq/PM: Introduce IRQCHIP_ENABLE_WAKEUP_ON_SUSPEND flag
  pinctrl: qcom: Use return value from irq_set_wake() call
  pinctrl: qcom: Set IRQCHIP_SET_TYPE_MASKED and IRQCHIP_MASK_ON_SUSPEND flags
  ARM: Handle no IPI being registered in show_ipi_list()
  MAINTAINERS: Add entries for Actions Semi Owl SIRQ controller
  irqchip: Add Actions Semi Owl SIRQ controller
  dt-bindings: interrupt-controller: Add Actions SIRQ controller binding
  dt-bindings: dw-apb-ictl: Update binding to describe use as primary interrupt controller
  irqchip/dw-apb-ictl: Add primary interrupt controller support
  irqchip/dw-apb-ictl: Refactor priot to introducing hierarchical irq domains
  genirq: Add stub for set_handle_irq() when !GENERIC_IRQ_MULTI_HANDLER
  ...
pinctrl: amd: Add missing pins to the pin group list 2020-10-07T13:37:17+00:00 Shyam Sundar S K Shyam-sundar.S-k@amd.com 2020-10-07T11:12:20+00:00 55596c5445566cf43b83238198fd038d21172d99 Some of the pins were not exposed in the initial driver or kept as reserved. Exposing all of them now. Signed-off-by: Shyam Sundar S K <Shyam-sundar.S-k@amd.com> Link: https://lore.kernel.org/r/20201007111220.744348-1-Shyam-sundar.S-k@amd.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
Some of the pins were not exposed in the initial driver or kept as
reserved. Exposing all of them now.

Signed-off-by: Shyam Sundar S K <Shyam-sundar.S-k@amd.com>
Link: https://lore.kernel.org/r/20201007111220.744348-1-Shyam-sundar.S-k@amd.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
pinctrl: visconti: PINCTRL_TMPV7700 should depend on ARCH_VISCONTI 2020-10-07T09:48:44+00:00 Geert Uytterhoeven geert+renesas@glider.be 2020-10-05T12:50:49+00:00 c6662da804c465f73d2faa61dd33f1e9376cac3d The Toshiba Visconti TMPV7700 series pin controller is only present on Visconti SoCs. Hence add a dependency on ARCH_VISCONTI, to prevent asking the user about this driver when configuring a kernel without Visconti platform support. Fixes: a68a7844264e4fb9 ("pinctrl: visconti: Add Toshiba Visconti SoCs pinctrl support") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp> Link: https://lore.kernel.org/r/20201005125049.26926-1-geert+renesas@glider.be Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
The Toshiba Visconti TMPV7700 series pin controller is only present on
Visconti SoCs.  Hence add a dependency on ARCH_VISCONTI, to prevent
asking the user about this driver when configuring a kernel without
Visconti platform support.

Fixes: a68a7844264e4fb9 ("pinctrl: visconti: Add Toshiba Visconti SoCs pinctrl support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
Link: https://lore.kernel.org/r/20201005125049.26926-1-geert+renesas@glider.be
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
pinctrl: mediatek: Free eint data on failure 2020-10-07T08:31:30+00:00 Enric Balletbo i Serra enric.balletbo@collabora.com 2020-10-01T14:25:11+00:00 db7515783b99f6ae8b21470cab9ee871956b57fb The pinctrl driver can work without the EINT resource, but, if it is expected to have this resource but the mtk_build_eint() function fails after allocating their data (because can't get the resource or can't map the irq), the data is not freed and you end with a NULL pointer dereference. Fix this by freeing the data if mtk_build_eint() fails, so pinctrl still works and doesn't hang. This is noticeable after commit f97dbf48ca43 ("irqchip/mtk-sysirq: Convert to a platform driver") on MT8183 because, due this commit, the pinctrl driver fails to map the irq and spots the following bug: [ 1.947597] Unable to handle kernel NULL pointer dereference at virtual address 0000000000000004 [ 1.956404] Mem abort info: [ 1.959203] ESR = 0x96000004 [ 1.962259] EC = 0x25: DABT (current EL), IL = 32 bits [ 1.967565] SET = 0, FnV = 0 [ 1.970613] EA = 0, S1PTW = 0 [ 1.973747] Data abort info: [ 1.976619] ISV = 0, ISS = 0x00000004 [ 1.980447] CM = 0, WnR = 0 [ 1.983410] [0000000000000004] user address but active_mm is swapper [ 1.989759] Internal error: Oops: 96000004 [#1] PREEMPT SMP [ 1.995322] Modules linked in: [ 1.998371] CPU: 7 PID: 1 Comm: swapper/0 Not tainted 5.9.0-rc1+ #44 [ 2.004715] Hardware name: MediaTek krane sku176 board (DT) [ 2.010280] pstate: 60000005 (nZCv daif -PAN -UAO BTYPE=--) [ 2.015850] pc : mtk_eint_set_debounce+0x48/0x1b8 [ 2.020546] lr : mtk_eint_set_debounce+0x34/0x1b8 [ 2.025239] sp : ffff80001008baa0 [ 2.028544] x29: ffff80001008baa0 x28: ffff0000ff7ff790 [ 2.033847] x27: ffff0000f9ec34b0 x26: ffff0000f9ec3480 [ 2.039150] x25: ffff0000fa576410 x24: ffff0000fa502800 [ 2.044453] x23: 0000000000001388 x22: ffff0000fa635f80 [ 2.049755] x21: 0000000000000008 x20: 0000000000000000 [ 2.055058] x19: 0000000000000071 x18: 0000000000000001 [ 2.060360] x17: 0000000000000000 x16: 0000000000000000 [ 2.065662] x15: ffff0000facc8470 x14: ffffffffffffffff [ 2.070965] x13: 0000000000000001 x12: 00000000000000c0 [ 2.076267] x11: 0000000000000040 x10: 0000000000000070 [ 2.081569] x9 : ffffaec0063d24d8 x8 : ffff0000fa800270 [ 2.086872] x7 : 0000000000000000 x6 : 0000000000000011 [ 2.092174] x5 : ffff0000fa800248 x4 : ffff0000fa800270 [ 2.097476] x3 : ffff8000100c5000 x2 : 0000000000000000 [ 2.102778] x1 : 0000000000000000 x0 : 0000000000000000 [ 2.108081] Call trace: [ 2.110520] mtk_eint_set_debounce+0x48/0x1b8 [ 2.114870] mtk_gpio_set_config+0x5c/0x78 [ 2.118958] gpiod_set_config+0x5c/0x78 [ 2.122786] gpiod_set_debounce+0x18/0x28 [ 2.126789] gpio_keys_probe+0x50c/0x910 [ 2.130705] platform_drv_probe+0x54/0xa8 [ 2.134705] really_probe+0xe4/0x3b0 [ 2.138271] driver_probe_device+0x58/0xb8 [ 2.142358] device_driver_attach+0x74/0x80 [ 2.146532] __driver_attach+0x58/0xe0 [ 2.150274] bus_for_each_dev+0x70/0xc0 [ 2.154100] driver_attach+0x24/0x30 [ 2.157666] bus_add_driver+0x14c/0x1f0 [ 2.161493] driver_register+0x64/0x120 [ 2.165319] __platform_driver_register+0x48/0x58 [ 2.170017] gpio_keys_init+0x1c/0x28 [ 2.173672] do_one_initcall+0x54/0x1b4 [ 2.177499] kernel_init_freeable+0x1d0/0x238 [ 2.181848] kernel_init+0x14/0x118 [ 2.185328] ret_from_fork+0x10/0x34 [ 2.188899] Code: a9438ac1 12001266 f94006c3 121e766a (b9400421) [ 2.194991] ---[ end trace 168cf7b3324b6570 ]--- [ 2.199611] Kernel panic - not syncing: Attempted to kill init! exitcode=0x0000000b [ 2.207260] SMP: stopping secondary CPUs [ 2.211294] Kernel Offset: 0x2ebff4800000 from 0xffff800010000000 [ 2.217377] PHYS_OFFSET: 0xffffb50500000000 [ 2.221551] CPU features: 0x0240002,2188200c [ 2.225811] Memory Limit: none [ 2.228860] ---[ end Kernel panic - not syncing: Attempted to kill init! exitcode=0x0000000b ]--- Fixes: 89132dd8ffd2 ("pinctrl: mediatek: extend eint build to pinctrl-mtk-common-v2.c") Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Acked-by: Sean Wang <sean.wang@kernel.org> Link: https://lore.kernel.org/r/20201001142511.3560143-1-enric.balletbo@collabora.com [rebased on changed infrastructure] Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
The pinctrl driver can work without the EINT resource, but, if it is
expected to have this resource but the mtk_build_eint() function fails
after allocating their data (because can't get the resource or can't map
the irq), the data is not freed and you end with a NULL pointer
dereference. Fix this by freeing the data if mtk_build_eint() fails, so
pinctrl still works and doesn't hang.

This is noticeable after commit f97dbf48ca43 ("irqchip/mtk-sysirq: Convert
to a platform driver") on MT8183 because, due this commit, the pinctrl driver
fails to map the irq and spots the following bug:

[    1.947597] Unable to handle kernel NULL pointer dereference at virtual address 0000000000000004
[    1.956404] Mem abort info:
[    1.959203]   ESR = 0x96000004
[    1.962259]   EC = 0x25: DABT (current EL), IL = 32 bits
[    1.967565]   SET = 0, FnV = 0
[    1.970613]   EA = 0, S1PTW = 0
[    1.973747] Data abort info:
[    1.976619]   ISV = 0, ISS = 0x00000004
[    1.980447]   CM = 0, WnR = 0
[    1.983410] [0000000000000004] user address but active_mm is swapper
[    1.989759] Internal error: Oops: 96000004 [#1] PREEMPT SMP
[    1.995322] Modules linked in:
[    1.998371] CPU: 7 PID: 1 Comm: swapper/0 Not tainted 5.9.0-rc1+ #44
[    2.004715] Hardware name: MediaTek krane sku176 board (DT)
[    2.010280] pstate: 60000005 (nZCv daif -PAN -UAO BTYPE=--)
[    2.015850] pc : mtk_eint_set_debounce+0x48/0x1b8
[    2.020546] lr : mtk_eint_set_debounce+0x34/0x1b8
[    2.025239] sp : ffff80001008baa0
[    2.028544] x29: ffff80001008baa0 x28: ffff0000ff7ff790
[    2.033847] x27: ffff0000f9ec34b0 x26: ffff0000f9ec3480
[    2.039150] x25: ffff0000fa576410 x24: ffff0000fa502800
[    2.044453] x23: 0000000000001388 x22: ffff0000fa635f80
[    2.049755] x21: 0000000000000008 x20: 0000000000000000
[    2.055058] x19: 0000000000000071 x18: 0000000000000001
[    2.060360] x17: 0000000000000000 x16: 0000000000000000
[    2.065662] x15: ffff0000facc8470 x14: ffffffffffffffff
[    2.070965] x13: 0000000000000001 x12: 00000000000000c0
[    2.076267] x11: 0000000000000040 x10: 0000000000000070
[    2.081569] x9 : ffffaec0063d24d8 x8 : ffff0000fa800270
[    2.086872] x7 : 0000000000000000 x6 : 0000000000000011
[    2.092174] x5 : ffff0000fa800248 x4 : ffff0000fa800270
[    2.097476] x3 : ffff8000100c5000 x2 : 0000000000000000
[    2.102778] x1 : 0000000000000000 x0 : 0000000000000000
[    2.108081] Call trace:
[    2.110520]  mtk_eint_set_debounce+0x48/0x1b8
[    2.114870]  mtk_gpio_set_config+0x5c/0x78
[    2.118958]  gpiod_set_config+0x5c/0x78
[    2.122786]  gpiod_set_debounce+0x18/0x28
[    2.126789]  gpio_keys_probe+0x50c/0x910
[    2.130705]  platform_drv_probe+0x54/0xa8
[    2.134705]  really_probe+0xe4/0x3b0
[    2.138271]  driver_probe_device+0x58/0xb8
[    2.142358]  device_driver_attach+0x74/0x80
[    2.146532]  __driver_attach+0x58/0xe0
[    2.150274]  bus_for_each_dev+0x70/0xc0
[    2.154100]  driver_attach+0x24/0x30
[    2.157666]  bus_add_driver+0x14c/0x1f0
[    2.161493]  driver_register+0x64/0x120
[    2.165319]  __platform_driver_register+0x48/0x58
[    2.170017]  gpio_keys_init+0x1c/0x28
[    2.173672]  do_one_initcall+0x54/0x1b4
[    2.177499]  kernel_init_freeable+0x1d0/0x238
[    2.181848]  kernel_init+0x14/0x118
[    2.185328]  ret_from_fork+0x10/0x34
[    2.188899] Code: a9438ac1 12001266 f94006c3 121e766a (b9400421)
[    2.194991] ---[ end trace 168cf7b3324b6570 ]---
[    2.199611] Kernel panic - not syncing: Attempted to kill init! exitcode=0x0000000b
[    2.207260] SMP: stopping secondary CPUs
[    2.211294] Kernel Offset: 0x2ebff4800000 from 0xffff800010000000
[    2.217377] PHYS_OFFSET: 0xffffb50500000000
[    2.221551] CPU features: 0x0240002,2188200c
[    2.225811] Memory Limit: none
[    2.228860] ---[ end Kernel panic - not syncing: Attempted to kill init! exitcode=0x0000000b ]---

Fixes: 89132dd8ffd2 ("pinctrl: mediatek: extend eint build to pinctrl-mtk-common-v2.c")
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Acked-by: Sean Wang <sean.wang@kernel.org>
Link: https://lore.kernel.org/r/20201001142511.3560143-1-enric.balletbo@collabora.com
[rebased on changed infrastructure]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
pinctrl: qcom: Set IRQCHIP_ENABLE_WAKEUP_ON_SUSPEND flag 2020-10-06T10:26:34+00:00 Maulik Shah mkshah@codeaurora.org 2020-09-28T04:32:02+00:00 dd87bd09822c294a3c7c4daf11f11a9f81222f80 Set IRQCHIP_ENABLE_WAKEUP_ON_SUSPEND flag to enable/unmask the wakeirqs during suspend entry. Signed-off-by: Maulik Shah <mkshah@codeaurora.org> Signed-off-by: Marc Zyngier <maz@kernel.org> Tested-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/1601267524-20199-5-git-send-email-mkshah@codeaurora.org 
Set IRQCHIP_ENABLE_WAKEUP_ON_SUSPEND flag to enable/unmask the
wakeirqs during suspend entry.

Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Tested-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/1601267524-20199-5-git-send-email-mkshah@codeaurora.org
pinctrl: qcom: Use return value from irq_set_wake() call 2020-10-06T10:23:14+00:00 Maulik Shah mkshah@codeaurora.org 2020-09-28T04:32:00+00:00 f41aaca593377a4fe3984459fd4539481263b4cd msmgpio irqchip was not using return value of irq_set_irq_wake() callback since previously GIC-v3 irqchip neither had IRQCHIP_SKIP_SET_WAKE flag nor it implemented .irq_set_wake callback. This lead to irq_set_irq_wake() return error -ENXIO. However from 'commit 4110b5cbb014 ("irqchip/gic-v3: Allow interrupt to be configured as wake-up sources")' GIC irqchip has IRQCHIP_SKIP_SET_WAKE flag. Use return value from irq_set_irq_wake() and irq_chip_set_wake_parent() instead of always returning success. Fixes: e35a6ae0eb3a ("pinctrl/msm: Setup GPIO chip in hierarchy") Signed-off-by: Maulik Shah <mkshah@codeaurora.org> Signed-off-by: Marc Zyngier <maz@kernel.org> Tested-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/1601267524-20199-3-git-send-email-mkshah@codeaurora.org 
msmgpio irqchip was not using return value of irq_set_irq_wake() callback
since previously GIC-v3 irqchip neither had IRQCHIP_SKIP_SET_WAKE flag nor
it implemented .irq_set_wake callback. This lead to irq_set_irq_wake()
return error -ENXIO.

However from 'commit 4110b5cbb014 ("irqchip/gic-v3: Allow interrupt to be
configured as wake-up sources")' GIC irqchip has IRQCHIP_SKIP_SET_WAKE
flag.

Use return value from irq_set_irq_wake() and irq_chip_set_wake_parent()
instead of always returning success.

Fixes: e35a6ae0eb3a ("pinctrl/msm: Setup GPIO chip in hierarchy")
Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Tested-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/1601267524-20199-3-git-send-email-mkshah@codeaurora.org
pinctrl: qcom: Set IRQCHIP_SET_TYPE_MASKED and IRQCHIP_MASK_ON_SUSPEND flags 2020-10-06T10:23:13+00:00 Maulik Shah mkshah@codeaurora.org 2020-09-28T04:31:59+00:00 c5f72aeb659eb2f809b9531d759651514d42aa3a Both IRQCHIP_SET_TYPE_MASKED and IRQCHIP_MASK_ON_SUSPEND flags are already set for msmgpio's parent PDC irqchip but GPIO interrupts do not get masked during suspend or during setting irq type since genirq checks irqchip flag of msmgpio irqchip which forwards these calls to its parent PDC irqchip. Add irqchip specific flags for msmgpio irqchip to mask non wakeirqs during suspend and mask before setting irq type. Masking before changing type make sures any spurious interrupt is not detected during this operation. Fixes: e35a6ae0eb3a ("pinctrl/msm: Setup GPIO chip in hierarchy") Signed-off-by: Maulik Shah <mkshah@codeaurora.org> Signed-off-by: Marc Zyngier <maz@kernel.org> Tested-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/1601267524-20199-2-git-send-email-mkshah@codeaurora.org 
Both IRQCHIP_SET_TYPE_MASKED and IRQCHIP_MASK_ON_SUSPEND flags are already
set for msmgpio's parent PDC irqchip but GPIO interrupts do not get masked
during suspend or during setting irq type since genirq checks irqchip flag
of msmgpio irqchip which forwards these calls to its parent PDC irqchip.

Add irqchip specific flags for msmgpio irqchip to mask non wakeirqs during
suspend and mask before setting irq type. Masking before changing type make
sures any spurious interrupt is not detected during this operation.

Fixes: e35a6ae0eb3a ("pinctrl/msm: Setup GPIO chip in hierarchy")
Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Tested-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/1601267524-20199-2-git-send-email-mkshah@codeaurora.org
pinctrl: single: fix debug output when #pinctrl-cells = 2 2020-10-01T08:04:53+00:00 Drew Fustini drew@beagleboard.org 2020-09-13T23:03:07+00:00 f4a2b19c37caf40f3b8487ccb9032b974a84a3a7 The debug output in pcs_parse_one_pinctrl_entry() needs to be updated to print the correct pinctrl register value when #pinctrl-cells is 2. Fixes: a13395418888 ("pinctrl: single: parse #pinctrl-cells = 2") Reported-by: Trent Piepho <tpiepho@gmail.com> Signed-off-by: Drew Fustini <drew@beagleboard.org> Acked-by: Tony Lindgren <tony@atomide.com> Link: https://lore.kernel.org/linux-omap/3139716.CMS8C0sQ7x@zen.local/ Link: https://lore.kernel.org/r/20200913230306.2061645-1-drew@beagleboard.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
The debug output in pcs_parse_one_pinctrl_entry() needs to be updated
to print the correct pinctrl register value when #pinctrl-cells is 2.

Fixes: a13395418888 ("pinctrl: single: parse #pinctrl-cells = 2")
Reported-by: Trent Piepho <tpiepho@gmail.com>
Signed-off-by: Drew Fustini <drew@beagleboard.org>
Acked-by: Tony Lindgren <tony@atomide.com>
Link: https://lore.kernel.org/linux-omap/3139716.CMS8C0sQ7x@zen.local/
Link: https://lore.kernel.org/r/20200913230306.2061645-1-drew@beagleboard.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>