linux.git/drivers/pinctrl, branch v4.20-rc2 Linux kernel source tree Merge tag 'gpio-v4.20-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio 2018-10-23T07:45:05+00:00 Linus Torvalds torvalds@linux-foundation.org 2018-10-23T07:45:05+00:00 114b5f8f7efc036dd7dd16efb0f218a88e6c6c02 Pull GPIO updates from Linus Walleij: "This is the bulk of GPIO changes for the v4.20 series: Core changes: - A patch series from Hans Verkuil to make it possible to enable/disable IRQs on a GPIO line at runtime and drive GPIO lines as output without having to put/get them from scratch. The irqchip callbacks have been improved so that they can use only the fastpatch callbacks to enable/disable irqs like any normal irqchip, especially the gpiod_lock_as_irq() has been improved to be callable in fastpath context. A bunch of rework had to be done to achieve this but it is a big win since I never liked to restrict this to slowpath. The only call requireing slowpath was try_module_get() and this is kept at the .request_resources() slowpath callback. In the GPIO CEC driver this is a big win sine a single line is used for both outgoing and incoming traffic, and this needs to use IRQs for incoming traffic while actively driving the line for outgoing traffic. - Janusz Krzysztofik improved the GPIO array API to pass a "cookie" (struct gpio_array) and a bitmap for setting or getting multiple GPIO lines at once. This improvement orginated in a specific need to speed up an OMAP1 driver and has led to a much better API and real performance gains when the state of the array can be used to bypass a lot of checks and code when we want things to go really fast. The previous code would minimize the number of calls down to the driver callbacks assuming the CPU speed was orders of magnitude faster than the I/O latency, but this assumption was wrong on several platforms: what we needed to do was to profile and improve the speed on the hot path of the array functions and this change is now completed. - Clean out the painful and hard to grasp BNF experiments from the device tree bindings. Future approaches are looking into using JSON schema for this purpose. (Rob Herring is floating a patch series.) New drivers: - The RCAR driver now supports r8a774a1 (RZ/G2M). - Synopsys GPIO via CREGs driver. Major improvements: - Modernization of the EP93xx driver to use irqdomain and other contemporary concepts. - The ingenic driver has been merged into the Ingenic pin control driver and removed from the GPIO subsystem. - Debounce support in the ftgpio010 driver" * tag 'gpio-v4.20-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (116 commits) gpio: Clarify kerneldoc on gpiochip_set_chained_irqchip() gpio: Remove unused 'irqchip' argument to gpiochip_set_cascaded_irqchip() gpio: Drop parent irq assignment during cascade setup mmc: pwrseq_simple: Fix incorrect handling of GPIO bitmap gpio: fix SNPS_CREG kconfig dependency warning gpiolib: Initialize gdev field before is used gpio: fix kernel-doc after devres.c file rename gpio: fix doc string for devm_gpiochip_add_data() to not talk about irq_chip gpio: syscon: Fix possible NULL ptr usage gpiolib: Show correct direction from the beginning pinctrl: msm: Use init_valid_mask exported function gpiolib: Add init_valid_mask exported function GPIO: add single-register GPIO via CREG driver dt-bindings: Document the Synopsys GPIO via CREG bindings gpio: mockup: use device properties instead of platform_data gpio: Slightly more helpful debugfs gpio: omap: Remove set but not used variable 'dev' gpio: omap: drop omap_gpio_list Accept partial 'gpio-line-names' property. gpio: omap: get rid of the conditional PM runtime calls ... 
Pull GPIO updates from Linus Walleij:
 "This is the bulk of GPIO changes for the v4.20 series:

  Core changes:

   - A patch series from Hans Verkuil to make it possible to
     enable/disable IRQs on a GPIO line at runtime and drive GPIO lines
     as output without having to put/get them from scratch.

     The irqchip callbacks have been improved so that they can use only
     the fastpatch callbacks to enable/disable irqs like any normal
     irqchip, especially the gpiod_lock_as_irq() has been improved to be
     callable in fastpath context.

     A bunch of rework had to be done to achieve this but it is a big
     win since I never liked to restrict this to slowpath. The only call
     requireing slowpath was try_module_get() and this is kept at the
     .request_resources() slowpath callback. In the GPIO CEC driver this
     is a big win sine a single line is used for both outgoing and
     incoming traffic, and this needs to use IRQs for incoming traffic
     while actively driving the line for outgoing traffic.

   - Janusz Krzysztofik improved the GPIO array API to pass a "cookie"
     (struct gpio_array) and a bitmap for setting or getting multiple
     GPIO lines at once.

     This improvement orginated in a specific need to speed up an OMAP1
     driver and has led to a much better API and real performance gains
     when the state of the array can be used to bypass a lot of checks
     and code when we want things to go really fast.

     The previous code would minimize the number of calls down to the
     driver callbacks assuming the CPU speed was orders of magnitude
     faster than the I/O latency, but this assumption was wrong on
     several platforms: what we needed to do was to profile and improve
     the speed on the hot path of the array functions and this change is
     now completed.

   - Clean out the painful and hard to grasp BNF experiments from the
     device tree bindings. Future approaches are looking into using JSON
     schema for this purpose. (Rob Herring is floating a patch series.)

  New drivers:

   - The RCAR driver now supports r8a774a1 (RZ/G2M).

   - Synopsys GPIO via CREGs driver.

  Major improvements:

   - Modernization of the EP93xx driver to use irqdomain and other
     contemporary concepts.

   - The ingenic driver has been merged into the Ingenic pin control
     driver and removed from the GPIO subsystem.

   - Debounce support in the ftgpio010 driver"

* tag 'gpio-v4.20-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (116 commits)
  gpio: Clarify kerneldoc on gpiochip_set_chained_irqchip()
  gpio: Remove unused 'irqchip' argument to gpiochip_set_cascaded_irqchip()
  gpio: Drop parent irq assignment during cascade setup
  mmc: pwrseq_simple: Fix incorrect handling of GPIO bitmap
  gpio: fix SNPS_CREG kconfig dependency warning
  gpiolib: Initialize gdev field before is used
  gpio: fix kernel-doc after devres.c file rename
  gpio: fix doc string for devm_gpiochip_add_data() to not talk about irq_chip
  gpio: syscon: Fix possible NULL ptr usage
  gpiolib: Show correct direction from the beginning
  pinctrl: msm: Use init_valid_mask exported function
  gpiolib: Add init_valid_mask exported function
  GPIO: add single-register GPIO via CREG driver
  dt-bindings: Document the Synopsys GPIO via CREG bindings
  gpio: mockup: use device properties instead of platform_data
  gpio: Slightly more helpful debugfs
  gpio: omap: Remove set but not used variable 'dev'
  gpio: omap: drop omap_gpio_list
  Accept partial 'gpio-line-names' property.
  gpio: omap: get rid of the conditional PM runtime calls
  ...
Merge tag 'pinctrl-v4.20-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl 2018-10-23T07:40:16+00:00 Linus Torvalds torvalds@linux-foundation.org 2018-10-23T07:40:16+00:00 b0b6a28bc4b265aa56cbf4fa8fd27c0a4fa3a49c Pull pin control updates from Linus Walleij: "This is the bulk of pin control changes for the v4.20 series: There were no significant changes to the core this time! Bur the new Qualcomm, Mediatek and Broadcom drivers are quite interesting as they will be used in a few million embedded devices the coming years as it seems. New drivers: - Broadcom Northstar pin control driver. - Mediatek MT8183 subdriver. - Mediatek MT7623 subdriver. - Mediatek MT6765 subdriver. - Meson g12a subdriver. - Nuvoton NPCM7xx pin control and GPIO driver. - Qualcomm QCS404 pin control and GPIO subdriver. - Qualcomm SDM660 pin control and GPIO subdriver. - Renesas R8A7744 PFC subdriver. - Renesas R8A774C0 PFC subdriver. - Renesas RZ/N1 pinctrl driver Major improvements: - Pulled the GPIO support for Ingenic over from the GPIO subsystem and consolidated it all in the Ingenic pin control driver. - Major cleanups and consolidation work in all Intel drivers. - Major cleanups and consolidation work in all Mediatek drivers. - Lots of incremental improvements to the Renesas PFC pin controller family. - All drivers doing GPIO now include <linux/gpio/driver.h> and nothing else" * tag 'pinctrl-v4.20-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (153 commits) pinctrl: sunxi: Fix a memory leak in 'sunxi_pinctrl_build_state()' gpio: uniphier: include <linux/bits.h> instead of <linux/bitops.h> pinctrl: uniphier: include <linux/bits.h> instead of <linux/bitops.h> dt-bindings: pinctrl: bcm4708-pinmux: improve example binding pinctrl: geminilake: Sort register offsets by value pinctrl: geminilake: Get rid of unneeded ->probe() stub pinctrl: geminilake: Update pin list for B0 stepping pinctrl: renesas: Fix platform_no_drv_owner.cocci warnings pinctrl: mediatek: Make eint_m u16 pinctrl: bcm: ns: Use uintptr_t for casting data pinctrl: madera: Fix uninitialized variable bug in madera_mux_set_mux pinctrl: gemini: Fix up TVC clock group pinctrl: gemini: Drop noisy debug prints pinctrl: gemini: Mask and set properly pinctrl: mediatek: select GPIOLIB pinctrl: rza1: don't manually release devm managed resources MAINTAINERS: update entry for Mediatek pin controller pinctrl: bcm: add Northstar driver dt-bindings: pinctrl: document Broadcom Northstar pin mux controller pinctrl: qcom: fix 'const' pointer handling ... 
Pull pin control updates from Linus Walleij:
 "This is the bulk of pin control changes for the v4.20 series:

  There were no significant changes to the core this time! Bur the new
  Qualcomm, Mediatek and Broadcom drivers are quite interesting as they
  will be used in a few million embedded devices the coming years as it
  seems.

  New drivers:

   - Broadcom Northstar pin control driver.

   - Mediatek MT8183 subdriver.

   - Mediatek MT7623 subdriver.

   - Mediatek MT6765 subdriver.

   - Meson g12a subdriver.

   - Nuvoton NPCM7xx pin control and GPIO driver.

   - Qualcomm QCS404 pin control and GPIO subdriver.

   - Qualcomm SDM660 pin control and GPIO subdriver.

   - Renesas R8A7744 PFC subdriver.

   - Renesas R8A774C0 PFC subdriver.

   - Renesas RZ/N1 pinctrl driver

  Major improvements:

   - Pulled the GPIO support for Ingenic over from the GPIO subsystem
     and consolidated it all in the Ingenic pin control driver.

   - Major cleanups and consolidation work in all Intel drivers.

   - Major cleanups and consolidation work in all Mediatek drivers.

   - Lots of incremental improvements to the Renesas PFC pin controller
     family.

   - All drivers doing GPIO now include <linux/gpio/driver.h> and
     nothing else"

* tag 'pinctrl-v4.20-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (153 commits)
  pinctrl: sunxi: Fix a memory leak in 'sunxi_pinctrl_build_state()'
  gpio: uniphier: include <linux/bits.h> instead of <linux/bitops.h>
  pinctrl: uniphier: include <linux/bits.h> instead of <linux/bitops.h>
  dt-bindings: pinctrl: bcm4708-pinmux: improve example binding
  pinctrl: geminilake: Sort register offsets by value
  pinctrl: geminilake: Get rid of unneeded ->probe() stub
  pinctrl: geminilake: Update pin list for B0 stepping
  pinctrl: renesas: Fix platform_no_drv_owner.cocci warnings
  pinctrl: mediatek: Make eint_m u16
  pinctrl: bcm: ns: Use uintptr_t for casting data
  pinctrl: madera: Fix uninitialized variable bug in madera_mux_set_mux
  pinctrl: gemini: Fix up TVC clock group
  pinctrl: gemini: Drop noisy debug prints
  pinctrl: gemini: Mask and set properly
  pinctrl: mediatek: select GPIOLIB
  pinctrl: rza1: don't manually release devm managed resources
  MAINTAINERS: update entry for Mediatek pin controller
  pinctrl: bcm: add Northstar driver
  dt-bindings: pinctrl: document Broadcom Northstar pin mux controller
  pinctrl: qcom: fix 'const' pointer handling
  ...
pinctrl: sunxi: Fix a memory leak in 'sunxi_pinctrl_build_state()' 2018-10-16T08:03:48+00:00 Christophe JAILLET christophe.jaillet@wanadoo.fr 2018-10-16T06:22:28+00:00 a93a676b079144009f55fff2ab0e34c3b7258c8a If 'krealloc()' fails, 'pctl->functions' is set to NULL. We should instead use a temp variable in order to be able to free the previously allocated memeory, in case of OOM. Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
If 'krealloc()' fails, 'pctl->functions' is set to NULL.
We should instead use a temp variable in order to be able to free the
previously allocated memeory, in case of OOM.

Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
pinctrl: uniphier: include <linux/bits.h> instead of <linux/bitops.h> 2018-10-16T08:01:59+00:00 Masahiro Yamada yamada.masahiro@socionext.com 2018-10-16T04:09:58+00:00 e24cf513cb9801c72a9c461806b62cea430dd28a The reason of including <linux/bitops.h> here is just for BIT() macro. Since commit 8bd9cb51daac8 ("locking/atomics, asm-generic: Move some macros from <linux/bitops.h> to a new <linux/bits.h> file"), <linux/bits.h> is enough for such compile-time macros. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
The reason of including <linux/bitops.h> here is just for BIT() macro.

Since commit 8bd9cb51daac8 ("locking/atomics, asm-generic: Move some
macros from <linux/bitops.h> to a new <linux/bits.h> file"),
<linux/bits.h> is enough for such compile-time macros.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
pinctrl: geminilake: Sort register offsets by value 2018-10-16T07:18:15+00:00 Andy Shevchenko andriy.shevchenko@linux.intel.com 2018-10-04T15:33:21+00:00 ce96a3a04130b8b6294e1d66e167d88577cf9746 No functional change. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
No functional change.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
pinctrl: geminilake: Get rid of unneeded ->probe() stub 2018-10-16T07:18:15+00:00 Andy Shevchenko andriy.shevchenko@linux.intel.com 2018-10-04T15:33:20+00:00 2b3445c7eb72f377e335a83e91327da4104adf22 The local ->probe() stub does nothing except calling a generic Intel pin control probe function. Thus, it's not needed and generic function may be called directly. This patch converts the driver accordingly. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
The local ->probe() stub does nothing except calling
a generic Intel pin control probe function. Thus,
it's not needed and generic function may be called directly.

This patch converts the driver accordingly.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
pinctrl: geminilake: Update pin list for B0 stepping 2018-10-16T07:17:18+00:00 Andy Shevchenko andriy.shevchenko@linux.intel.com 2018-10-04T15:33:18+00:00 08a3e5dca04ada02516102acf8cbd77f89baee6d According to an updated pin list few names of the pins can be spelled better, taking into account their primary functions. Thus, update a pin list to cover B0 stepping. Note, SPI numbering had been fixed even in A0 public documentation. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
According to an updated pin list few names of the pins can be spelled better,
taking into account their primary functions.

Thus, update a pin list to cover B0 stepping.

Note, SPI numbering had been fixed even in A0 public documentation.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
pinctrl: renesas: Fix platform_no_drv_owner.cocci warnings 2018-10-15T14:19:44+00:00 YueHaibing yuehaibing@huawei.com 2018-10-12T09:33:28+00:00 2b9ea543fa433689301cf16c5b391e1e552ac73d Remove .owner field if calls are used which set it automatically Generated by: scripts/coccinelle/api/platform_no_drv_owner.cocci Signed-off-by: YueHaibing <yuehaibing@huawei.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
Remove .owner field if calls are used which set it automatically
Generated by: scripts/coccinelle/api/platform_no_drv_owner.cocci

Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
pinctrl: mediatek: Make eint_m u16 2018-10-15T14:17:01+00:00 Manivannan Sadhasivam manivannan.sadhasivam@linaro.org 2018-10-08T19:14:10+00:00 28e0603c4df4b327aa1f92ccfbc3733323d898ba For SoC's which lacks EINT support, U16_MAX is assigned to both eint_m and eint_n through macro NO_EINT_SUPPORT. This will generate integer overflow warning because eint_m is declared as u8 type. Hence modify the eint_m type to u16. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
For SoC's which lacks EINT support, U16_MAX is assigned to both eint_m
and eint_n through macro NO_EINT_SUPPORT. This will generate integer
overflow warning because eint_m is declared as u8 type. Hence modify
the eint_m type to u16.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
pinctrl: bcm: ns: Use uintptr_t for casting data 2018-10-12T09:14:59+00:00 Rafał Miłecki rafal@milecki.pl 2018-10-11T11:23:40+00:00 ce7bdb957b8e3f1cbf0a3358f1deef385dff6502 Fix up a compiler error on 64bit architectures where pointers and integers differ in size. Suggested-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
Fix up a compiler error on 64bit architectures where pointers
and integers differ in size.

Suggested-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>