linux.git/drivers/pinctrl/sunxi, branch v4.13

pinctrl: sunxi: add a missing function of A10/A20 pinctrl driver

2017-07-31T13:52:52+00:00

The PH16 pin has a function with mux id 0x5, which is the DET pin of the
"sim" (smart card reader) IP block.

This function is missing in old versions of A10/A20 SoCs' datasheets and
user manuals, so it's also missing in the old drivers. The newest A10
Datasheet V1.70 and A20 Datasheet V1.41 contain this pin function, and
it's discovered during implementing R40 pinctrl driver.

Add it to the driver. As we now merged A20 pinctrl driver to the A10
one, we need to only fix the A10 driver now.

Fixes: f2821b1ca3a2 ("pinctrl: sunxi: Move Allwinner A10 pinctrl
driver to a driver of its own")

Signed-off-by: Icenowy Zheng 
Reviewed-by: Chen-Yu Tsai 
Signed-off-by: Linus Walleij

pinctrl: sunxi: Add support for A83T R_PIO

2017-06-09T09:20:32+00:00

The R_PIO on the A83T is almost the same as the one found on the A64,
except that the CIR_RX function was moved from pin PL11 to pin PL12.

Add a driver for it.

Signed-off-by: Chen-Yu Tsai 
Acked-by: Maxime Ripard 
Signed-off-by: Linus Walleij

pinctrl: sunxi: constify irq_domain_ops

2017-06-09T08:58:58+00:00

struct irq_domain_ops is not modified, so it can be made const.

Suggested-by: Marc Zyngier 
Signed-off-by: Tobias Klauser 
Acked-by: Maxime Ripard 
Signed-off-by: Linus Walleij

pinctrl: sunxi: drop dedicated A20 driver

2017-05-29T16:36:52+00:00

As we added A20 support to A10 pinctrl driver, now we can delete the
dedicated A20 pinctrl driver, which is duplicated code.

Signed-off-by: Icenowy Zheng 
Reviewed-by: Chen-Yu Tsai 
[Drop Makefile entry]
Signed-off-by: Linus Walleij

pinctrl: sunxi: add A20 support to A10 driver

2017-05-29T16:33:56+00:00

As A20 is designed as a pin-compatible upgrade of A10, their pin
controller are very similar, and can share one driver.

Add A20 support to the A10 driver.

Signed-off-by: Icenowy Zheng 
Reviewed-by: Chen-Yu Tsai 
Signed-off-by: Linus Walleij

pinctrl: sunxi: Add SoC ID definitions for A10, A20 and R40 SoCs

2017-05-29T16:31:56+00:00

Allwinner A10, A20 and R40 SoCs have similar GPIO layout.

Add SoC definitions in pinctrl-sunxi.h, in order to merge A20 support
into A10 driver, and add R40 support into it.

Signed-off-by: Icenowy Zheng 
Reviewed-by: Chen-Yu Tsai 
Signed-off-by: Linus Walleij

pinctrl: sunxi: Fix SPDIF function name for A83T

2017-05-23T09:30:56+00:00

We use well known standard names for functions that have name, such as
I2C, SPI, SPDIF, etc..

Fix the function name of SPDIF, which was named OWA (One Wire Audio)
based on Allwinner datasheets.

Fixes: 4730f33f0d82 ("pinctrl: sunxi: add allwinner A83T PIO controller
		      support")
Signed-off-by: Chen-Yu Tsai 
Signed-off-by: Linus Walleij

pinctrl: sunxi: make use of raw_spinlock variants

2017-03-16T15:39:16+00:00

The sunxi pinctrl driver currently implement an irq_chip for handling
interrupts; due to how irq_chip handling is done, it's necessary for the
irq_chip methods to be invoked from hardirq context, even on a a
real-time kernel.  Because the spinlock_t type becomes a "sleeping"
spinlock w/ RT kernels, it is not suitable to be used with irq_chips.

A quick audit of the operations under the lock reveal that they do only
minimal, bounded work, and are therefore safe to do under a raw spinlock.

Signed-off-by: Julia Cartwright 
Signed-off-by: Linus Walleij

pinctrl: sunxi: select GPIOLIB

2017-03-14T13:42:25+00:00

Allwinner pin controllers are also GPIO controllers.

Currently, if GPIOLIB is forgot to be chosen, the build of
pinctrl-sunxi.c will fail for lacking a lot of gpiochip_* functions.

Select GPIOLIB to ensure this driver can be built.

Signed-off-by: Icenowy Zheng 
Signed-off-by: Linus Walleij

pinctrl: sunxi: Add A64 R_PIO controller support

2017-03-14T13:42:24+00:00

The A64 has a R_PIO pin controller, similar to the one found on the H3 SoC.
Add support for the pins controlled by the R_PIO controller.

Signed-off-by: Icenowy Zheng 
Acked-by: Chen-Yu Tsai 
Signed-off-by: Linus Walleij