linux.git/drivers/pinctrl/qcom/Makefile, branch v5.13 Linux kernel source tree pinctrl: qcom: Add sc8180x TLMM driver 2021-02-12T07:52:31+00:00 Bjorn Andersson bjorn.andersson@linaro.org 2021-01-26T04:26:50+00:00 97423113ec4bbfe92c13ff4794d33391ab70ec96 Add pinctrl driver for the sc8180x TLMM block. A noteworthy difference from previous TLMM blocks is that the registers for GPIO 177 through 189 are for some reason offset from the typical layout. Other than that the driver is same old... Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210126042650.1725176-3-bjorn.andersson@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
Add pinctrl driver for the sc8180x TLMM block.

A noteworthy difference from previous TLMM blocks is that the registers
for GPIO 177 through 189 are for some reason offset from the typical
layout. Other than that the driver is same old...

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210126042650.1725176-3-bjorn.andersson@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
pinctrl: qcom: Add SM8350 pinctrl driver 2021-02-12T07:50:14+00:00 Vinod Koul vkoul@kernel.org 2021-02-05T14:01:32+00:00 d5d348a3271f4b4d877ed246d0566ad1b9ec7f5b This adds pincontrol driver for tlmm block found in SM8350 SoC This patch is based on initial code downstream by Raghavendra. Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20210205140132.274242-3-vkoul@kernel.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
This adds pincontrol driver for tlmm block found in SM8350 SoC

This patch is based on initial code downstream by Raghavendra.

Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20210205140132.274242-3-vkoul@kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
pinctrl: qcom: Add sm8250 lpass lpi pinctrl driver 2020-12-05T22:36:24+00:00 Srinivas Kandagatla srinivas.kandagatla@linaro.org 2020-12-02T16:34:43+00:00 6e261d1090d6db0e9dd22978b6f38a2c58558a3f Add initial pinctrl driver to support pin configuration for LPASS (Low Power Audio SubSystem) LPI (Low Power Island) pinctrl on SM8250. This IP is an additional pin control block for Audio Pins on top the existing SoC Top level pin-controller. Hardware setup looks like: TLMM GPIO[146 - 159] --> LPASS LPI GPIO [0 - 13] This pin controller has some similarities compared to Top level msm SoC Pin controller like 'each pin belongs to a single group' and so on. However this one is intended to control only audio pins in particular, which can not be configured/touched by the Top level SoC pin controller except setting them as gpios. Apart from this, slew rate is also available in this block for certain pins which are connected to SLIMbus or SoundWire Bus. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20201202163443.26499-3-srinivas.kandagatla@linaro.org [Add some dependencies] Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
Add initial pinctrl driver to support pin configuration for
LPASS (Low Power Audio SubSystem) LPI (Low Power Island) pinctrl
on SM8250.

This IP is an additional pin control block for Audio Pins on top the
existing SoC Top level pin-controller.
Hardware setup looks like:

TLMM GPIO[146 - 159] --> LPASS LPI GPIO [0 - 13]

This pin controller has some similarities compared to Top level
msm SoC Pin controller like 'each pin belongs to a single group'
and so on. However this one is intended to control only audio
pins in particular, which can not be configured/touched by the
Top level SoC pin controller except setting them as gpios.
Apart from this, slew rate is also available in this block for
certain pins which are connected to SLIMbus or SoundWire Bus.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20201202163443.26499-3-srinivas.kandagatla@linaro.org
[Add some dependencies]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
pinctrl: qcom: Add sc7280 pinctrl driver 2020-11-24T08:37:03+00:00 Rajendra Nayak rnayak@codeaurora.org 2020-11-05T09:56:32+00:00 ecb454594c43456bdeb1bd5cd68ac454db51b2c6 Add initial pinctrl driver to support pin configuration with pinctrl framework for SC7280 SoC Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1604570192-15057-2-git-send-email-rnayak@codeaurora.org [Change select PINCTRL_MSM to depends on PINCTRL_MSM] Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
Add initial pinctrl driver to support pin configuration with
pinctrl framework for SC7280 SoC

Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1604570192-15057-2-git-send-email-rnayak@codeaurora.org
[Change select PINCTRL_MSM to depends on PINCTRL_MSM]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
pinctrl: qcom: Add SDX55 pincontrol driver 2020-11-10T14:45:37+00:00 Jeevan Shriram jshriram@codeaurora.org 2020-11-09T06:26:20+00:00 ac43c44a7a375ae0f0e96e10e227e226f2f2cb70 Add initial Qualcomm SDX55 pinctrl driver to support pin configuration with pinctrl framework for SDX55 SoC. [ported from downstream and tidy up] Signed-off-by: Jeevan Shriram <jshriram@codeaurora.org> Signed-off-by: Vinod Koul <vkoul@kernel.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20201109062620.14566-3-vkoul@kernel.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
Add initial Qualcomm SDX55 pinctrl driver to support pin configuration
with pinctrl framework for SDX55 SoC.

[ported from downstream and tidy up]

Signed-off-by: Jeevan Shriram <jshriram@codeaurora.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20201109062620.14566-3-vkoul@kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
pinctrl: qcom: add pinctrl driver for msm8953 2020-11-10T13:58:14+00:00 Vladimir Lypak junak.pub@gmail.com 2020-10-07T16:06:11+00:00 0e74abf3a0a3a711145f11f3a782432a2df5f744 Add inititial pinctrl driver for MSM8953 platform. Compatible SoCs are: MSM8953, APQ8053, SDM(SDA)450, SDM(SDA)632. Based off CAF implementation. Signed-off-by: Prasad Sodagudi <psodagud@codeaurora.org> Signed-off-by: Vladimir Lypak <junak.pub@gmail.com> Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20201007160611.942754-1-junak.pub@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
Add inititial pinctrl driver for MSM8953 platform. Compatible SoCs are:
MSM8953, APQ8053, SDM(SDA)450, SDM(SDA)632.
Based off CAF implementation.

Signed-off-by: Prasad Sodagudi <psodagud@codeaurora.org>
Signed-off-by: Vladimir Lypak <junak.pub@gmail.com>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20201007160611.942754-1-junak.pub@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
pinctrl: qcom: Add msm8226 pinctrl driver. 2020-08-27T08:27:14+00:00 Bartosz Dudziak bartosz.dudziak@snejp.pl 2020-07-16T20:55:29+00:00 db436a7198a78d8d02178dc992ad5ae2de57cd2e Add initial Qualcomm msm8226 pinctrl driver to support pin configuration with pinctrl framework for msm8226 SoC. - Initial formatting and style was taken from the msm8x74 pinctrl driver added by Björn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Bartosz Dudziak <bartosz.dudziak@snejp.pl> Link: https://lore.kernel.org/r/20200716205530.22910-3-bartosz.dudziak@snejp.pl Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
Add initial Qualcomm msm8226 pinctrl driver to support pin configuration
with pinctrl framework for msm8226 SoC.

- Initial formatting and style was taken from the msm8x74 pinctrl driver
  added by Björn Andersson <bjorn.andersson@linaro.org>

Signed-off-by: Bartosz Dudziak <bartosz.dudziak@snejp.pl>
Link: https://lore.kernel.org/r/20200716205530.22910-3-bartosz.dudziak@snejp.pl
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
pinctrl: qcom: Add sm8250 pinctrl driver. 2020-04-28T09:18:05+00:00 Venkata Narendra Kumar Gutta vnkgutta@codeaurora.org 2020-04-17T06:19:07+00:00 4e3ec9e407ad5058003309072b37111f7b8c900a Add initial Qualcomm SM8250 pinctrl driver to support pin configuration with pinctrl framework for SM8250 SoC. Signed-off-by: Rishabh Bhatnagar <rishabhb@codeaurora.org> Signed-off-by: Venkata Narendra Kumar Gutta <vnkgutta@codeaurora.org> Link: https://lore.kernel.org/r/1586477057-7636-2-git-send-email-vnkgutta@codeaurora.org [bjorn: Regrouped functions, upstream tiles implementation, dropped downstream-only features] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20200417061907.1226490-3-bjorn.andersson@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
Add initial Qualcomm SM8250 pinctrl driver to support pin configuration
with pinctrl framework for SM8250 SoC.

Signed-off-by: Rishabh Bhatnagar <rishabhb@codeaurora.org>
Signed-off-by: Venkata Narendra Kumar Gutta <vnkgutta@codeaurora.org>
Link: https://lore.kernel.org/r/1586477057-7636-2-git-send-email-vnkgutta@codeaurora.org
[bjorn: Regrouped functions, upstream tiles implementation, dropped
        downstream-only features]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20200417061907.1226490-3-bjorn.andersson@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
pinctrl: qcom: Add ipq6018 pinctrl driver 2020-02-14T10:17:04+00:00 Sricharan R sricharan@codeaurora.org 2020-01-19T13:13:18+00:00 ef1ea54eab0ecb072700f59701387f839c8c760d Add initial pinctrl driver to support pin configuration with pinctrl framework for ipq6018. Co-developed-by: Rajkumar Ayyasamy <arajkuma@codeaurora.org> Signed-off-by: Rajkumar Ayyasamy <arajkuma@codeaurora.org> Co-developed-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org> Signed-off-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org> Co-developed-by: Sivaprakash Murugesan <sivaprak@codeaurora.org> Signed-off-by: Sivaprakash Murugesan <sivaprak@codeaurora.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Sricharan R <sricharan@codeaurora.org> Link: https://lore.kernel.org/r/1579439601-14810-3-git-send-email-sricharan@codeaurora.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
Add initial pinctrl driver to support pin configuration with
pinctrl framework for ipq6018.

Co-developed-by: Rajkumar Ayyasamy <arajkuma@codeaurora.org>
Signed-off-by: Rajkumar Ayyasamy <arajkuma@codeaurora.org>
Co-developed-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
Signed-off-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
Co-developed-by: Sivaprakash Murugesan <sivaprak@codeaurora.org>
Signed-off-by: Sivaprakash Murugesan <sivaprak@codeaurora.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Sricharan R <sricharan@codeaurora.org>
Link: https://lore.kernel.org/r/1579439601-14810-3-git-send-email-sricharan@codeaurora.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
pinctrl: qcom: Add a pinctrl driver for MSM8976 and 8956 2019-10-16T13:56:18+00:00 AngeloGioacchino Del Regno kholk11@gmail.com 2019-10-05T10:59:35+00:00 bcd11493f0abb98624cfa8b0949eb5fa2629864b Add the pinctrl driver to support pin configuration with the pinctrl framework on MSM8976, MSM8956, APQ8056, APQ8076. Signed-off-by: AngeloGioacchino Del Regno <kholk11@gmail.com> Link: https://lore.kernel.org/r/20191005105936.31216-2-kholk11@gmail.com Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
Add the pinctrl driver to support pin configuration with the
pinctrl framework on MSM8976, MSM8956, APQ8056, APQ8076.

Signed-off-by: AngeloGioacchino Del Regno <kholk11@gmail.com>
Link: https://lore.kernel.org/r/20191005105936.31216-2-kholk11@gmail.com
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>