linux.git/drivers/pinctrl/intel, branch v4.14-rc4

pinctrl: intel: Read back TX buffer state

2017-08-31T13:34:31+00:00

In the same way as it's done in pinctrl-cherryview.c we would provide
a readback TX buffer state.

Fixes: 17fab473693 ("pinctrl: intel: Set pin direction properly")
Reported-by: "Bourque, Francis" 
Signed-off-by: Andy Shevchenko 
Acked-by: Mika Westerberg 
Tested-by: "Bourque, Francis" 
Signed-off-by: Linus Walleij

pinctrl: intel: Decrease indentation in intel_gpio_set()

2017-08-31T12:46:36+00:00

Decrease indentation in intel_gpio_set() to make it looking slightly better
and be in align with intel_gpio_get().

Signed-off-by: Andy Shevchenko 
Acked-by: Mika Westerberg 
Signed-off-by: Linus Walleij

pinctrl: intel: Add Intel Lewisburg GPIO support

2017-08-22T13:42:19+00:00

Intel Lewisburg has the same GPIO hardware than Intel Sunrisepoint-H
except few differences in register offsets and pin lists. Because of
this we add a separate pinctrl driver for Lewisburg.

Signed-off-by: Mika Westerberg 
Signed-off-by: Linus Walleij

pinctrl: intel: Add Intel Cannon Lake PCH-H pin controller support

2017-08-22T13:41:25+00:00

This is desktop version Intel Cannon Lake PCH. The GPIO hardware is the
same but pin list differs a bit. Add support for this to the existing
Cannon Lake pin controller driver.

Signed-off-by: Andy Shevchenko 
Signed-off-by: Mika Westerberg 
Signed-off-by: Linus Walleij

pinctrl: intel: Disable GPIO pin interrupts in suspend

2017-08-22T12:46:15+00:00

The fix prevents unintended wakes from second level GPIO pin interrupts.

On some Intel Kabylake platforms, it is observed that GPIO pin interrupts
can wake the platform from suspend-to-idle, even though the IRQ is not
configured as IRQF_NO_SUSPEND or enable_irq_wake().

This can cause undesired wakes on Mobile devices such as Laptops and
Chromebook devices. For example a headset jack insertion is not a desired
wake source on Chromebook devices.

The pinctrl-intel (GPIO controller) driver implements a "Shared IRQ" model.
All GPIO pin interrupts are OR'ed and mapped to a first level IRQ14 (or
IRQ15). The driver registers an irq_chip struct and maps an irq_domain for
the GPIO pin interrupts. The IRQ14 handler demuxes and calls the second
level IRQ for the respective pin.

In the suspend entry flow, at suspend_noirq stage, the kernel disables IRQs
that are not marked for wake. The pinctrl-intel driver does not implement a
irq_disable()  callback (to take advantage of lazy disabling). The
pinctrl-intel GPIO interrupts are not disabled in hardware during suspend
entry, and thus are able to wake the SoC out of suspend-to-idle.

This patch sets the IRQCHIP_MASK_ON_SUSPEND flag for the GPIO irq_chip, to
disable the second level interrupts at suspend_noirq stage via the irq_mask
callbacks. The irq_mask callback disables the IRQs in hardware by
programming the corresponding GPIO pad registers. Only IRQs that are not
marked for wake are disabled.

Signed-off-by: Rushikesh S Kadam 
Acked-by: Mika Westerberg 
Reviewed-by: Andy Shevchenko 
Reviewed-and-tested-by: Rajneesh Bhardwaj 
Signed-off-by: Linus Walleij

pinctrl: intel: Add Intel Denverton pin controller support

2017-08-14T13:01:59+00:00

This driver adds pinctrl/GPIO support for Intel Denverton SoC. The GPIO
controller is based on the same hardware design that is already used in
Intel Sunrisepoint so we leverage the core driver here.

Signed-off-by: Mika Westerberg 
Reviewed-by: Andy Shevchenko 
Signed-off-by: Linus Walleij

pinctrl: intel: wrap Intel pin control drivers in an architecture check

2017-08-14T13:01:02+00:00

The Intel pin control drivers are architecture specific so add an if arch
to check for X86 or compile test to ensure continued test coverage.

Signed-off-by: Peter Robinson 
Reviewed-by: Heikki Krogerus 
Acked-by: Mika Westerberg 
Signed-off-by: Linus Walleij

pinctrl: baytrail: Do not call WARN_ON for a firmware bug

2017-08-14T13:01:01+00:00

WARN_ON causes a backtrace to get logged which is only useful for
kernel bugs. For signalling a firmware bug dev_warn(dev, FW_BUG "...")
should be used.

This fixes users running userspace software to monitor kernel oopses
getting a false positive bug-report every boot because of the wrong
use of WARN_ON.

Signed-off-by: Hans de Goede 
Acked-by: Andy Shevchenko 
Signed-off-by: Linus Walleij

pinctrl: intel: merrifield: Correct UART pin lists

2017-08-07T13:23:11+00:00

UART pin lists consist GPIO numbers which is simply wrong.
Replace it by pin numbers.

Fixes: 4e80c8f50574 ("pinctrl: intel: Add Intel Merrifield pin controller support")
Signed-off-by: Andy Shevchenko 
Acked-by: Mika Westerberg 
Signed-off-by: Linus Walleij

pinctrl: cherryview: Add Setzer models to the Chromebook DMI quirk

2017-08-03T08:18:34+00:00

Add one more model to the Chromebook DMI quirk to make it working again.

Link: https://bugzilla.kernel.org/show_bug.cgi?id=194945
Fixes: 2a8209fa6823 ("pinctrl: cherryview: Extend the Chromebook DMI quirk to Intel_Strago systems")
Reported-by: mail@abhishek.geek.nz
Signed-off-by: Andy Shevchenko 
Acked-by: Mika Westerberg 
Signed-off-by: Linus Walleij