Pull pin control updates from Linus Walleij:
 "This is the bulk of pin control changes for the v5.11 kernel.

  Drivers, drivers and drivers. Not a single core change.

  Some new stuff, especially a bunch of new Intel, Qualcomm and Ocelot
  SoCs.

  As part of the modularization attempt, I applied one patch affecting
  the firmware subsystem as a functional (not syntactic/semantic)
  dependency and then it blew up in our face, so I had to revert it,
  bummer. It will come in later, through that subsystem, I guess.

  New drivers:

   - New driver for the Microchip Serial GPIO "SGPIO".

   - Qualcomm SM8250 LPASS (Low Power Audio Subsystem) GPIO driver.

  New subdrivers:

   - Intel Lakefield subdriver.

   - Intel Elkhart Lake subdriver.

   - Intel Alder Lake-S subdriver.

   - Qualcomm MSM8953 subdriver.

   - Qualcomm SDX55 subdriver.

   - Qualcomm SDX55 PMIC subdriver.

   - Ocelot Luton SoC subdriver.

   - Ocelot Serval SoC subdriver.

  Modularization:

   - The Meson driver can now be built as modules.

   - The Qualcomm driver(s) can now be built as modules.

  Incremental improvements:

   - The Intel driver now supports pin configuration for GPIO-related
     configurations.

   - A bunch of Renesas PFC drivers have been augmented with support for
     QSPI pins, groups and functions.

   - Non-critical fixes to the irq handling in the Allwinner Sunxi
     driver"

* tag 'pinctrl-v5.11-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (80 commits)
  pinctrl/spear: simplify the return expression of spear300_pinctrl_probe()
  pinctrl: mediatek: simplify the return expression of mtk_pinconf_bias_disable_set_rev1()
  dt-bindings: pinctrl: pinctrl-microchip-sgpio: Add irq support
  pinctrl: pinctrl-microchip-sgpio: Add irq support (for sparx5)
  pinctrl: qcom: Add sm8250 lpass lpi pinctrl driver
  dt-bindings: pinctrl: qcom: Add sm8250 lpass lpi pinctrl bindings
  pinctrl: qcom-pmic-gpio: Add support for pmx55
  dt-bindings: pinctrl: qcom-pmic-gpio: Add pmx55 support
  pinctrl: pinctrl-microchip-sgpio: Mark some symbols with static keyword
  pinctrl: at91-pio4: Make PINCTRL_AT91PIO4 depend on HAS_IOMEM to fix build error
  pinctrl: mtk: Fix low level output voltage issue
  pinctrl: falcon: add missing put_device() call in pinctrl_falcon_probe()
  pinctrl: actions: pinctrl-s500: Constify s500_padinfo[]
  pinctrl: pinctrl-microchip-sgpio: Add OF config dependency
  pinctrl: pinctrl-microchip-sgpio: Add pinctrl driver for Microsemi Serial GPIO
  dt-bindings: pinctrl: Add bindings for pinctrl-microchip-sgpio driver
  pinctrl: at91-pio4: add support for fewer lines on last PIO bank
  pinctrl: sunxi: Always call chained_irq_{enter, exit} in sunxi_pinctrl_irq_handler
  pinctrl: sunxi: Mark the irq bank not found in sunxi_pinctrl_irq_handler() with WARN_ON
  pinctrl: sunxi: fix irq bank map for the Allwinner A100 pin controller
  ...

This adds 'interrupt-controller' features for the signals available on
the Microchip SGPIO controller, however only for controller versions
on the Sparx5 platform (or later).

Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
Link: https://lore.kernel.org/r/20201209142753.683208-2-lars.povlsen@microchip.com
[Select GPIOLIB_IRQCHIP in Kconfig]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

These Socs have 1-3 banks of 8-32 gpios. Rather then setting the muxing of each
pin individually, these socs have mux groups that when set will effect 1-N pins.
Pin groups have a 2, 4 or 8 different muxes.

Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Link: https://lore.kernel.org/r/20201208075523.7060-3-sergio.paracuellos@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

If CONFIG_HAS_IOMEM is not set, devm_platform_ioremap_resource() will
be not built in drivers/base/platform.c and then there exists a build
error about undefined reference to "devm_platform_ioremap_resource"
in pinctrl-at91-pio4.c under COMPILE_TEST and CONFIG_PINCTRL_AT91PIO4,
make PINCTRL_AT91PIO4 depend on HAS_IOMEM to fix it.

Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn>
Link: https://lore.kernel.org/r/1606209423-4742-1-git-send-email-yangtiezhu@loongson.cn
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

The pinctrl-microchip-sgpio driver needs OF support, so add that to
Kconfig.

Reported-by: Randy Dunlap <rdunlap@infradead.org>
Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
Acked-by: Randy Dunlap <rdunlap@infradead.org>
Link: https://lore.kernel.org/r/20201125122014.11237-1-lars.povlsen@microchip.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

This adds a pinctrl driver for the Microsemi/Microchip Serial GPIO
(SGPIO) device used in various SoC's.

The driver is added as a pinctrl driver, albeit only having just GPIO
support currently. The hardware supports other functions that will be
added following.

Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
Link: https://lore.kernel.org/r/20201113145151.68900-3-lars.povlsen@microchip.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

pinctrl: renesas: Updates for v5.10

  - Add CAN and USB1 PWEN pin groups on R-Car H2 and RZ/G1,
  - Three more conversion of DT bindings to json-schema,
  - Group all Renesas pinctrl drivers and improve visual Kconfig
    structure,
  - Rename drivers/pinctrl/sh-pfc to drivers/pinctrl/renesas,
  - Minor fixes and improvements.

The drivers/pinctrl/sh-pfc subdirectory was originally created to group
pin control drivers for various Renesas SuperH and SH-Mobile platforms.
However, the name "sh-pfc" no longer reflects its contents, as the
directory now contains pin control drivers for Renesas SuperH, ARM32,
and ARM64 SoCs.

Hence rename the subdirectory from drivers/pinctrl/sh-pfc to
drivers/pinctrl/renesas, and the related Kconfig symbol from
PINCTRL_SH_PFC to PINCTRL_RENESAS.

Rename the git branch in MAINTAINERS, too, for consistency.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20200909131534.12897-3-geert+renesas@glider.be

Renesas related pinctrl CONFIGs are located in many places, which is
confusing.
This patch collects them into the same place, grouped in a new "Renesas
pinctrl drivers" menu.
This patch also moves pinctrl-rz{a1,a2,n1}.c into the sh-pfc folder.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Link: https://lore.kernel.org/r/87k0xoy4r7.wl-kuninori.morimoto.gx@renesas.com
[geert: Update path in MAINTAINERS]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

The Rockchip pinctrl driver needs to handle information from Devicetree
so only makes sense getting compiled on systems with CONFIG_OF enabled.

This also fixes a problem found by the "kernel-test-robot" when compiling
the driver on test-builds that do not have CONFIG_OF enabled:

  drivers/pinctrl/pinctrl-rockchip.c: In function 'rockchip_pinctrl_parse_groups':
>> drivers/pinctrl/pinctrl-rockchip.c:2881:9: error: implicit declaration of function 'pinconf_generic_parse_dt_config'; did you mean 'pinconf_generic_dump_config'? [-Werror=implicit-function-declaration]
    2881 |   ret = pinconf_generic_parse_dt_config(np_config, NULL,
         |         ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
         |         pinconf_generic_dump_config
   drivers/pinctrl/pinctrl-rockchip.c: In function 'rockchip_gpiolib_register':
>> drivers/pinctrl/pinctrl-rockchip.c:3473:5: error: 'struct gpio_chip' has no member named 'of_node'
    3473 |   gc->of_node = bank->of_node;

Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Link: https://lore.kernel.org/r/20200905214955.907950-1-heiko@sntech.de
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>