linux.git/drivers/pinctrl/Kconfig, branch v3.11

Merge tag 'pinctrl-for-v3.11-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

2013-07-03T18:48:03+00:00

Pull pin control changes from Linus Walleij:

- A large slew of improvements of the Genric pin configuration support,
and deployment in four different platforms: Rockchip, Super-H PFC,
ABx500 and TZ1090. Support BIAS_BUS_HOLD, get device tree parsing
and debugfs support into shape.

- We also have device tree support with generic naming conventions for
the generic pin configuration.

- Delete the unused and confusing direct pinconf API. Now state
transitions is *the* way to control pins and multiplexing.

- New drivers for Rockchip, TZ1090, and TZ1090 PDC.

- Two pin control states related to power management are now handled in
the device core: "sleep" and "idle", removing a lot of boilerplate
code in drivers. We do not yet know if this is the final word for
pin PM, but it already make things a lot easier to handle.

- Handle sparse GPIO ranges passing a list of disparate pins, and
utilize these in the new BayTrail (x86 Atom SoC) driver.

- Make the sunxi (AllWinner) driver handle external interrupts.

- Make it possible for pinctrl-single to handle the case where several
pins are managed by a single register, and augment it to handle sleep
modes.

- Cleanups and improvements for the abx500 drivers.

- Move Sirf pin control drivers to their own directory, support
save/restore of context and add support for the SiRFatlas6 SoC.

- PMU muxing for the Dove pinctrl driver.

- Finalization and support for VF610 in the i.MX6 pinctrl driver.

- Smoothen out various Exynos rough edges.

- Generic cleanups of various kinds.

* tag 'pinctrl-for-v3.11-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (82 commits)
pinctrl: vt8500: wmt: remove redundant dev_err call in wmt_pinctrl_probe()
pinctrl: remove bindings for pinconf options needing more thought
pinctrl: remove slew-rate parameter from tz1090
pinctrl: set unit for debounce time pinconfig to usec
pinctrl: more clarifications for generic pull configs
pinctrl: rip out the direct pinconf API
pinctrl-tz1090-pdc: add TZ1090 PDC pinctrl driver
pinctrl-tz1090: add TZ1090 pinctrl driver
pinctrl: samsung: Staticize drvdata_list
pinctrl: rockchip: Add missing irq_gc_unlock() call before return error
pinctrl: abx500: rework error path
pinctrl: abx500: suppress hardcoded value
pinctrl: abx500: factorize code
pinctrl: abx500: fix abx500_gpio_get()
pinctrl: abx500: fix abx500_pin_config_set()
pinctrl: abx500: Add device tree support
sh-pfc: Guard DT parsing with #ifdef CONFIG_OF
pinctrl: add Intel BayTrail GPIO/pinctrl support
pinctrl: fix pinconf_ops::pin_config_dbg_parse_modify kerneldoc
pinctrl: Staticize local symbols
...

Conflicts:
drivers/net/ethernet/ti/davinci_mdio.c
drivers/pinctrl/Makefile

Merge tag 'regmap-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regmap

2013-07-03T18:40:58+00:00

Pull regmap updates from Mark Brown:
 "A small but useful set of regmap updates this time around:

   - An abstraction for bitfields within a register map contributed by
     Srinivas Kandagatla, allowing drivers to cope more easily when
     hardware designers randomly move things about (mainly when talking
     to things like system controllers).

   - Changes from Lars-Peter Clausen to allow the MMIO regmap to be used
     from hard IRQ context.

   - Small improvements to the cache infrastructure and performance,
     including a default cache sync operation so now all regmaps can
     sync easily.

  There's also a pinctrl driver making use of the new bitfield API,
  merged here for dependency reasons.  There will be a simple add/add
  conflict with the pinctrl tree as a result."

* tag 'regmap-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regmap:
  pinctrl: st: Remove unnecessary use of of_match_ptr macro
  pinctrl: st: fix return value check
  pinctrl: st: Add pinctrl and pinconf support.
  regmap: debugfs: Suppress cache for partial register files
  regmap: Add regmap_field APIs
  regmap: core: Cache all registers by default when cache is enabled
  regmap: Implemented default cache sync operation
  regmap: Make regmap-mmio usable from atomic contexts
  regmap: regcache: Fixup locking for custom lock callbacks
  regmap: debugfs: Fix return from regmap_debugfs_get_dump_start
  regmap: debugfs: Don't mark lockdep as broken due to debugfs write
  regmap: rbtree: Use range information to allocate nodes
  regmap: rbtree: Factor out node allocation
  regmap: Make regmap_check_range_table() a public API
  regmap: Add support for discarding parts of the register cache

Merge tag 'drivers-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

2013-07-02T21:33:21+00:00

Pull ARM SoC driver specific changes from Arnd Bergmann:
 "These changes are all driver specific and cross over between arm-soc
  contents and some other subsystem, in these cases cpufreq, crypto,
  dma, pinctrl, mailbox and usb, and the subsystem owners agreed to have
  these changes merged through arm-soc.

  As we proceed to untangle the dependencies between platform code and
  driver code, the amount of changes in this category is fortunately
  shrinking, for 3.11 we have 16 branches here and 101 non-merge
  changesets, the majority of which are for the stedma40 dma engine
  driver used in the ux500 platform.  Cleaning up that code touches
  multiple subsystems, but gets rid of the dependency in the end.

  The mailbox code moved out from mach-omap2 to drivers/mailbox is an
  intermediate step and is still omap specific at the moment.  Patches
  exist to generalize the subsystem and add other drivers with the same
  API, but those did not make it for 3.11."

* tag 'drivers-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (101 commits)
  crypto: ux500: use dmaengine_submit API
  crypto: ux500: use dmaengine_prep_slave_sg API
  crypto: ux500: use dmaengine_device_control API
  crypto: ux500/crypt: add missing __iomem qualifiers
  crypto: ux500/hash: add missing static qualifiers
  crypto: ux500/hash: use readl on iomem addresses
  dmaengine: ste_dma40: Declare memcpy config as static
  ARM: ux500: Remove mop500_snowball_ethernet_clock_enable()
  ARM: ux500: Correct the EN_3v3 regulator's on/off GPIO
  ARM: ux500: Provide a AB8500 GPIO Device Tree node
  gpio: rcar: fix gpio_rcar_of_table
  gpio-rcar: Remove #ifdef CONFIG_OF around OF-specific sections
  gpio-rcar: Reference core gpio documentation in the DT bindings
  clk: exynos5250: Add enum entries for divider clock of i2s1 and i2s2
  ARM: dts: Update Samsung I2S documentation
  ARM: dts: add clock provider information for i2s controllers in Exynos5250
  ARM: dts: add Exynos audio subsystem clock controller node
  clk: samsung: register audio subsystem clocks using common clock framework
  ARM: dts: use #include for all device trees for Samsung
  pinctrl: s3c24xx: use correct header for chained_irq functions
  ...

pinctrl: st: Add pinctrl and pinconf support.

2013-06-25T15:22:19+00:00

This patch add pinctrl support to ST SoCs.

About hardware:
ST Set-Top-Box parts have two blocks called PIO and PIO-mux which handle
pin configurations.

Each multi-function pin is controlled, driven and routed through the PIO
multiplexing block. Each pin supports GPIO functionality (ALT0) and
multiple alternate functions(ALT1 - ALTx) that directly connect the pin
to different hardware blocks. When a pin is in GPIO mode, Output Enable
(OE), Open Drain(OD), and Pull Up (PU) are driven by the related PIO
block. Otherwise the PIO multiplexing block configures these parameters
and retiming the signal.

About driver:
This pinctrl driver manages both PIO and PIO-mux block using pinctrl,
pinconf, pinmux, gpio subsystems. All the pinctrl related config
information can only come from device trees.

Signed-off-by: Srinivas Kandagatla 
Acked-by: Linus Walleij 
Signed-off-by: Mark Brown

pinctrl-tz1090-pdc: add TZ1090 PDC pinctrl driver

2013-06-24T15:21:38+00:00

Add a pin control driver for the TZ1090's low power pins via the
powerdown controller SOC_GPIO_CONTROL registers.

These pins have individually controlled pull-up, and group controlled
schmitt, slew-rate, drive-strength, and power-on-start (pos).

The pdc_gpio0 and pdc_gpio1 pins can also be muxed onto the
ir_mod_stable_out and ir_mod_power_out functions respectively. If no
function is set they remain in GPIO mode. These muxes can be overridden
by requesting them as GPIOs.

Signed-off-by: James Hogan 
Cc: Grant Likely 
Cc: Rob Herring 
Cc: Rob Landley 
Cc: Linus Walleij 
Cc: linux-doc@vger.kernel.org
Cc: devicetree-discuss@lists.ozlabs.org
Signed-off-by: Linus Walleij

pinctrl-tz1090: add TZ1090 pinctrl driver

2013-06-24T15:21:38+00:00

Add a pin control driver for the main pins on the TZ1090 SoC. This
doesn't include the low-power pins as they're controlled separately via
the Powerdown Controller (PDC) registers.

Signed-off-by: James Hogan 
Cc: Grant Likely 
Cc: Rob Herring 
Cc: Rob Landley 
Cc: Linus Walleij 
Cc: linux-doc@vger.kernel.org
Cc: devicetree-discuss@lists.ozlabs.org
Signed-off-by: Linus Walleij

ARM: EXYNOS: Select PINCTRL_EXYNOS for exynos4/5 at chip level

2013-06-18T18:41:37+00:00

Previously if you had MACH_EXYNOS5_DT but not MACH_EXYNOS4_DT you'd be
missing the pincontrol definitions.  Move PINCTRL selects to the arch
level since we should be enabling the code for all exynos variants.

Update the PINCTRL descriptions to indicate that PINCTRL_EXYNOS is not
for exynos5440.  Also add basic dependencies for the PINCTRL_EXYNOS
kernel config.

Signed-off-by: Doug Anderson 
Acked-by: Linus Walleij 
Signed-off-by: Kukjin Kim

pinctrl: add Intel BayTrail GPIO/pinctrl support

2013-06-18T15:23:40+00:00

Add support for gpio on Intel BayTrail platforms. BayTrail supports 3 banks
of gpios called SCORE, NCORE ans SUS with 102, 28 and 44 gpio pins.
Supports gpio interrupts and ACPI gpio events

Pins may be muxed to alternate function instead of gpio by firmware.
This driver does not touch the pin muxing and expect firmare
to set pin muxing and pullup/down properties properly.

Signed-off-by: Mathias Nyman 
Signed-off-by: Linus Walleij

pinctrl: add pinctrl driver for Rockchip SoCs

2013-06-16T09:57:32+00:00

This driver adds support the Cortex-A9 based SoCs from Rockchip,
so at least the RK2928, RK3066 (a and b) and RK3188.
Earlier Rockchip SoCs seem to use similar mechanics for gpio
handling so should be supportable with relative small changes.
Pull handling on the rk3188 is currently a stub, due to it being
a bit different to the earlier SoCs.

Pinmuxing as well as gpio (and interrupt-) handling tested on
a rk3066a based machine.

Signed-off-by: Heiko Stuebner 
Signed-off-by: Linus Walleij

pinctrl: add VF610 pinctrl driver

2013-06-16T09:56:51+00:00

Adds Freescale Vybrid VF610 pin controller
driver to IMX common pinctrl driver framework.

Signed-off-by: Jingchang Lu 
Acked-by: Shawn Guo 
Signed-off-by: Linus Walleij