ti_pipe3_power_on() sets variable 'ret' but never uses it, so remove it.

drivers/phy/ti/phy-ti-pipe3.c:340:6: warning: variable ‘ret’ set but not
used [-Wunused-but-set-variable]

Link: https://lore.kernel.org/r/20200629145010.122675-4-vkoul@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>

dm816x_usb_phy_init() sets variable 'error' but never uses it, so remove
it.

drivers/phy/ti/phy-dm816x-usb.c:85:6: warning: variable ‘error’ set but
not used [-Wunused-but-set-variable]

Link: https://lore.kernel.org/r/20200629145010.122675-3-vkoul@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>

clk_div_table and wiz_regmap_config are not modified and can therefore
be made const to allow the compiler to put them in read-only memory.

Before:
   text    data     bss     dec     hex filename
  20265    7044      64   27373    6aed drivers/phy/ti/phy-j721e-wiz.o

After:
   text    data     bss     dec     hex filename
  20649    6660      64   27373    6aed drivers/phy/ti/phy-j721e-wiz.o

Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com>
Link: https://lore.kernel.org/r/20200524095516.25227-3-rikard.falkeborn@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>

regmap_config is not modified and can be made static to allow the compiler
to put it in read-only memory.

Before:
   text    data     bss     dec     hex filename
  12328    3644      64   16036    3ea4 drivers/phy/ti/phy-am654-serdes.o

After:
   text    data     bss     dec     hex filename
  12648    3324      64   16036    3ea4 drivers/phy/ti/phy-am654-serdes.o

Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com>
Link: https://lore.kernel.org/r/20200524095516.25227-2-rikard.falkeborn@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>

The SERDES PHY can support USB super-speed lane.
Add support for that.

Signed-off-by: Roger Quadros <rogerq@ti.com>
Link: https://lore.kernel.org/r/20200513131254.10497-3-rogerq@ti.com
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>

The max_register property must be set in order to
show up the registers in debugfs.

Signed-off-by: Roger Quadros <rogerq@ti.com>
Link: https://lore.kernel.org/r/20200513131254.10497-2-rogerq@ti.com
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>

Move private definitions from header to phy-omap-usb2.c file.
Get rid of unused data structures usb_dpll_params and omap_usb_phy_type.

Signed-off-by: Roger Quadros <rogerq@ti.com>
Link: https://lore.kernel.org/r/20200515080518.26870-2-rogerq@ti.com
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>

Fix to return negative error code from some error handling
cases instead of 0, as done elsewhere in this function.

Fixes: 091876cc355d ("phy: ti: j721e-wiz: Add support for WIZ module present in TI J721E SoC")
Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com>
Acked-by: Roger Quadros <rogerq@ti.com>
Link: https://lore.kernel.org/r/20200507054109.110849-1-weiyongjun1@huawei.com
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>

For DisplayPort use we need to set WIZ_CONFIG_LANECTL register's
P_STANDARD_MODE bits to "mode 3". In the DisplayPort use also the
P_ENABLE bits of the same register are set to P_ENABLE instead of
P_ENABLE_FORCE, so that the DisplayPort driver can enable and disable
the lane as needed. The DisplayPort mode is selected according to
"cdns,phy-type"-properties found in link subnodes under the managed
serdes (see "ti,sierra-phy-t0" and "ti,j721e-serdes-10g" devicetree
bindings for details). All other values of "cdns,phy-type"-property
but PHY_TYPE_DP will set P_STANDARD_MODE bits to 0 and P_ENABLE bits
to force enable.

Signed-off-by: Jyri Sarha <jsarha@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>