linux.git/drivers/phy/qualcomm/Makefile, branch v6.4

phy: qcom: Add QCOM SNPS eUSB2 repeater driver

2023-02-16T13:10:27+00:00

PM8550B contains a eUSB2 repeater used for making the eUSB2 from
SM8550 USB 2.0 compliant. This can be modelled SW-wise as a Phy.
So add a new phy driver for it.

Signed-off-by: Abel Vesa 
Link: https://lore.kernel.org/r/20230208190200.2966723-5-abel.vesa@linaro.org
Signed-off-by: Vinod Koul

phy: qcom: Add QCOM SNPS eUSB2 driver

2023-02-10T17:00:31+00:00

The SM8550 SoC uses Synopsis eUSB2 PHY for USB 2.0.
Add a new driver for it.

The driver is based on a downstream implementation.

Signed-off-by: Abel Vesa 
Link: https://lore.kernel.org/r/20230208183421.2874423-3-abel.vesa@linaro.org
Signed-off-by: Vinod Koul

phy: qcom-qmp: Introduce Kconfig symbols for discrete drivers

2023-02-03T13:51:12+00:00

Introduce a config option for each QMP PHY driver now that the QMP PHY
mega-driver has been split up into different modules. This allows kernel
configurators to limit the binary size of the kernel by only compiling
in the QMP PHY driver that they need.

Leave the old config QCOM_QMP in place and make it into a menuconfig so
that 'make olddefconfig' continues to work. Furthermore, set the default
of the new Kconfig symbols to be QCOM_QMP so that the transition is
smooth.

Reviewed-by: Dmitry Baryshkov 
Reviewed-by: Johan Hovold 
Signed-off-by: Stephen Boyd 
Link: https://lore.kernel.org/r/20230202215330.2152726-1-swboyd@chromium.org
Signed-off-by: Vinod Koul

phy: qcom-qmp: switch to new split QMP PHY driver

2022-06-09T18:19:41+00:00

Use new split QMP PHY driver and remove all monolith phy-qcom-qmp
driver.

Acked-by: Bjorn Andersson 
Tested-by: Bjorn Andersson  # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov 
Link: https://lore.kernel.org/r/20220607213203.2819885-13-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul

phy: qcom: Introduce new eDP PHY driver

2021-11-23T05:10:17+00:00

Many recent Qualcomm platforms comes with native DP and eDP support.
This consists of a controller in the MDSS and a QMP-like PHY.

While similar to the well known QMP block, the eDP PHY only has TX lanes
and the programming sequences are slightly different. Rather than
continuing the trend of parameterize the QMP driver to pieces, this
introduces the support as a new driver.

The registration of link and pixel clocks are borrowed from the QMP
driver. The non-DP link frequencies are omitted for now.

The eDP PHY is very similar to the dedicated (non-USB) DP PHY, but only
the prior is supported for now.

Signed-off-by: Bjorn Andersson 
Reviewed-by: Stephen Boyd 
Link: https://lore.kernel.org/r/20211103234410.1352424-2-bjorn.andersson@linaro.org
Signed-off-by: Vinod Koul

phy: qualcomm: add qcom ipq806x dwc usb phy driver

2020-07-20T06:24:03+00:00

This has lost in the original push for the dwc3 qcom driver.
This is needed for ipq806x SoC as without this the usb ports
doesn't work at all.

Signed-off-by: Andy Gross 
Signed-off-by: Ansuel Smith 
Tested-by: Jonathan McDowell 
Link: https://lore.kernel.org/r/20200717131635.11076-1-ansuelsmth@gmail.com
Signed-off-by: Vinod Koul

phy: qcom: remove ufs qmp phy driver

2020-07-08T11:07:05+00:00

The UFS specific QMP PHY driver started off supporting the 14nm and
20nm hardware. With the 20nm support marked broken for a long time and
the 14nm support added to the common QMP PHY, this driver has not been
used in a while. So delete it

Reviewed-by: Bjorn Andersson 
Link: https://lore.kernel.org/r/20200629145452.123035-1-vkoul@kernel.org
Signed-off-by: Vinod Koul

phy: qcom-snps: Add SNPS USB PHY driver for QCOM based SOCs

2020-05-05T05:14:04+00:00

This adds the SNPS FemtoPHY V2 driver used in QCOM SOCs.  There
are potentially multiple instances of this UTMI PHY on the
SOC, all which can utilize this driver.  The V2 driver will
have a different register map compared to V1.

Signed-off-by: Wesley Cheng 
Reviewed-by: Philipp Zabel 
Reviewed-by: Manu Gautam 
Reviewed-by: Vinod Koul 
Reviewed-by: Stephen Boyd 
Link: https://lore.kernel.org/r/1588636467-23409-3-git-send-email-wcheng@codeaurora.org
Signed-off-by: Vinod Koul

phy: add driver for Qualcomm IPQ40xx USB PHY

2020-05-04T07:37:29+00:00

Add a driver to setup the USB PHY-s on Qualcom m IPQ40xx series SoCs.
The driver sets up HS and SS phys.

Signed-off-by: John Crispin 
Signed-off-by: Robert Marko 
Cc: Luka Perkov 
Link: https://lore.kernel.org/r/20200503201823.531757-1-robert.marko@sartura.hr
Signed-off-by: Vinod Koul

phy: qualcomm: usb: Add SuperSpeed PHY driver

2020-03-20T14:04:29+00:00

Controls Qualcomm's SS PHY 1.0.0 implemented on various SoCs on both the
20nm and 28nm process nodes.

Based on Sriharsha Allenki's  original code.

[bod: Removed dependency on extcon.
      Switched to gpio-usb-conn to handle VBUS On/Off
      Switched to usb-role-switch to bind gpio-usb-conn to DWC3]
Signed-off-by: Jorge Ramirez-Ortiz 
Cc: Jorge Ramirez-Ortiz 
Cc: Sriharsha Allenki's 
Cc: Andy Gross 
Cc: Bjorn Andersson 
Cc: Kishon Vijay Abraham I 
Cc: Philipp Zabel 
Cc: linux-arm-msm@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Reviewed-by: Philipp Zabel 
Tested-by: Bjorn Andersson 
Signed-off-by: Bryan O'Donoghue 
Signed-off-by: Kishon Vijay Abraham I