<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux.git/drivers/phy/qualcomm/Kconfig, branch v6.3</title>
<subtitle>Linux kernel source tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/'/>
<entry>
<title>phy: qcom: Add QCOM SNPS eUSB2 repeater driver</title>
<updated>2023-02-16T13:10:27+00:00</updated>
<author>
<name>Abel Vesa</name>
<email>abel.vesa@linaro.org</email>
</author>
<published>2023-02-08T19:01:57+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=56d77c9a10d97d15b8da900f861bc28b06b84b1c'/>
<id>56d77c9a10d97d15b8da900f861bc28b06b84b1c</id>
<content type='text'>
PM8550B contains a eUSB2 repeater used for making the eUSB2 from
SM8550 USB 2.0 compliant. This can be modelled SW-wise as a Phy.
So add a new phy driver for it.

Signed-off-by: Abel Vesa &lt;abel.vesa@linaro.org&gt;
Link: https://lore.kernel.org/r/20230208190200.2966723-5-abel.vesa@linaro.org
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
PM8550B contains a eUSB2 repeater used for making the eUSB2 from
SM8550 USB 2.0 compliant. This can be modelled SW-wise as a Phy.
So add a new phy driver for it.

Signed-off-by: Abel Vesa &lt;abel.vesa@linaro.org&gt;
Link: https://lore.kernel.org/r/20230208190200.2966723-5-abel.vesa@linaro.org
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>phy: qcom: Add QCOM SNPS eUSB2 driver</title>
<updated>2023-02-10T17:00:31+00:00</updated>
<author>
<name>Abel Vesa</name>
<email>abel.vesa@linaro.org</email>
</author>
<published>2023-02-08T18:34:17+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=80090810f5d332bc41f1e64382ceca41fb1e16e3'/>
<id>80090810f5d332bc41f1e64382ceca41fb1e16e3</id>
<content type='text'>
The SM8550 SoC uses Synopsis eUSB2 PHY for USB 2.0.
Add a new driver for it.

The driver is based on a downstream implementation.

Signed-off-by: Abel Vesa &lt;abel.vesa@linaro.org&gt;
Link: https://lore.kernel.org/r/20230208183421.2874423-3-abel.vesa@linaro.org
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The SM8550 SoC uses Synopsis eUSB2 PHY for USB 2.0.
Add a new driver for it.

The driver is based on a downstream implementation.

Signed-off-by: Abel Vesa &lt;abel.vesa@linaro.org&gt;
Link: https://lore.kernel.org/r/20230208183421.2874423-3-abel.vesa@linaro.org
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>phy: qcom-qmp: Introduce Kconfig symbols for discrete drivers</title>
<updated>2023-02-03T13:51:12+00:00</updated>
<author>
<name>Stephen Boyd</name>
<email>swboyd@chromium.org</email>
</author>
<published>2023-02-02T21:53:29+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=d1abd69534bec16c43c633313e8e937af1354a7a'/>
<id>d1abd69534bec16c43c633313e8e937af1354a7a</id>
<content type='text'>
Introduce a config option for each QMP PHY driver now that the QMP PHY
mega-driver has been split up into different modules. This allows kernel
configurators to limit the binary size of the kernel by only compiling
in the QMP PHY driver that they need.

Leave the old config QCOM_QMP in place and make it into a menuconfig so
that 'make olddefconfig' continues to work. Furthermore, set the default
of the new Kconfig symbols to be QCOM_QMP so that the transition is
smooth.

Reviewed-by: Dmitry Baryshkov &lt;dmitry.baryshkov@linaro.org&gt;
Reviewed-by: Johan Hovold &lt;johan+linaro@kernel.org&gt;
Signed-off-by: Stephen Boyd &lt;swboyd@chromium.org&gt;
Link: https://lore.kernel.org/r/20230202215330.2152726-1-swboyd@chromium.org
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Introduce a config option for each QMP PHY driver now that the QMP PHY
mega-driver has been split up into different modules. This allows kernel
configurators to limit the binary size of the kernel by only compiling
in the QMP PHY driver that they need.

Leave the old config QCOM_QMP in place and make it into a menuconfig so
that 'make olddefconfig' continues to work. Furthermore, set the default
of the new Kconfig symbols to be QCOM_QMP so that the transition is
smooth.

Reviewed-by: Dmitry Baryshkov &lt;dmitry.baryshkov@linaro.org&gt;
Reviewed-by: Johan Hovold &lt;johan+linaro@kernel.org&gt;
Signed-off-by: Stephen Boyd &lt;swboyd@chromium.org&gt;
Link: https://lore.kernel.org/r/20230202215330.2152726-1-swboyd@chromium.org
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>phy: qcom-qmp-pcie: add support for sc8280xp 4-lane PHYs</title>
<updated>2022-11-10T07:04:55+00:00</updated>
<author>
<name>Johan Hovold</name>
<email>johan+linaro@kernel.org</email>
</author>
<published>2022-11-05T14:59:39+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=6c37a02b25180350ed7bd199c074a79fe6d16e51'/>
<id>6c37a02b25180350ed7bd199c074a79fe6d16e51</id>
<content type='text'>
The PCIe2 and PCIe3 controllers and PHYs on SC8280XP can be used in
4-lane mode or as separate controllers and PHYs in 2-lane mode (e.g. as
PCIe2A and PCIe2B).

Add support for fetching the 4-lane configuration from the TCSR and
programming the lane registers of the second port when in 4-lane mode.

Reviewed-by: Dmitry Baryshkov &lt;dmitry.baryshkov@linaro.org&gt;
Signed-off-by: Johan Hovold &lt;johan+linaro@kernel.org&gt;
Link: https://lore.kernel.org/r/20221105145939.20318-17-johan+linaro@kernel.org
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The PCIe2 and PCIe3 controllers and PHYs on SC8280XP can be used in
4-lane mode or as separate controllers and PHYs in 2-lane mode (e.g. as
PCIe2A and PCIe2B).

Add support for fetching the 4-lane configuration from the TCSR and
programming the lane registers of the second port when in 4-lane mode.

Reviewed-by: Dmitry Baryshkov &lt;dmitry.baryshkov@linaro.org&gt;
Signed-off-by: Johan Hovold &lt;johan+linaro@kernel.org&gt;
Link: https://lore.kernel.org/r/20221105145939.20318-17-johan+linaro@kernel.org
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>phy: qcom: Introduce new eDP PHY driver</title>
<updated>2021-11-23T05:10:17+00:00</updated>
<author>
<name>Bjorn Andersson</name>
<email>bjorn.andersson@linaro.org</email>
</author>
<published>2021-11-03T23:44:10+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=f199223cb490be108e3e44a6577fb76bc6ca8bbe'/>
<id>f199223cb490be108e3e44a6577fb76bc6ca8bbe</id>
<content type='text'>
Many recent Qualcomm platforms comes with native DP and eDP support.
This consists of a controller in the MDSS and a QMP-like PHY.

While similar to the well known QMP block, the eDP PHY only has TX lanes
and the programming sequences are slightly different. Rather than
continuing the trend of parameterize the QMP driver to pieces, this
introduces the support as a new driver.

The registration of link and pixel clocks are borrowed from the QMP
driver. The non-DP link frequencies are omitted for now.

The eDP PHY is very similar to the dedicated (non-USB) DP PHY, but only
the prior is supported for now.

Signed-off-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
Reviewed-by: Stephen Boyd &lt;swboyd@chromium.org&gt;
Link: https://lore.kernel.org/r/20211103234410.1352424-2-bjorn.andersson@linaro.org
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Many recent Qualcomm platforms comes with native DP and eDP support.
This consists of a controller in the MDSS and a QMP-like PHY.

While similar to the well known QMP block, the eDP PHY only has TX lanes
and the programming sequences are slightly different. Rather than
continuing the trend of parameterize the QMP driver to pieces, this
introduces the support as a new driver.

The registration of link and pixel clocks are borrowed from the QMP
driver. The non-DP link frequencies are omitted for now.

The eDP PHY is very similar to the dedicated (non-USB) DP PHY, but only
the prior is supported for now.

Signed-off-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
Reviewed-by: Stephen Boyd &lt;swboyd@chromium.org&gt;
Link: https://lore.kernel.org/r/20211103234410.1352424-2-bjorn.andersson@linaro.org
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>phy: qualcomm: Fix 28 nm Hi-Speed USB PHY OF dependency</title>
<updated>2020-11-16T07:50:38+00:00</updated>
<author>
<name>Bryan O'Donoghue</name>
<email>bryan.odonoghue@linaro.org</email>
</author>
<published>2020-11-13T15:12:25+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=14839107b51cc0db19579039b1f72cba7a0c8049'/>
<id>14839107b51cc0db19579039b1f72cba7a0c8049</id>
<content type='text'>
This Kconfig entry should declare a dependency on OF

Fixes: 67b27dbeac4d ("phy: qualcomm: Add Synopsys 28nm Hi-Speed USB PHY driver")
Signed-off-by: Bryan O'Donoghue &lt;bryan.odonoghue@linaro.org&gt;
Link: https://lore.kernel.org/r/20201113151225.1657600-3-bryan.odonoghue@linaro.org
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This Kconfig entry should declare a dependency on OF

Fixes: 67b27dbeac4d ("phy: qualcomm: Add Synopsys 28nm Hi-Speed USB PHY driver")
Signed-off-by: Bryan O'Donoghue &lt;bryan.odonoghue@linaro.org&gt;
Link: https://lore.kernel.org/r/20201113151225.1657600-3-bryan.odonoghue@linaro.org
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>phy: qualcomm: usb: Fix SuperSpeed PHY OF dependency</title>
<updated>2020-11-16T07:50:38+00:00</updated>
<author>
<name>Bryan O'Donoghue</name>
<email>bryan.odonoghue@linaro.org</email>
</author>
<published>2020-11-13T15:12:24+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=44786a26a7485e12a1d2aaad2adfb3c82f6ad171'/>
<id>44786a26a7485e12a1d2aaad2adfb3c82f6ad171</id>
<content type='text'>
This Kconfig entry should declare a dependency on OF

Fixes: 6076967a500c ("phy: qualcomm: usb: Add SuperSpeed PHY driver")
Reported-by: kernel test robot &lt;lkp@intel.com&gt;
Link: https://lkml.org/lkml/2020/11/13/414
Signed-off-by: Bryan O'Donoghue &lt;bryan.odonoghue@linaro.org&gt;
Link: https://lore.kernel.org/r/20201113151225.1657600-2-bryan.odonoghue@linaro.org
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This Kconfig entry should declare a dependency on OF

Fixes: 6076967a500c ("phy: qualcomm: usb: Add SuperSpeed PHY driver")
Reported-by: kernel test robot &lt;lkp@intel.com&gt;
Link: https://lkml.org/lkml/2020/11/13/414
Signed-off-by: Bryan O'Donoghue &lt;bryan.odonoghue@linaro.org&gt;
Link: https://lore.kernel.org/r/20201113151225.1657600-2-bryan.odonoghue@linaro.org
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>phy: qualcomm: add qcom ipq806x dwc usb phy driver</title>
<updated>2020-07-20T06:24:03+00:00</updated>
<author>
<name>Ansuel Smith</name>
<email>ansuelsmth@gmail.com</email>
</author>
<published>2020-07-17T13:16:31+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=ef19b117b83466e1c030368101a24367a34be7f0'/>
<id>ef19b117b83466e1c030368101a24367a34be7f0</id>
<content type='text'>
This has lost in the original push for the dwc3 qcom driver.
This is needed for ipq806x SoC as without this the usb ports
doesn't work at all.

Signed-off-by: Andy Gross &lt;agross@codeaurora.org&gt;
Signed-off-by: Ansuel Smith &lt;ansuelsmth@gmail.com&gt;
Tested-by: Jonathan McDowell &lt;noodles@earth.li&gt;
Link: https://lore.kernel.org/r/20200717131635.11076-1-ansuelsmth@gmail.com
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This has lost in the original push for the dwc3 qcom driver.
This is needed for ipq806x SoC as without this the usb ports
doesn't work at all.

Signed-off-by: Andy Gross &lt;agross@codeaurora.org&gt;
Signed-off-by: Ansuel Smith &lt;ansuelsmth@gmail.com&gt;
Tested-by: Jonathan McDowell &lt;noodles@earth.li&gt;
Link: https://lore.kernel.org/r/20200717131635.11076-1-ansuelsmth@gmail.com
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>phy: qcom: remove ufs qmp phy driver</title>
<updated>2020-07-08T11:07:05+00:00</updated>
<author>
<name>Vinod Koul</name>
<email>vkoul@kernel.org</email>
</author>
<published>2020-06-29T14:54:52+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=02dca8c981b552ad4caaa2e858800c78cc20f41c'/>
<id>02dca8c981b552ad4caaa2e858800c78cc20f41c</id>
<content type='text'>
The UFS specific QMP PHY driver started off supporting the 14nm and
20nm hardware. With the 20nm support marked broken for a long time and
the 14nm support added to the common QMP PHY, this driver has not been
used in a while. So delete it

Reviewed-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
Link: https://lore.kernel.org/r/20200629145452.123035-1-vkoul@kernel.org
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The UFS specific QMP PHY driver started off supporting the 14nm and
20nm hardware. With the 20nm support marked broken for a long time and
the 14nm support added to the common QMP PHY, this driver has not been
used in a while. So delete it

Reviewed-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
Link: https://lore.kernel.org/r/20200629145452.123035-1-vkoul@kernel.org
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>phy: qcom-snps: Add SNPS USB PHY driver for QCOM based SOCs</title>
<updated>2020-05-05T05:14:04+00:00</updated>
<author>
<name>Wesley Cheng</name>
<email>wcheng@codeaurora.org</email>
</author>
<published>2020-05-04T23:54:24+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=51e8114f80d07663e38668a53b12eebbc91abd7f'/>
<id>51e8114f80d07663e38668a53b12eebbc91abd7f</id>
<content type='text'>
This adds the SNPS FemtoPHY V2 driver used in QCOM SOCs.  There
are potentially multiple instances of this UTMI PHY on the
SOC, all which can utilize this driver.  The V2 driver will
have a different register map compared to V1.

Signed-off-by: Wesley Cheng &lt;wcheng@codeaurora.org&gt;
Reviewed-by: Philipp Zabel &lt;pza@pengutronix.de&gt;
Reviewed-by: Manu Gautam &lt;mgautam@codeaurora.org&gt;
Reviewed-by: Vinod Koul &lt;vkoul@kernel.org&gt;
Reviewed-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
Link: https://lore.kernel.org/r/1588636467-23409-3-git-send-email-wcheng@codeaurora.org
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This adds the SNPS FemtoPHY V2 driver used in QCOM SOCs.  There
are potentially multiple instances of this UTMI PHY on the
SOC, all which can utilize this driver.  The V2 driver will
have a different register map compared to V1.

Signed-off-by: Wesley Cheng &lt;wcheng@codeaurora.org&gt;
Reviewed-by: Philipp Zabel &lt;pza@pengutronix.de&gt;
Reviewed-by: Manu Gautam &lt;mgautam@codeaurora.org&gt;
Reviewed-by: Vinod Koul &lt;vkoul@kernel.org&gt;
Reviewed-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
Link: https://lore.kernel.org/r/1588636467-23409-3-git-send-email-wcheng@codeaurora.org
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</pre>
</div>
</content>
</entry>
</feed>
