linux.git/drivers/phy/Makefile, branch v7.2-rc1 Linux kernel source tree phy: add basic support for NXPs TJA1145 CAN transceiver 2026-06-11T15:27:07+00:00 Dimitri Fedrau dimitri.fedrau@liebherr.com 2026-06-02T08:25:38+00:00 e5a9c1c917b59a4aff066b9f317501834c6d5af2 Add basic driver support for NXPs TJA1145 CAN transceiver which brings the PHY up/down by switching to normal/standby mode using SPI commands. Tested-by: lee.lockhey@gmail.com Reviewed-by: Marc Kleine-Budde <mkl@pengutronix.de> Signed-off-by: Dimitri Fedrau <dimitri.fedrau@liebherr.com> Link: https://patch.msgid.link/20260602-tja1145-support-v6-2-0e0ffc8ee63d@liebherr.com Signed-off-by: Vinod Koul <vkoul@kernel.org> 
Add basic driver support for NXPs TJA1145 CAN transceiver which brings the
PHY up/down by switching to normal/standby mode using SPI commands.

Tested-by: lee.lockhey@gmail.com
Reviewed-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Dimitri Fedrau <dimitri.fedrau@liebherr.com>
Link: https://patch.msgid.link/20260602-tja1145-support-v6-2-0e0ffc8ee63d@liebherr.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
phy: econet: Add PCIe PHY driver for EcoNet EN751221 and EN7528 SoCs. 2026-05-14T15:46:36+00:00 Caleb James DeLisle cjd@cjdns.fr 2026-04-25T17:36:42+00:00 da1af49257591190ad6521abb3198f1f40420407 Introduce support for EcoNet PCIe PHY controllers found in EN751221 and EN7528 SoCs, these SoCs are not identical but are similar, each having one Gen1 port, and one Gen1/Gen2 port. Co-developed-by: Ahmed Naseef <naseefkm@gmail.com> Signed-off-by: Ahmed Naseef <naseefkm@gmail.com> [cjd@cjdns.fr: add EN751221 support and refactor for clarity] Signed-off-by: Caleb James DeLisle <cjd@cjdns.fr> Link: https://patch.msgid.link/20260425173642.406089-3-cjd@cjdns.fr Signed-off-by: Vinod Koul <vkoul@kernel.org> 
Introduce support for EcoNet PCIe PHY controllers found in EN751221
and EN7528 SoCs, these SoCs are not identical but are similar, each
having one Gen1 port, and one Gen1/Gen2 port.

Co-developed-by: Ahmed Naseef <naseefkm@gmail.com>
Signed-off-by: Ahmed Naseef <naseefkm@gmail.com>
[cjd@cjdns.fr: add EN751221 support and refactor for clarity]
Signed-off-by: Caleb James DeLisle <cjd@cjdns.fr>
Link: https://patch.msgid.link/20260425173642.406089-3-cjd@cjdns.fr
Signed-off-by: Vinod Koul <vkoul@kernel.org>
phy: Add driver for EyeQ5 Ethernet PHY wrapper 2026-05-10T12:14:21+00:00 Théo Lebrun theo.lebrun@bootlin.com 2026-03-09T14:37:34+00:00 b6e33443876d0ca7e93cf949455e3c1a1a0aae24 EyeQ5 embeds a system-controller called OLB. It features many unrelated registers, and some of those are registers used to configure the integration of the RGMII/SGMII Cadence PHY used by MACB/GEM instances. Wrap in a neat generic PHY provider, exposing two PHYs with standard phy_init() / phy_set_mode() / phy_power_on() operations. Reviewed-by: Luca Ceresoli <luca.ceresoli@bootlin.com> Signed-off-by: Théo Lebrun <theo.lebrun@bootlin.com> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Link: https://patch.msgid.link/20260309-macb-phy-v9-1-5afd87d9db43@bootlin.com Signed-off-by: Vinod Koul <vkoul@kernel.org> 
EyeQ5 embeds a system-controller called OLB. It features many unrelated
registers, and some of those are registers used to configure the
integration of the RGMII/SGMII Cadence PHY used by MACB/GEM instances.

Wrap in a neat generic PHY provider, exposing two PHYs with standard
phy_init() / phy_set_mode() / phy_power_on() operations.

Reviewed-by: Luca Ceresoli <luca.ceresoli@bootlin.com>
Signed-off-by: Théo Lebrun <theo.lebrun@bootlin.com>
Reviewed-by: Vladimir Oltean <olteanv@gmail.com>
Link: https://patch.msgid.link/20260309-macb-phy-v9-1-5afd87d9db43@bootlin.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
phy: axiado: add Axiado eMMC PHY driver 2026-05-10T10:59:55+00:00 SriNavmani A srinavmani@axiado.com 2026-05-04T01:38:33+00:00 9e7dfa4bcd4e2c3541c4ee954ea5e66edab94d3f It provides the required configurations for Axiado eMMC PHY driver for HS200 mode. Signed-off-by: SriNavmani A <srinavmani@axiado.com> Co-developed-by: Prasad Bolisetty <pbolisetty@axiado.com> Signed-off-by: Prasad Bolisetty <pbolisetty@axiado.com> Signed-off-by: Tzu-Hao Wei <twei@axiado.com> Link: https://patch.msgid.link/20260504-axiado-ax3000-add-emmc-phy-driver-support-v3-2-3ab7eb45b0c5@axiado.com Signed-off-by: Vinod Koul <vkoul@kernel.org> 
It provides the required configurations for Axiado eMMC PHY driver for
HS200 mode.

Signed-off-by: SriNavmani A <srinavmani@axiado.com>
Co-developed-by: Prasad Bolisetty <pbolisetty@axiado.com>
Signed-off-by: Prasad Bolisetty <pbolisetty@axiado.com>
Signed-off-by: Tzu-Hao Wei <twei@axiado.com>
Link: https://patch.msgid.link/20260504-axiado-ax3000-add-emmc-phy-driver-support-v3-2-3ab7eb45b0c5@axiado.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
phy: eswin: Create eswin directory and add EIC7700 SATA PHY driver 2026-02-27T15:10:30+00:00 Yulin Lu luyulin@eswincomputing.com 2026-02-05T08:22:19+00:00 67ee9ccaa34a11c317411bb8e7d305d93d0b4111 Create the eswin phy driver directory and add support for the SATA PHY driver on the EIC7700 SoC platform. Signed-off-by: Yulin Lu <luyulin@eswincomputing.com> Link: https://patch.msgid.link/20260205082219.1521-1-luyulin@eswincomputing.com Signed-off-by: Vinod Koul <vkoul@kernel.org> 
Create the eswin phy driver directory and add support for the
SATA PHY driver on the EIC7700 SoC platform.

Signed-off-by: Yulin Lu <luyulin@eswincomputing.com>
Link: https://patch.msgid.link/20260205082219.1521-1-luyulin@eswincomputing.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
phy: usb: Add driver for Canaan K230 USB 2.0 PHY 2026-02-27T14:26:35+00:00 Jiayu Du jiayu.riscv@isrc.iscas.ac.cn 2026-01-21T14:55:24+00:00 8787fa1da603e9e51efff11841e97b5d374aef34 Add driver for the USB 2.0 PHY in Canaan K230 SoC, which supports PHY initialization and power management. Add Kconfig/Makefile under drivers/phy/canaan/. Signed-off-by: Jiayu Du <jiayu.riscv@isrc.iscas.ac.cn> Link: https://patch.msgid.link/20260121145526.14672-4-jiayu.riscv@isrc.iscas.ac.cn Signed-off-by: Vinod Koul <vkoul@kernel.org> 
Add driver for the USB 2.0 PHY in Canaan K230 SoC, which supports PHY
initialization and power management.

Add Kconfig/Makefile under drivers/phy/canaan/.

Signed-off-by: Jiayu Du <jiayu.riscv@isrc.iscas.ac.cn>
Link: https://patch.msgid.link/20260121145526.14672-4-jiayu.riscv@isrc.iscas.ac.cn
Signed-off-by: Vinod Koul <vkoul@kernel.org>
phy: Sort the subsystem Makefile 2026-02-27T02:34:43+00:00 Vinod Koul vkoul@kernel.org 2026-02-23T06:57:43+00:00 d8f0ef2aebaa90c0155e266c1fdd6fa2aef44bb1 Makefile is supposed to be sorted alphabetically, sadly it has bitrotted so fix that Link: https://patch.msgid.link/20260223065743.395539-1-vkoul@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org> 
Makefile is supposed to be sorted alphabetically, sadly it has bitrotted
so fix that

Link: https://patch.msgid.link/20260223065743.395539-1-vkoul@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
phy: move spacemit pcie driver to its subfolder 2026-02-27T02:34:14+00:00 Vinod Koul vkoul@kernel.org 2026-02-23T06:42:39+00:00 75fb1a33f9ac4c9730e61bb19aaaab02023a99b2 Commit fe4bc1a08638 ("phy: spacemit: support K1 USB2.0 PHY controller") created spacemit subfolder with usb driver while commit 57e920b92724 ("phy: spacemit: Introduce PCIe/combo PHY") added pcie driver in phy folder. Move latter into spacemit subfolder and rename file to phy-k1-pcie.c Reviewed-by: Alex Elder <elder@riscstar.com> Reviewed-by: Yixun Lan <dlan@kernel.org> Link: https://patch.msgid.link/20260223064240.386617-1-vkoul@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org> 
Commit fe4bc1a08638 ("phy: spacemit: support K1 USB2.0 PHY controller")
created spacemit subfolder with usb driver while commit 57e920b92724
("phy: spacemit: Introduce PCIe/combo PHY") added pcie driver in phy
folder. Move latter into spacemit subfolder and rename file to
phy-k1-pcie.c

Reviewed-by: Alex Elder <elder@riscstar.com>
Reviewed-by: Yixun Lan <dlan@kernel.org>
Link: https://patch.msgid.link/20260223064240.386617-1-vkoul@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
phy: enter drivers/phy/Makefile even without CONFIG_GENERIC_PHY 2026-02-04T15:15:26+00:00 Vladimir Oltean vladimir.oltean@nxp.com 2026-01-23T11:06:00+00:00 3ddcd24b4d8454b2b9b2d013a0d61986ae8bbbe7 Kconfig option CONFIG_PHY_COMMON_PROPS, which builds drivers/phy/phy-common-props.c, was intended to be selectable independently of CONFIG_GENERIC_PHY. Yet it lives in drivers/phy/, which is entered by the Makefile only if CONFIG_GENERIC_PHY is set. Allow the Makefile to enter one level deeper, but stop at drivers/phy/ if CONFIG_GENERIC_PHY is unselected (i.e. do not enter vendor folders). The other stuff from drivers/phy/Makefile except for CONFIG_PHY_COMMON_PROPS, like CONFIG_PHY_NXP_PTN3222, all depends on CONFIG_GENERIC_PHY. Fixes: e7556b59ba65 ("phy: add phy_get_rx_polarity() and phy_get_tx_polarity()") Closes: https://lore.kernel.org/lkml/43ea0202-891d-4582-980b-5cb557b41114@linux.ibm.com/ Reported-by: Venkat Rao Bagalkote <venkat88@linux.ibm.com> Debugged-by: Christophe Leroy (CS GROUP) <chleroy@kernel.org> Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Christophe Leroy (CS GROUP) <chleroy@kernel.org> Tested-by: Venkat Rao Bagalkote <venkat88@linux.ibm.com> Link: https://patch.msgid.link/20260123110600.3118561-1-vladimir.oltean@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org> 
Kconfig option CONFIG_PHY_COMMON_PROPS, which builds
drivers/phy/phy-common-props.c, was intended to be selectable
independently of CONFIG_GENERIC_PHY. Yet it lives in drivers/phy/, which
is entered by the Makefile only if CONFIG_GENERIC_PHY is set.

Allow the Makefile to enter one level deeper, but stop at drivers/phy/
if CONFIG_GENERIC_PHY is unselected (i.e. do not enter vendor folders).
The other stuff from drivers/phy/Makefile except for CONFIG_PHY_COMMON_PROPS,
like CONFIG_PHY_NXP_PTN3222, all depends on CONFIG_GENERIC_PHY.

Fixes: e7556b59ba65 ("phy: add phy_get_rx_polarity() and phy_get_tx_polarity()")
Closes: https://lore.kernel.org/lkml/43ea0202-891d-4582-980b-5cb557b41114@linux.ibm.com/
Reported-by: Venkat Rao Bagalkote <venkat88@linux.ibm.com>
Debugged-by: Christophe Leroy (CS GROUP) <chleroy@kernel.org>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Christophe Leroy (CS GROUP) <chleroy@kernel.org>
Tested-by: Venkat Rao Bagalkote <venkat88@linux.ibm.com>
Link: https://patch.msgid.link/20260123110600.3118561-1-vladimir.oltean@nxp.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
phy: Add Google Tensor SoC USB PHY driver 2026-01-14T14:26:36+00:00 Roy Luo royluo@google.com 2025-12-27T00:53:29+00:00 cbce66669c82ee9ae0e26523c0fcd3c721fcfe85 Support the USB PHY found on Google Tensor G5 (Laguna). This particular USB PHY supports both high-speed and super-speed operations, and is integrated with the SNPS DWC3 controller that's also on the SoC. This initial patch specifically adds functionality for high-speed. Co-developed-by: Joy Chakraborty <joychakr@google.com> Signed-off-by: Joy Chakraborty <joychakr@google.com> Co-developed-by: Naveen Kumar <mnkumar@google.com> Signed-off-by: Naveen Kumar <mnkumar@google.com> Signed-off-by: Roy Luo <royluo@google.com> Link: https://patch.msgid.link/20251227-phyb4-v10-2-e8caf6b93fe7@google.com Signed-off-by: Vinod Koul <vkoul@kernel.org> 
Support the USB PHY found on Google Tensor G5 (Laguna). This
particular USB PHY supports both high-speed and super-speed
operations, and is integrated with the SNPS DWC3 controller that's
also on the SoC. This initial patch specifically adds functionality
for high-speed.

Co-developed-by: Joy Chakraborty <joychakr@google.com>
Signed-off-by: Joy Chakraborty <joychakr@google.com>
Co-developed-by: Naveen Kumar <mnkumar@google.com>
Signed-off-by: Naveen Kumar <mnkumar@google.com>
Signed-off-by: Roy Luo <royluo@google.com>
Link: https://patch.msgid.link/20251227-phyb4-v10-2-e8caf6b93fe7@google.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>