linux.git/drivers/pci/setup-bus.c, branch v5.6

PCI: Allow adjust_bridge_window() to shrink resource if necessary

2020-01-29T22:57:28+00:00

Remove checks for resource size in adjust_bridge_window(). This is
necessary to allow pci_bus_distribute_available_resources() to function
when the kernel parameter "pci=hpmemsize=nn[KMG]" is used to allocate
resources. Because the kernel parameter sets the size of all hotplug
bridges to be the same, there are problems when nested hotplug bridges are
encountered. Fitting a downstream hotplug bridge with size X and normal
bridges with non-zero size Y into parent hotplug bridge with size X is
impossible, and hence the downstream hotplug bridge needs to shrink to fit
into its parent.

Add check for if bridge is extended or shrunken and reflect that in the
call to pci_dbg().

Reset the resource if its new size is zero (if we have run out of a bridge
window resource) to prevent the PCI resource assignment code from
attempting to assign a zero-sized resource.

Link: https://lore.kernel.org/r/PSXP216MB0438D3E2CFE64EBAA32AF691803C0@PSXP216MB0438.KORP216.PROD.OUTLOOK.COM
Signed-off-by: Nicholas Johnson 
Signed-off-by: Bjorn Helgaas 
Reviewed-by: Mika Westerberg

PCI: Set resource size directly in adjust_bridge_window()

2020-01-29T22:57:28+00:00

Change adjust_bridge_window() to set resource size directly instead of
using additional resource lists.

Because additional resource lists are optional resources, any algorithm
that requires guaranteed allocation that uses them cannot be guaranteed to
work.

Remove the resource from add_list, as a zero-sized additional resource is
redundant.

Update comment in pci_bus_distribute_available_resources() to reflect the
above changes.

Link: https://lore.kernel.org/r/PSXP216MB04386BA48874B56BC5CB0292803C0@PSXP216MB0438.KORP216.PROD.OUTLOOK.COM
Signed-off-by: Nicholas Johnson 
Signed-off-by: Bjorn Helgaas 
Reviewed-by: Mika Westerberg

PCI: Rename extend_bridge_window() to adjust_bridge_window()

2020-01-29T22:57:28+00:00

Rename extend_bridge_window() to adjust_bridge_window() to prepare for the
fact that the window will be able to shrink.  No functional change
intended.

Link: https://lore.kernel.org/r/PSXP216MB0438C47B3473D0C9DE531F18803C0@PSXP216MB0438.KORP216.PROD.OUTLOOK.COM
Signed-off-by: Nicholas Johnson 
Signed-off-by: Bjorn Helgaas 
Reviewed-by: Mika Westerberg

PCI: Rename extend_bridge_window() parameter

2020-01-29T22:57:28+00:00

In extend_bridge_window(), change "available" parameter name to "new_size".
This makes more sense as this parameter represents the new size for the
window.  No functional change intended.

Link: https://lore.kernel.org/r/PSXP216MB043853617ECA4118C472A417803C0@PSXP216MB0438.KORP216.PROD.OUTLOOK.COM
Signed-off-by: Nicholas Johnson 
Signed-off-by: Bjorn Helgaas 
Reviewed-by: Mika Westerberg

PCI: Consider alignment of hot-added bridges when assigning resources

2020-01-29T22:57:28+00:00

Change pci_bus_distribute_available_resources() to better handle bridges
with different resource alignment requirements.

The arguments io, mmio and mmio_pref represent the start and end
addresses of resource, into which we must fit the current bridge window.

The steps taken by pci_bus_distribute_available_resources():

- For io, mmio and mmio_pref, increase .start to align with the alignment
of the current bridge window (otherwise the current bridge window may
not fit within the available range).

- For io, mmio and mmio_pref, adjust the current bridge window to the
size after the above.

- Count the number of hotplug bridges and normal bridges on this bus.

- If the total number of bridges is one, give that bridge all of the
resources and return.

- If there are no hotplug bridges, return.

- For io, mmio and mmio_pref, increase .start by the amount required for
each bridge resource on the bus for non hotplug bridges, giving extra
room to make up for alignment of those resources.

- For io, mmio and mmio_pref, calculate the resource size per hotplug
bridge which is available after the previous steps.

- For io, mmio and mmio_pref, distribute the resources to each hotplug
bridge, with the sizes calculated above.

The motivation for fixing this is enabling devices that require greater
than 1MB alignment. This fixes the case where the user hot-adds devices
with BAR alignment >1MB and Linux fails to assign resources to it.

Link: https://bugzilla.kernel.org/show_bug.cgi?id=199581
Link: https://lore.kernel.org/r/PSXP216MB0438C2BFD0FD3691ED9C83F4803C0@PSXP216MB0438.KORP216.PROD.OUTLOOK.COM
Reported-by: Mika Westerberg
Signed-off-by: Nicholas Johnson
Signed-off-by: Bjorn Helgaas
Reviewed-by: Mika Westerberg

PCI: Remove local variable usage in pci_bus_distribute_available_resources()

2020-01-29T22:56:57+00:00

In pci_bus_distribute_available_resources(), use resource_size() rather
than the local available_io, etc.  No functional change intended; this just
makes the preceding patch smaller.

[bhelgaas: extracted from https://lore.kernel.org/r/PSXP216MB0438587C47CBEDF365B1EA27803C0@PSXP216MB0438.KORP216.PROD.OUTLOOK.COM]
Signed-off-by: Nicholas Johnson 
Signed-off-by: Bjorn Helgaas 
Reviewed-by: Mika Westerberg

PCI: Pass size + alignment to pci_bus_distribute_available_resources()

2020-01-29T22:56:47+00:00

Change pci_bus_distribute_available_resources() arguments from
resource_size_t to struct resource to add more information required to get
the alignment correct for bridge windows with alignment >1M.

We require (size, alignment), instead of just (size) which is what is
currently available. The change from resource_size_t to struct resource
does just that.

Note that the struct resource arguments are passed by value and not by
reference. We do not want to pass by reference and change the resource size
of the parent bridge window. We only want the size information.

No functional change intended.

Link: https://lore.kernel.org/r/PSXP216MB0438587C47CBEDF365B1EA27803C0@PSXP216MB0438.KORP216.PROD.OUTLOOK.COM
[bhelgaas: split parts to other patches to reduce the size of this one]
Signed-off-by: Nicholas Johnson 
Signed-off-by: Bjorn Helgaas 
Reviewed-by: Mika Westerberg

PCI: Rename variables

2020-01-29T22:55:54+00:00

In pci_bus_distribute_available_resources(), rename:

  io         =>  io_per_hp
  mmio       =>  mmio_per_hp
  mmio_pref  =>  mmio_pref_per_hp

No functional change; this is just to make a subsequent patch smaller.

[bhelgaas: extracted from https://lore.kernel.org/r/PSXP216MB0438587C47CBEDF365B1EA27803C0@PSXP216MB0438.KORP216.PROD.OUTLOOK.COM]
Signed-off-by: Nicholas Johnson 
Signed-off-by: Bjorn Helgaas 
Reviewed-by: Mika Westerberg

PCI: Remove unnecessary braces

2020-01-29T20:15:53+00:00

Remove unnecessary braces in pci_bus_distribute_available_resources().  No
functional changes.

Link: https://lore.kernel.org/r/PSXP216MB0438061CB4442460BB92A75F803C0@PSXP216MB0438.KORP216.PROD.OUTLOOK.COM
Signed-off-by: Nicholas Johnson 
Signed-off-by: Bjorn Helgaas 
Reviewed-by: Mika Westerberg

PCI: Don't disable bridge BARs when assigning bus resources

2020-01-13T19:23:02+00:00

Some PCI bridges implement BARs in addition to bridge windows.  For
example, here's a PLX switch:

  04:00.0 PCI bridge: PLX Technology, Inc. PEX 8724 24-Lane, 6-Port PCI
            Express Gen 3 (8 GT/s) Switch, 19 x 19mm FCBGA (rev ca)
	    (prog-if 00 [Normal decode])
      Flags: bus master, fast devsel, latency 0, IRQ 30, NUMA node 0
      Memory at 90a00000 (32-bit, non-prefetchable) [size=256K]
      Bus: primary=04, secondary=05, subordinate=0a, sec-latency=0
      I/O behind bridge: 00002000-00003fff
      Memory behind bridge: 90000000-909fffff
      Prefetchable memory behind bridge: 0000380000800000-0000380000bfffff

Previously, when the kernel assigned resource addresses (with the
pci=realloc command line parameter, for example) it could clear the struct
resource corresponding to the BAR.  When this happened, lspci would report
this BAR as "ignored":

   Region 0: Memory at  (32-bit, non-prefetchable) [size=256K]

This is because the kernel reports a zero start address and zero flags
in the corresponding sysfs resource file and in /proc/bus/pci/devices.
Investigation with 'lspci -x', however, shows the BIOS-assigned address
will still be programmed in the device's BAR registers.

It's clearly a bug that the kernel lost track of the BAR value, but in most
cases, this still won't result in a visible issue because nothing uses the
memory, so nothing is affected.  However, when an IOMMU is in use, it will
not reserve this space in the IOVA because the kernel no longer thinks the
range is valid.  (See dmar_init_reserved_ranges() for the Intel
implementation of this.)

Without the proper reserved range, a DMA mapping may allocate an IOVA that
matches a bridge BAR, which results in DMA accesses going to the BAR
instead of the intended RAM.

The problem was in pci_assign_unassigned_root_bus_resources().  When any
resource from a bridge device fails to get assigned, the code set the
resource's flags to zero.  This makes sense for bridge windows, as they
will be re-enabled later, but for regular BARs, it makes the kernel
permanently lose track of the fact that they decode address space.

Change pci_assign_unassigned_root_bus_resources() and
pci_assign_unassigned_bridge_resources() so they only clear "res->flags"
for bridge *windows*, not bridge BARs.

Fixes: da7822e5ad71 ("PCI: update bridge resources to get more big ranges when allocating space (again)")
Link: https://lore.kernel.org/r/20200108213208.4612-1-logang@deltatee.com
[bhelgaas: commit log, check for pci_is_bridge()]
Reported-by: Kit Chow 
Signed-off-by: Logan Gunthorpe 
Signed-off-by: Bjorn Helgaas