<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux.git/drivers/pci/controller, branch v6.6-rc2</title>
<subtitle>Linux kernel source tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/'/>
<entry>
<title>Merge tag 'pci-v6.6-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/pci/pci</title>
<updated>2023-08-31T03:23:07+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2023-08-31T03:23:07+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=b6f6167ea8a424d14b41c172fe7a5f49e164f221'/>
<id>b6f6167ea8a424d14b41c172fe7a5f49e164f221</id>
<content type='text'>
Pull PCI updates from Bjorn Helgaas:
 "Enumeration:
   - Add locking to read/modify/write PCIe Capability Register accessors
     for Link Control and Root Control
   - Use pci_dev_id() when possible instead of manually composing ID
     from dev-&gt;bus-&gt;number and dev-&gt;devfn

  Resource management:
   - Move prototypes for __weak sysfs resource files to linux/pci.h to
     fix 'no previous prototype' warnings
   - Make more I/O port accesses depend on HAS_IOPORT
   - Use devm_platform_get_and_ioremap_resource() instead of open-coding
     platform_get_resource() followed by devm_ioremap_resource()

  Power management:
   - Ensure devices are powered up while accessing VPD
   - If device is powered-up, keep it that way while polling for PME
   - Only read PCI_PM_CTRL register when available, to avoid reading the
     wrong register and corrupting dev-&gt;current_state

  Virtualization:
   - Avoid Secondary Bus Reset on NVIDIA T4 GPUs

  Error handling:
   - Remove unused pci_disable_pcie_error_reporting()
   - Unexport pci_enable_pcie_error_reporting(), used only by aer.c
   - Unexport pcie_port_bus_type, used only by PCI core

  VGA:
   - Simplify and clean up typos in VGA arbiter

  Apple PCIe controller driver:
   - Initialize pcie-&gt;nvecs (number of available MSIs) before use

  Broadcom iProc PCIe controller driver:
   - Use of_property_read_bool() instead of low-level accessors for
     boolean properties

  Broadcom STB PCIe controller driver:
   - Assert PERST# when probing BCM2711 because some bootloaders don't
     do it

  Freescale i.MX6 PCIe controller driver:
   - Add .host_deinit() callback so we can clean up things like
     regulators on probe failure or driver unload

  Freescale Layerscape PCIe controller driver:
   - Add support for link-down notification so the endpoint driver can
     process LINK_DOWN events
   - Add suspend/resume support, including manual
     PME_Turn_off/PME_TO_Ack handshake
   - Save Link Capabilities during probe so they can be restored when
     handling a link-up event, since the controller loses the Link Width
     and Link Speed values during reset

  Intel VMD host bridge driver:
   - Fix disable of bridge windows during domain reset; previously we
     cleared the base/limit registers, which actually left the windows
     enabled

  Marvell MVEBU PCIe controller driver:
   - Remove unused busn member

  Microchip PolarFlare PCIe controller driver:
   - Fix interrupt bit definitions so the SEC and DED interrupt handlers
     work correctly
   - Make driver buildable as a module
   - Read FPGA MSI configuration parameters from hardware instead of
     hard-coding them

  Microsoft Hyper-V host bridge driver:
   - To avoid a NULL pointer dereference, skip MSI restore after
     hibernate if MSI/MSI-X hasn't been enabled

  NVIDIA Tegra194 PCIe controller driver:
   - Revert 'PCI: tegra194: Enable support for 256 Byte payload' because
     Linux doesn't know how to reduce MPS from to 256 to 128 bytes for
     endpoints below a switch (because other devices below the switch
     might already be operating), which leads to 'Malformed TLP' errors

  Qualcomm PCIe controller driver:
   - Add DT and driver support for interconnect bandwidth voting for
     'pcie-mem' and 'cpu-pcie' interconnects
   - Fix broken SDX65 'compatible' DT property
   - Configure controller so MHI bus master clock will be switched off
     while in ASPM L1.x states
   - Use alignment restriction from EPF core in EPF MHI driver
   - Add Endpoint eDMA support
   - Add MHI eDMA support
   - Add Snapdragon SM8450 support to the EPF MHI driversupport
   - Add MHI eDMA support
   - Add Snapdragon SM8450 support to the EPF MHI driversupport
   - Add MHI eDMA support
   - Add Snapdragon SM8450 support to the EPF MHI driversupport
   - Add MHI eDMA support
   - Add Snapdragon SM8450 support to the EPF MHI driver
   - Use iATU for EPF MHI transfers smaller than 4K to avoid eDMA setup
     latency
   - Add sa8775p DT binding and driver support

  Rockchip PCIe controller driver:
   - Use 64-bit mask on MSI 64-bit PCI address to avoid zeroing out the
     upper 32 bits

  SiFive FU740 PCIe controller driver:
   - Set the supported number of MSI vectors so we can use all available
     MSI interrupts

  Synopsys DesignWare PCIe controller driver:
   - Add generic dwc suspend/resume APIs (dw_pcie_suspend_noirq() and
     dw_pcie_resume_noirq()) to be called by controller driver
     suspend/resume ops, and a controller callback to send PME_Turn_Off

  MicroSemi Switchtec management driver:
   - Add support for PCIe Gen5 devices

  Miscellaneous:
   - Reorder and compress to reduce size of struct pci_dev
   - Fix race in DOE destroy_work_on_stack()
   - Add stubs to avoid casts between incompatible function types
   - Explicitly include correct DT includes to untangle headers"

* tag 'pci-v6.6-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/pci/pci: (96 commits)
  PCI: qcom-ep: Add ICC bandwidth voting support
  dt-bindings: PCI: qcom: ep: Add interconnects path
  PCI: qcom-ep: Treat unknown IRQ events as an error
  dt-bindings: PCI: qcom: Fix SDX65 compatible
  PCI: endpoint: Add kernel-doc for pci_epc_mem_init() API
  PCI: epf-mhi: Use iATU for small transfers
  PCI: epf-mhi: Add support for SM8450
  PCI: epf-mhi: Add eDMA support
  PCI: qcom-ep: Add eDMA support
  PCI: epf-mhi: Make use of the alignment restriction from EPF core
  PCI/PM: Only read PCI_PM_CTRL register when available
  PCI: qcom: Add support for sa8775p SoC
  dt-bindings: PCI: qcom: Add sa8775p compatible
  PCI: qcom-ep: Pass alignment restriction to the EPF core
  PCI: Simplify pcie_capability_clear_and_set_word() control flow
  PCI: Tidy config space save/restore messages
  PCI: Fix code formatting inconsistencies
  PCI: Fix typos in docs and comments
  PCI: Fix pci_bus_resetable(), pci_slot_resetable() name typos
  PCI: Simplify pci_dev_driver()
  ...
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pull PCI updates from Bjorn Helgaas:
 "Enumeration:
   - Add locking to read/modify/write PCIe Capability Register accessors
     for Link Control and Root Control
   - Use pci_dev_id() when possible instead of manually composing ID
     from dev-&gt;bus-&gt;number and dev-&gt;devfn

  Resource management:
   - Move prototypes for __weak sysfs resource files to linux/pci.h to
     fix 'no previous prototype' warnings
   - Make more I/O port accesses depend on HAS_IOPORT
   - Use devm_platform_get_and_ioremap_resource() instead of open-coding
     platform_get_resource() followed by devm_ioremap_resource()

  Power management:
   - Ensure devices are powered up while accessing VPD
   - If device is powered-up, keep it that way while polling for PME
   - Only read PCI_PM_CTRL register when available, to avoid reading the
     wrong register and corrupting dev-&gt;current_state

  Virtualization:
   - Avoid Secondary Bus Reset on NVIDIA T4 GPUs

  Error handling:
   - Remove unused pci_disable_pcie_error_reporting()
   - Unexport pci_enable_pcie_error_reporting(), used only by aer.c
   - Unexport pcie_port_bus_type, used only by PCI core

  VGA:
   - Simplify and clean up typos in VGA arbiter

  Apple PCIe controller driver:
   - Initialize pcie-&gt;nvecs (number of available MSIs) before use

  Broadcom iProc PCIe controller driver:
   - Use of_property_read_bool() instead of low-level accessors for
     boolean properties

  Broadcom STB PCIe controller driver:
   - Assert PERST# when probing BCM2711 because some bootloaders don't
     do it

  Freescale i.MX6 PCIe controller driver:
   - Add .host_deinit() callback so we can clean up things like
     regulators on probe failure or driver unload

  Freescale Layerscape PCIe controller driver:
   - Add support for link-down notification so the endpoint driver can
     process LINK_DOWN events
   - Add suspend/resume support, including manual
     PME_Turn_off/PME_TO_Ack handshake
   - Save Link Capabilities during probe so they can be restored when
     handling a link-up event, since the controller loses the Link Width
     and Link Speed values during reset

  Intel VMD host bridge driver:
   - Fix disable of bridge windows during domain reset; previously we
     cleared the base/limit registers, which actually left the windows
     enabled

  Marvell MVEBU PCIe controller driver:
   - Remove unused busn member

  Microchip PolarFlare PCIe controller driver:
   - Fix interrupt bit definitions so the SEC and DED interrupt handlers
     work correctly
   - Make driver buildable as a module
   - Read FPGA MSI configuration parameters from hardware instead of
     hard-coding them

  Microsoft Hyper-V host bridge driver:
   - To avoid a NULL pointer dereference, skip MSI restore after
     hibernate if MSI/MSI-X hasn't been enabled

  NVIDIA Tegra194 PCIe controller driver:
   - Revert 'PCI: tegra194: Enable support for 256 Byte payload' because
     Linux doesn't know how to reduce MPS from to 256 to 128 bytes for
     endpoints below a switch (because other devices below the switch
     might already be operating), which leads to 'Malformed TLP' errors

  Qualcomm PCIe controller driver:
   - Add DT and driver support for interconnect bandwidth voting for
     'pcie-mem' and 'cpu-pcie' interconnects
   - Fix broken SDX65 'compatible' DT property
   - Configure controller so MHI bus master clock will be switched off
     while in ASPM L1.x states
   - Use alignment restriction from EPF core in EPF MHI driver
   - Add Endpoint eDMA support
   - Add MHI eDMA support
   - Add Snapdragon SM8450 support to the EPF MHI driversupport
   - Add MHI eDMA support
   - Add Snapdragon SM8450 support to the EPF MHI driversupport
   - Add MHI eDMA support
   - Add Snapdragon SM8450 support to the EPF MHI driversupport
   - Add MHI eDMA support
   - Add Snapdragon SM8450 support to the EPF MHI driver
   - Use iATU for EPF MHI transfers smaller than 4K to avoid eDMA setup
     latency
   - Add sa8775p DT binding and driver support

  Rockchip PCIe controller driver:
   - Use 64-bit mask on MSI 64-bit PCI address to avoid zeroing out the
     upper 32 bits

  SiFive FU740 PCIe controller driver:
   - Set the supported number of MSI vectors so we can use all available
     MSI interrupts

  Synopsys DesignWare PCIe controller driver:
   - Add generic dwc suspend/resume APIs (dw_pcie_suspend_noirq() and
     dw_pcie_resume_noirq()) to be called by controller driver
     suspend/resume ops, and a controller callback to send PME_Turn_Off

  MicroSemi Switchtec management driver:
   - Add support for PCIe Gen5 devices

  Miscellaneous:
   - Reorder and compress to reduce size of struct pci_dev
   - Fix race in DOE destroy_work_on_stack()
   - Add stubs to avoid casts between incompatible function types
   - Explicitly include correct DT includes to untangle headers"

* tag 'pci-v6.6-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/pci/pci: (96 commits)
  PCI: qcom-ep: Add ICC bandwidth voting support
  dt-bindings: PCI: qcom: ep: Add interconnects path
  PCI: qcom-ep: Treat unknown IRQ events as an error
  dt-bindings: PCI: qcom: Fix SDX65 compatible
  PCI: endpoint: Add kernel-doc for pci_epc_mem_init() API
  PCI: epf-mhi: Use iATU for small transfers
  PCI: epf-mhi: Add support for SM8450
  PCI: epf-mhi: Add eDMA support
  PCI: qcom-ep: Add eDMA support
  PCI: epf-mhi: Make use of the alignment restriction from EPF core
  PCI/PM: Only read PCI_PM_CTRL register when available
  PCI: qcom: Add support for sa8775p SoC
  dt-bindings: PCI: qcom: Add sa8775p compatible
  PCI: qcom-ep: Pass alignment restriction to the EPF core
  PCI: Simplify pcie_capability_clear_and_set_word() control flow
  PCI: Tidy config space save/restore messages
  PCI: Fix code formatting inconsistencies
  PCI: Fix typos in docs and comments
  PCI: Fix pci_bus_resetable(), pci_slot_resetable() name typos
  PCI: Simplify pci_dev_driver()
  ...
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'pci/misc'</title>
<updated>2023-08-29T16:03:57+00:00</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2023-08-29T16:03:57+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=43cc31da9146f9ce60e4a03d96ef0807c2cdac94'/>
<id>43cc31da9146f9ce60e4a03d96ef0807c2cdac94</id>
<content type='text'>
- Reorder struct pci_dev to avoid holes and reduce size (Christophe
  JAILLET)

- Change pdev-&gt;rom_attr_enabled to single bit since it's only a boolean
  value (Christophe JAILLET)

- Use struct_size() in pirq_convert_irt_table() instead of hand-writing it
  (Christophe JAILLET)

- Explicitly include correct DT includes to untangle headers (Rob Herring)

- Fix a DOE race between destroy_work_on_stack() and the stack-allocated
  task-&gt;work struct going out of scope in pci_doe() (Ira Weiny)

- Use pci_dev_id() when possible instead of manually composing ID from
  dev-&gt;bus-&gt;number and dev-&gt;devfn (Xiongfeng Wang, Zheng Zengkai)

- Move pci_create_resource_files() declarations to linux/pci.h for alpha
  build warnings (Arnd Bergmann)

- Remove unused hotplug function declarations (Yue Haibing)

- Remove unused mvebu struct mvebu_pcie.busn (Pali Rohár)

- Unexport pcie_port_bus_type (Bjorn Helgaas)

- Remove unnecessary sysfs ID local variable initialization (Bjorn Helgaas)

- Fix BAR value printk formatting to accommodate 32-bit values (Bjorn
  Helgaas)

- Use consistent pointer types for config access syscall get_user() and
  put_user() uses (Bjorn Helgaas)

- Simplify AER_RECOVER_RING_SIZE definition (Bjorn Helgaas)

- Simplify pci_pio_to_address() (Bjorn Helgaas)

- Simplify pci_dev_driver() (Bjorn Helgaas)

- Fix pci_bus_resetable(), pci_slot_resetable() name typos (Bjorn Helgaas)

- Fix code and doc typos and code formatting (Bjorn Helgaas)

- Tidy config space save/restore messages (Bjorn Helgaas)

* pci/misc:
  PCI: Tidy config space save/restore messages
  PCI: Fix code formatting inconsistencies
  PCI: Fix typos in docs and comments
  PCI: Fix pci_bus_resetable(), pci_slot_resetable() name typos
  PCI: Simplify pci_dev_driver()
  PCI: Simplify pci_pio_to_address()
  PCI/AER: Simplify AER_RECOVER_RING_SIZE definition
  PCI: Use consistent put_user() pointer types
  PCI: Fix printk field formatting
  PCI: Remove unnecessary initializations
  PCI: Unexport pcie_port_bus_type
  PCI: mvebu: Remove unused busn member
  PCI: Remove unused function declarations
  PCI/sysfs: Move declarations to linux/pci.h
  PCI/P2PDMA: Use pci_dev_id() to simplify the code
  PCI/IOV: Use pci_dev_id() to simplify the code
  PCI/AER: Use pci_dev_id() to simplify the code
  PCI: apple: Use pci_dev_id() to simplify the code
  PCI/DOE: Fix destroy_work_on_stack() race
  PCI: Explicitly include correct DT includes
  x86/PCI: Use struct_size() in pirq_convert_irt_table()
  PCI: Change pdev-&gt;rom_attr_enabled to single bit
  PCI: Reorder pci_dev fields to reduce holes
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
- Reorder struct pci_dev to avoid holes and reduce size (Christophe
  JAILLET)

- Change pdev-&gt;rom_attr_enabled to single bit since it's only a boolean
  value (Christophe JAILLET)

- Use struct_size() in pirq_convert_irt_table() instead of hand-writing it
  (Christophe JAILLET)

- Explicitly include correct DT includes to untangle headers (Rob Herring)

- Fix a DOE race between destroy_work_on_stack() and the stack-allocated
  task-&gt;work struct going out of scope in pci_doe() (Ira Weiny)

- Use pci_dev_id() when possible instead of manually composing ID from
  dev-&gt;bus-&gt;number and dev-&gt;devfn (Xiongfeng Wang, Zheng Zengkai)

- Move pci_create_resource_files() declarations to linux/pci.h for alpha
  build warnings (Arnd Bergmann)

- Remove unused hotplug function declarations (Yue Haibing)

- Remove unused mvebu struct mvebu_pcie.busn (Pali Rohár)

- Unexport pcie_port_bus_type (Bjorn Helgaas)

- Remove unnecessary sysfs ID local variable initialization (Bjorn Helgaas)

- Fix BAR value printk formatting to accommodate 32-bit values (Bjorn
  Helgaas)

- Use consistent pointer types for config access syscall get_user() and
  put_user() uses (Bjorn Helgaas)

- Simplify AER_RECOVER_RING_SIZE definition (Bjorn Helgaas)

- Simplify pci_pio_to_address() (Bjorn Helgaas)

- Simplify pci_dev_driver() (Bjorn Helgaas)

- Fix pci_bus_resetable(), pci_slot_resetable() name typos (Bjorn Helgaas)

- Fix code and doc typos and code formatting (Bjorn Helgaas)

- Tidy config space save/restore messages (Bjorn Helgaas)

* pci/misc:
  PCI: Tidy config space save/restore messages
  PCI: Fix code formatting inconsistencies
  PCI: Fix typos in docs and comments
  PCI: Fix pci_bus_resetable(), pci_slot_resetable() name typos
  PCI: Simplify pci_dev_driver()
  PCI: Simplify pci_pio_to_address()
  PCI/AER: Simplify AER_RECOVER_RING_SIZE definition
  PCI: Use consistent put_user() pointer types
  PCI: Fix printk field formatting
  PCI: Remove unnecessary initializations
  PCI: Unexport pcie_port_bus_type
  PCI: mvebu: Remove unused busn member
  PCI: Remove unused function declarations
  PCI/sysfs: Move declarations to linux/pci.h
  PCI/P2PDMA: Use pci_dev_id() to simplify the code
  PCI/IOV: Use pci_dev_id() to simplify the code
  PCI/AER: Use pci_dev_id() to simplify the code
  PCI: apple: Use pci_dev_id() to simplify the code
  PCI/DOE: Fix destroy_work_on_stack() race
  PCI: Explicitly include correct DT includes
  x86/PCI: Use struct_size() in pirq_convert_irt_table()
  PCI: Change pdev-&gt;rom_attr_enabled to single bit
  PCI: Reorder pci_dev fields to reduce holes
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'pci/controller/resources'</title>
<updated>2023-08-29T16:03:56+00:00</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2023-08-29T16:03:56+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=b7fa64ec6af16ad27cdf277aaafdf90eb9c50102'/>
<id>b7fa64ec6af16ad27cdf277aaafdf90eb9c50102</id>
<content type='text'>
- Use Use devm_platform_get_and_ioremap_resource() instead of open-coding
  platform_get_resource() followed by devm_ioremap_resource() (Yang Li)

* pci/controller/resources:
  PCI: imx6: Use devm_platform_get_and_ioremap_resource()
  PCI: xgene-msi: Use devm_platform_get_and_ioremap_resource()
  PCI: v3: Use devm_platform_get_and_ioremap_resource()
  PCI: rcar-gen2: Use devm_platform_get_and_ioremap_resource()
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
- Use Use devm_platform_get_and_ioremap_resource() instead of open-coding
  platform_get_resource() followed by devm_ioremap_resource() (Yang Li)

* pci/controller/resources:
  PCI: imx6: Use devm_platform_get_and_ioremap_resource()
  PCI: xgene-msi: Use devm_platform_get_and_ioremap_resource()
  PCI: v3: Use devm_platform_get_and_ioremap_resource()
  PCI: rcar-gen2: Use devm_platform_get_and_ioremap_resource()
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'pci/controller/remove-void-cast'</title>
<updated>2023-08-29T16:03:56+00:00</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2023-08-29T16:03:56+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=6cef12635821c3d12b6b038b6e5e926917a3dca3'/>
<id>6cef12635821c3d12b6b038b6e5e926917a3dca3</id>
<content type='text'>
- Add stubs for devm action functions that call clk_disable_unprepare() to
  avoid casts between incompatible function types (Krzysztof Wilczyński)

* pci/controller/remove-void-cast:
  PCI: microchip: Remove cast between incompatible function type
  PCI: keembay: Remove cast between incompatible function type
  PCI: meson: Remove cast between incompatible function type
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
- Add stubs for devm action functions that call clk_disable_unprepare() to
  avoid casts between incompatible function types (Krzysztof Wilczyński)

* pci/controller/remove-void-cast:
  PCI: microchip: Remove cast between incompatible function type
  PCI: keembay: Remove cast between incompatible function type
  PCI: meson: Remove cast between incompatible function type
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'pci/controller/vmd'</title>
<updated>2023-08-29T16:03:55+00:00</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2023-08-29T16:03:55+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=663544b5697e8c8a815f3ace8e49d62716d653b8'/>
<id>663544b5697e8c8a815f3ace8e49d62716d653b8</id>
<content type='text'>
- Fix disable of bridge windows during domain reset; previously we cleared
  the base/limit registers, which left the windows enabled (Nirmal Patel)

* pci/controller/vmd:
  PCI: vmd: Disable bridge window for domain reset
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
- Fix disable of bridge windows during domain reset; previously we cleared
  the base/limit registers, which left the windows enabled (Nirmal Patel)

* pci/controller/vmd:
  PCI: vmd: Disable bridge window for domain reset
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'pci/controller/tegra194'</title>
<updated>2023-08-29T16:03:55+00:00</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2023-08-29T16:03:55+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=5ffe43c027c2266d4e0e687daeb12bdb5a235ae7'/>
<id>5ffe43c027c2266d4e0e687daeb12bdb5a235ae7</id>
<content type='text'>
- Revert "PCI: tegra194: Enable support for 256 Byte payload" because Linux
  doesn't know how to reduce MPS from to 256 to 128 bytes for Endpoints
  below a Switch (because other devices below the Switch might already be
  operating), which leads to Malformed TLP errors (Vidya Sagar)

* pci/controller/tegra194:
  Revert "PCI: tegra194: Enable support for 256 Byte payload"
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
- Revert "PCI: tegra194: Enable support for 256 Byte payload" because Linux
  doesn't know how to reduce MPS from to 256 to 128 bytes for Endpoints
  below a Switch (because other devices below the Switch might already be
  operating), which leads to Malformed TLP errors (Vidya Sagar)

* pci/controller/tegra194:
  Revert "PCI: tegra194: Enable support for 256 Byte payload"
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'pci/controller/rockchip'</title>
<updated>2023-08-29T16:03:54+00:00</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2023-08-29T16:03:54+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=a7dfca1a68399303d45b753798877fd021ae8bb9'/>
<id>a7dfca1a68399303d45b753798877fd021ae8bb9</id>
<content type='text'>
- Use 64-bit mask on MSI 64-bit PCI address to avoid zeroing out the upper
  32 bits (Rick Wertenbroek)

* pci/controller/rockchip:
  PCI: rockchip: Use 64-bit mask on MSI 64-bit PCI address
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
- Use 64-bit mask on MSI 64-bit PCI address to avoid zeroing out the upper
  32 bits (Rick Wertenbroek)

* pci/controller/rockchip:
  PCI: rockchip: Use 64-bit mask on MSI 64-bit PCI address
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'pci/controller/qcom-ep'</title>
<updated>2023-08-29T16:03:54+00:00</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2023-08-29T16:03:54+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=2195c163662449272e7145c8893424e9f5180ad8'/>
<id>2195c163662449272e7145c8893424e9f5180ad8</id>
<content type='text'>
- Log unknown Qcom Endpoint IRQ events at error level, not debug level
  (Manivannan Sadhasivam)

- Add DT and driver support for qcom interconnect bandwidth voting for
  "pcie-mem" and "cpu-pcie" interconnects (Krishna chaitanya chundru)

* pci/controller/qcom-ep:
  PCI: qcom-ep: Add ICC bandwidth voting support
  dt-bindings: PCI: qcom: ep: Add interconnects path
  PCI: qcom-ep: Treat unknown IRQ events as an error
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
- Log unknown Qcom Endpoint IRQ events at error level, not debug level
  (Manivannan Sadhasivam)

- Add DT and driver support for qcom interconnect bandwidth voting for
  "pcie-mem" and "cpu-pcie" interconnects (Krishna chaitanya chundru)

* pci/controller/qcom-ep:
  PCI: qcom-ep: Add ICC bandwidth voting support
  dt-bindings: PCI: qcom: ep: Add interconnects path
  PCI: qcom-ep: Treat unknown IRQ events as an error
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'pci/controller/qcom-edma'</title>
<updated>2023-08-29T16:03:54+00:00</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2023-08-29T16:03:54+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=e8ce465fd45c9643bf865f549595418d4bc7575b'/>
<id>e8ce465fd45c9643bf865f549595418d4bc7575b</id>
<content type='text'>
- Pass the Qcom Endpoint 4K alignment requirement for outbound windows to
  the EPF core so EPF drivers can use it (Manivannan Sadhasivam)

- Use alignment restriction from EPF core in Qcom EPF MHI driver
  (Manivannan Sadhasivam)

- Add Qcom Endpoint eDMA support by enabling the eDMA IRQ (Manivannan
  Sadhasivam)

- Add Qcom MHI eDMA support (Manivannan Sadhasivam)

- Add Qcom Snapdragon SM8450 support to the EPF MHI driver (Manivannan
  Sadhasivam)

- Use iATU for EPF MHI transfers smaller than 4K to avoid eDMA setup
  latency (Manivannan Sadhasivam)

- Add pci_epc_mem_init() kernel-doc (Manivannan Sadhasivam)

* pci/controller/qcom-edma:
  PCI: endpoint: Add kernel-doc for pci_epc_mem_init() API
  PCI: epf-mhi: Use iATU for small transfers
  PCI: epf-mhi: Add support for SM8450
  PCI: epf-mhi: Add eDMA support
  PCI: qcom-ep: Add eDMA support
  PCI: epf-mhi: Make use of the alignment restriction from EPF core
  PCI: qcom-ep: Pass alignment restriction to the EPF core
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
- Pass the Qcom Endpoint 4K alignment requirement for outbound windows to
  the EPF core so EPF drivers can use it (Manivannan Sadhasivam)

- Use alignment restriction from EPF core in Qcom EPF MHI driver
  (Manivannan Sadhasivam)

- Add Qcom Endpoint eDMA support by enabling the eDMA IRQ (Manivannan
  Sadhasivam)

- Add Qcom MHI eDMA support (Manivannan Sadhasivam)

- Add Qcom Snapdragon SM8450 support to the EPF MHI driver (Manivannan
  Sadhasivam)

- Use iATU for EPF MHI transfers smaller than 4K to avoid eDMA setup
  latency (Manivannan Sadhasivam)

- Add pci_epc_mem_init() kernel-doc (Manivannan Sadhasivam)

* pci/controller/qcom-edma:
  PCI: endpoint: Add kernel-doc for pci_epc_mem_init() API
  PCI: epf-mhi: Use iATU for small transfers
  PCI: epf-mhi: Add support for SM8450
  PCI: epf-mhi: Add eDMA support
  PCI: qcom-ep: Add eDMA support
  PCI: epf-mhi: Make use of the alignment restriction from EPF core
  PCI: qcom-ep: Pass alignment restriction to the EPF core
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'pci/controller/qcom'</title>
<updated>2023-08-29T16:03:54+00:00</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2023-08-29T16:03:54+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=fa8805ad67fa484f8f15ee74309aedef0f4b4982'/>
<id>fa8805ad67fa484f8f15ee74309aedef0f4b4982</id>
<content type='text'>
- Configure controller so MHI bus master clock will be switched off while
  in ASPM L1.x states (Manivannan Sadhasivam)

- Add sa8775p DT binding and driver support (Mrinmay Sarkar)

- Fix broken DT SDX65 "compatible" property (Krzysztof Kozlowski)

* pci/controller/qcom:
  dt-bindings: PCI: qcom: Fix SDX65 compatible
  PCI: qcom: Add support for sa8775p SoC
  dt-bindings: PCI: qcom: Add sa8775p compatible
  PCI: qcom-ep: Switch MHI bus master clock off during L1SS
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
- Configure controller so MHI bus master clock will be switched off while
  in ASPM L1.x states (Manivannan Sadhasivam)

- Add sa8775p DT binding and driver support (Mrinmay Sarkar)

- Fix broken DT SDX65 "compatible" property (Krzysztof Kozlowski)

* pci/controller/qcom:
  dt-bindings: PCI: qcom: Fix SDX65 compatible
  PCI: qcom: Add support for sa8775p SoC
  dt-bindings: PCI: qcom: Add sa8775p compatible
  PCI: qcom-ep: Switch MHI bus master clock off during L1SS
</pre>
</div>
</content>
</entry>
</feed>
