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<title>linux.git/drivers/pci/access.c, branch v3.19</title>
<subtitle>Linux kernel source tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/'/>
<entry>
<title>PCI: Apply _HPX Link Control settings to all devices with a link</title>
<updated>2014-11-13T22:43:42+00:00</updated>
<author>
<name>Yinghai Lu</name>
<email>yinghai@kernel.org</email>
</author>
<published>2014-11-11T20:09:46+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=7a1562d4f2d01721ad07c3a326db7512077ceea9'/>
<id>7a1562d4f2d01721ad07c3a326db7512077ceea9</id>
<content type='text'>
Previously we applied _HPX type 2 record Link Control register settings
only to bridges with a subordinate bus.  But it's better to apply them to
all devices with a link because if the subordinate bus has not been
allocated yet, we won't apply settings to the device.

Use pcie_cap_has_lnkctl() to determine whether the device has a Link
Control register instead of looking at dev-&gt;subordinate.

[bhelgaas: changelog]
Fixes: 6cd33649fa83 ("PCI: Add pci_configure_device() during enumeration")
Signed-off-by: Yinghai Lu &lt;yinghai@kernel.org&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;</content>
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<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Previously we applied _HPX type 2 record Link Control register settings
only to bridges with a subordinate bus.  But it's better to apply them to
all devices with a link because if the subordinate bus has not been
allocated yet, we won't apply settings to the device.

Use pcie_cap_has_lnkctl() to determine whether the device has a Link
Control register instead of looking at dev-&gt;subordinate.

[bhelgaas: changelog]
Fixes: 6cd33649fa83 ("PCI: Add pci_configure_device() during enumeration")
Signed-off-by: Yinghai Lu &lt;yinghai@kernel.org&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;</pre>
</div>
</content>
</entry>
<entry>
<title>PCI: Merge multi-line quoted strings</title>
<updated>2014-06-11T02:20:42+00:00</updated>
<author>
<name>Ryan Desfosses</name>
<email>ryan@desfo.org</email>
</author>
<published>2014-04-19T00:13:50+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=227f06470502c4fea3d93df1f12a77e3e37f6263'/>
<id>227f06470502c4fea3d93df1f12a77e3e37f6263</id>
<content type='text'>
Merge quoted strings that are broken across lines into a single entity.
The compiler merges them anyway, but checkpatch complains about it, and
merging them makes it easier to grep for strings.

No functional change.

[bhelgaas: changelog, do the same for everything under drivers/pci]
Signed-off-by: Ryan Desfosses &lt;ryan@desfo.org&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Merge quoted strings that are broken across lines into a single entity.
The compiler merges them anyway, but checkpatch complains about it, and
merging them makes it easier to grep for strings.

No functional change.

[bhelgaas: changelog, do the same for everything under drivers/pci]
Signed-off-by: Ryan Desfosses &lt;ryan@desfo.org&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;</pre>
</div>
</content>
</entry>
<entry>
<title>PCI: Fix return value from pci_user_{read,write}_config_*()</title>
<updated>2014-05-27T23:10:16+00:00</updated>
<author>
<name>Gavin Shan</name>
<email>gwshan@linux.vnet.ibm.com</email>
</author>
<published>2014-05-21T05:23:30+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=d97ffe236894856d08146390ef3fbe6448a8ac2b'/>
<id>d97ffe236894856d08146390ef3fbe6448a8ac2b</id>
<content type='text'>
The PCI user-space config accessors pci_user_{read,write}_config_*() return
negative error numbers, which were introduced by commit 34e3207205ef
("PCI: handle positive error codes").  That patch converted all positive
error numbers from platform-specific PCI config accessors to -EINVAL, which
means the callers don't know anything about the specific cause of the
failure.

The patch fixes the issue by converting the positive PCIBIOS_* error values
to generic negative error numbers with pcibios_err_to_errno().

[bhelgaas: changelog]
Signed-off-by: Gavin Shan &lt;gwshan@linux.vnet.ibm.com&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Acked-by: Greg Thelen &lt;gthelen@google.com&gt;</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The PCI user-space config accessors pci_user_{read,write}_config_*() return
negative error numbers, which were introduced by commit 34e3207205ef
("PCI: handle positive error codes").  That patch converted all positive
error numbers from platform-specific PCI config accessors to -EINVAL, which
means the callers don't know anything about the specific cause of the
failure.

The patch fixes the issue by converting the positive PCIBIOS_* error values
to generic negative error numbers with pcibios_err_to_errno().

[bhelgaas: changelog]
Signed-off-by: Gavin Shan &lt;gwshan@linux.vnet.ibm.com&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Acked-by: Greg Thelen &lt;gthelen@google.com&gt;</pre>
</div>
</content>
</entry>
<entry>
<title>PCI: Remove unused pci_vpd_truncate()</title>
<updated>2014-01-13T18:14:43+00:00</updated>
<author>
<name>Stephen Hemminger</name>
<email>stephen@networkplumber.org</email>
</author>
<published>2014-01-10T22:10:13+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=3984ca1c6e493d06fa7e8dc96ce2b23b86175ec4'/>
<id>3984ca1c6e493d06fa7e8dc96ce2b23b86175ec4</id>
<content type='text'>
My philosophy is unused code is dead code.  And dead code is subject to bit
rot and is a likely source of bugs.  Use it or lose it.

This reverts db5679437a2b ("PCI: add interface to set visible size of
VPD"), removing this interface:

    pci_vpd_truncate()

[bhelgaas: split to separate patch, also remove prototype from pci.h]
Signed-off-by: Stephen Hemminger &lt;stephen@networkplumber.org&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
My philosophy is unused code is dead code.  And dead code is subject to bit
rot and is a likely source of bugs.  Use it or lose it.

This reverts db5679437a2b ("PCI: add interface to set visible size of
VPD"), removing this interface:

    pci_vpd_truncate()

[bhelgaas: split to separate patch, also remove prototype from pci.h]
Signed-off-by: Stephen Hemminger &lt;stephen@networkplumber.org&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;</pre>
</div>
</content>
</entry>
<entry>
<title>PCI: Remove pcie_cap_has_devctl()</title>
<updated>2013-08-29T02:51:39+00:00</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2013-08-28T18:03:42+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=fed2451512495f0f0820ac9e53936bd208569bc8'/>
<id>fed2451512495f0f0820ac9e53936bd208569bc8</id>
<content type='text'>
pcie_cap_has_devctl() does nothing, so remove it.  Simplicity over
consistency in this case.  No functional change.

Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Reviewed-By: Jiang Liu &lt;jiang.liu@huawei.com&gt;</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
pcie_cap_has_devctl() does nothing, so remove it.  Simplicity over
consistency in this case.  No functional change.

Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Reviewed-By: Jiang Liu &lt;jiang.liu@huawei.com&gt;</pre>
</div>
</content>
</entry>
<entry>
<title>PCI: Support PCIe Capability Slot registers only for ports with slots</title>
<updated>2013-08-29T02:51:39+00:00</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2013-08-28T18:01:03+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=6d3a1741f1e648cfbd5a0cc94477a0d5004c6f5e'/>
<id>6d3a1741f1e648cfbd5a0cc94477a0d5004c6f5e</id>
<content type='text'>
Previously we allowed callers to access Slot Capabilities, Status, and
Control for Root Ports even if the Root Port did not implement a slot.
This seems dubious because the spec only requires these registers if a
slot is implemented.

It's true that even Root Ports without slots must have *space* for these
slot registers, because the Root Capabilities, Status, and Control
registers are after the slot registers in the capability.  However,
for a v1 PCIe Capability, the *semantics* of the slot registers are
undefined unless a slot is implemented.

Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Reviewed-By: Jiang Liu &lt;jiang.liu@huawei.com&gt;</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Previously we allowed callers to access Slot Capabilities, Status, and
Control for Root Ports even if the Root Port did not implement a slot.
This seems dubious because the spec only requires these registers if a
slot is implemented.

It's true that even Root Ports without slots must have *space* for these
slot registers, because the Root Capabilities, Status, and Control
registers are after the slot registers in the capability.  However,
for a v1 PCIe Capability, the *semantics* of the slot registers are
undefined unless a slot is implemented.

Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Reviewed-By: Jiang Liu &lt;jiang.liu@huawei.com&gt;</pre>
</div>
</content>
</entry>
<entry>
<title>PCI: Remove PCIe Capability version checks</title>
<updated>2013-08-29T02:51:39+00:00</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2013-08-28T17:33:53+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=c8b303d0206b28c4ff3aecada47108d1655ae00f'/>
<id>c8b303d0206b28c4ff3aecada47108d1655ae00f</id>
<content type='text'>
Previously we relied on the PCIe r3.0, sec 7.8, spec language that says
"For Functions that do not implement the [Link, Slot, Root] registers,
these spaces must be hardwired to 0b," which means that for v2 PCIe
capabilities, we don't need to check the device type at all.

But it's simpler if we don't need to check the capability version at all,
and I think the spec is explicit enough about which registers are required
for which types that we can remove the version checks.

Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Reviewed-By: Jiang Liu &lt;jiang.liu@huawei.com&gt;</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Previously we relied on the PCIe r3.0, sec 7.8, spec language that says
"For Functions that do not implement the [Link, Slot, Root] registers,
these spaces must be hardwired to 0b," which means that for v2 PCIe
capabilities, we don't need to check the device type at all.

But it's simpler if we don't need to check the capability version at all,
and I think the spec is explicit enough about which registers are required
for which types that we can remove the version checks.

Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Reviewed-By: Jiang Liu &lt;jiang.liu@huawei.com&gt;</pre>
</div>
</content>
</entry>
<entry>
<title>PCI: Allow PCIe Capability link-related register access for switches</title>
<updated>2013-08-28T17:28:22+00:00</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2013-08-27T15:54:40+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=d3694d4fa3f44f6a295f8ab064937c8a1549d174'/>
<id>d3694d4fa3f44f6a295f8ab064937c8a1549d174</id>
<content type='text'>
Every PCIe device has a link, except Root Complex Integrated Endpoints
and Root Complex Event Collectors.  Previously we didn't give access
to PCIe capability link-related registers for Upstream Ports, Downstream
Ports, and Bridges, so attempts to read PCI_EXP_LNKCTL incorrectly
returned zero.  See PCIe spec r3.0, sec 7.8 and 1.3.2.3.

Reference: http://lkml.kernel.org/r/979A8436335E3744ADCD3A9F2A2B68A52AD136BE@SJEXCHMB10.corp.ad.broadcom.com
Reported-by: Yuval Mintz &lt;yuvalmin@broadcom.com&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Reviewed-By: Jiang Liu &lt;jiang.liu@huawei.com&gt;</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Every PCIe device has a link, except Root Complex Integrated Endpoints
and Root Complex Event Collectors.  Previously we didn't give access
to PCIe capability link-related registers for Upstream Ports, Downstream
Ports, and Bridges, so attempts to read PCI_EXP_LNKCTL incorrectly
returned zero.  See PCIe spec r3.0, sec 7.8 and 1.3.2.3.

Reference: http://lkml.kernel.org/r/979A8436335E3744ADCD3A9F2A2B68A52AD136BE@SJEXCHMB10.corp.ad.broadcom.com
Reported-by: Yuval Mintz &lt;yuvalmin@broadcom.com&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Reviewed-By: Jiang Liu &lt;jiang.liu@huawei.com&gt;</pre>
</div>
</content>
</entry>
<entry>
<title>PCI: Fix PCI Express Capability accessors for PCI_EXP_FLAGS</title>
<updated>2013-02-15T18:46:24+00:00</updated>
<author>
<name>Alex Williamson</name>
<email>alex.williamson@redhat.com</email>
</author>
<published>2013-02-14T18:35:42+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=969daa349f4821a02936af7202b51a9affc7b6da'/>
<id>969daa349f4821a02936af7202b51a9affc7b6da</id>
<content type='text'>
PCI_EXP_FLAGS_TYPE is a mask, not an offset.  Fix it.

Previously, pcie_capability_read_word(..., PCI_EXP_FLAGS, ...) would
fail.

[bhelgaas:  tweak changelog]
Signed-off-by: Alex Williamson &lt;alex.williamson@redhat.com&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
CC: stable@vger.kernel.org	# v3.7+</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
PCI_EXP_FLAGS_TYPE is a mask, not an offset.  Fix it.

Previously, pcie_capability_read_word(..., PCI_EXP_FLAGS, ...) would
fail.

[bhelgaas:  tweak changelog]
Signed-off-by: Alex Williamson &lt;alex.williamson@redhat.com&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
CC: stable@vger.kernel.org	# v3.7+</pre>
</div>
</content>
</entry>
<entry>
<title>PCI: Use PCI Express Capability accessor</title>
<updated>2013-01-31T04:24:39+00:00</updated>
<author>
<name>Myron Stowe</name>
<email>myron.stowe@redhat.com</email>
</author>
<published>2013-01-26T00:55:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=1c531d82ee1a220ae7132ba0eb31edaf186b56d1'/>
<id>1c531d82ee1a220ae7132ba0eb31edaf186b56d1</id>
<content type='text'>
Use PCI Express Capability access functions to simplify device
Capabilities Register usages.

Signed-off-by: Myron Stowe &lt;myron.stowe@redhat.com&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Use PCI Express Capability access functions to simplify device
Capabilities Register usages.

Signed-off-by: Myron Stowe &lt;myron.stowe@redhat.com&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;</pre>
</div>
</content>
</entry>
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