linux.git/drivers/ntb/hw/intel, branch v5.8

ntb: hw: remove the code that sets the DMA mask

2020-06-06T00:02:08+00:00

This patch removes the code that sets the DMA mask as it no longer
makes sense to do this.

Fixes: 7f46c8b3a552 ("NTB: ntb_tool: Add full multi-port NTB API support")
Signed-off-by: Logan Gunthorpe 
Tested-by: Alexander Fomichev 
Signed-off-by: Sanjay R Mehta 
Signed-off-by: Jon Mason

ntb: intel: fix static declaration

2020-06-06T00:02:08+00:00

intel_ntb4_link_disable() missing static declaration.

Reported-by: kbuild test robot 
Signed-off-by: Dave Jiang 
Signed-off-by: Jon Mason

ntb: intel: add hw workaround for NTB BAR alignment

2020-06-06T00:02:00+00:00

Add NTB_HWERR_BAR_ALIGN hw errata flag to work around issue where the
aligment for the XLAT base must be BAR size aligned rather than 4k page
aligned. On ICX platform, the XLAT base can be 4k page size aligned
rather than BAR size aligned unlike the previous gen Intel NTB. However,
a silicon errata prevented this from working as expected and a workaround
is introduced to resolve the issue.

Signed-off-by: Dave Jiang 
Signed-off-by: Jon Mason

ntb: intel: Add Icelake (gen4) support for Intel NTB

2020-04-20T14:16:23+00:00

Adding 4th generation Intel NTB support bits. There are a lot of common
parts that the gen4 NTB has with gen3 NTB on Skylake. The commonalities are
reused in gen4 Icelake NTB.

Signed-off-by: Dave Jiang 
Signed-off-by: Jon Mason

Merge tag 'ntb-5.3' of git://github.com/jonmason/ntb

2019-07-21T16:46:59+00:00

Pull NTB updates from Jon Mason:
 "New feature to add support for NTB virtual MSI interrupts, the ability
  to test and use this feature in the NTB transport layer.

  Also, bug fixes for the AMD and Switchtec drivers, as well as some
  general patches"

* tag 'ntb-5.3' of git://github.com/jonmason/ntb: (22 commits)
  NTB: Describe the ntb_msi_test client in the documentation.
  NTB: Add MSI interrupt support to ntb_transport
  NTB: Add ntb_msi_test support to ntb_test
  NTB: Introduce NTB MSI Test Client
  NTB: Introduce MSI library
  NTB: Rename ntb.c to support multiple source files in the module
  NTB: Introduce functions to calculate multi-port resource index
  NTB: Introduce helper functions to calculate logical port number
  PCI/switchtec: Add module parameter to request more interrupts
  PCI/MSI: Support allocating virtual MSI interrupts
  ntb_hw_switchtec: Fix setup MW with failure bug
  ntb_hw_switchtec: Skip unnecessary re-setup of shared memory window for crosslink case
  ntb_hw_switchtec: Remove redundant steps of switchtec_ntb_reinit_peer() function
  NTB: correct ntb_dev_ops and ntb_dev comment typos
  NTB: amd: Silence shift wrapping warning in amd_ntb_db_vector_mask()
  ntb_hw_switchtec: potential shift wrapping bug in switchtec_ntb_init_sndev()
  NTB: ntb_transport: Ensure qp->tx_mw_dma_addr is initaliazed
  NTB: ntb_hw_amd: set peer limit register
  NTB: ntb_perf: Clear stale values in doorbell and command SPAD register
  NTB: ntb_perf: Disable NTB link after clearing peer XLAT registers
  ...

ntb: intel: Make intel_ntb3_peer_db_addr static

2019-06-13T12:53:19+00:00

Fix sparse warning:

drivers/ntb/hw/intel/ntb_hw_gen3.c:535:5: warning:
 symbol 'intel_ntb3_peer_db_addr' was not declared. Should it be static?

Signed-off-by: YueHaibing 
Acked-by: Dave Jiang 
Signed-off-by: Jon Mason

treewide: Add SPDX license identifier - Makefile/Kconfig

2019-05-21T08:50:46+00:00

Add SPDX license identifiers to all Make/Kconfig files which:

 - Have no license information of any form

These files fall under the project license, GPL v2 only. The resulting SPDX
license identifier is:

  GPL-2.0-only

Signed-off-by: Thomas Gleixner 
Signed-off-by: Greg Kroah-Hartman

Merge tag 'ntb-5.1' of git://github.com/jonmason/ntb

2019-03-15T21:32:59+00:00

Pull NTB updates from Jon Mason:

 - fixes for switchtec debugability and mapping table entries

 - NTB transport improvements

 - a reworking of the peer_db_addr for better abstraction

* tag 'ntb-5.1' of git://github.com/jonmason/ntb:
  NTB: add new parameter to peer_db_addr() db_bit and db_data
  NTB: ntb_transport: Ensure the destination buffer is mapped for TX DMA
  NTB: ntb_transport: Free MWs in ntb_transport_link_cleanup()
  ntb_hw_switchtec: Added support of >=4G memory windows
  ntb_hw_switchtec: NT req id mapping table register entry number should be 512
  ntb_hw_switchtec: debug print 64bit aligned crosslink BAR Numbers

NTB: add new parameter to peer_db_addr() db_bit and db_data

2019-02-13T16:03:18+00:00

NTB door bell usage depends on NTB hardware.

ex: intel NTB gen1 has one peer door bell register which can be controlled
by the bitmap writen to it, while Intel NTB gen3 has a registers
per door bell and the data trigering the each door bell is always 1.

therefore exposing only peer door bell address forcing the user
to be aware of such low level details

Signed-off-by: Leonid Ravich 
Acked-by: Logan Gunthorpe 
Acked-by: Dave Jiang 
Acked-by: Allen Hubbe 
Signed-off-by: Jon Mason

ntb: ntb_hw_intel: use io-64-nonatomic instead of in-driver hacks

2019-01-22T12:39:59+00:00

Now that ioread64 and iowrite64 are available in io-64-nonatomic,
we can remove the hack at the top of ntb_hw_intel.c and replace it
with an include.

Signed-off-by: Logan Gunthorpe 
Reviewed-by: Andy Shevchenko 
Acked-by: Dave Jiang 
Acked-by: Allen Hubbe 
Acked-by: Jon Mason 
Signed-off-by: Greg Kroah-Hartman