<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux.git/drivers/ntb/hw/intel, branch v4.9</title>
<subtitle>Linux kernel source tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/'/>
<entry>
<title>ntb: ntb_hw_intel: init peer_addr in struct intel_ntb_dev</title>
<updated>2016-11-13T21:48:29+00:00</updated>
<author>
<name>Dave Jiang</name>
<email>dave.jiang@intel.com</email>
</author>
<published>2016-10-27T18:06:44+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=25ea9f2bf5f76082da919f2a91ea8d920932c1da'/>
<id>25ea9f2bf5f76082da919f2a91ea8d920932c1da</id>
<content type='text'>
The peer_addr member of intel_ntb_dev is not set, therefore when
acquiring ntb_peer_db and ntb_peer_spad we only get the offset rather
than the actual physical address. Adding fix to correct that.

Signed-off-by: Dave Jiang &lt;dave.jiang@intel.com&gt;
Acked-by: Allen Hubbe &lt;Allen.Hubbe@emc.com&gt;
Signed-off-by: Jon Mason &lt;jdmason@kudzu.us&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The peer_addr member of intel_ntb_dev is not set, therefore when
acquiring ntb_peer_db and ntb_peer_spad we only get the offset rather
than the actual physical address. Adding fix to correct that.

Signed-off-by: Dave Jiang &lt;dave.jiang@intel.com&gt;
Acked-by: Allen Hubbe &lt;Allen.Hubbe@emc.com&gt;
Signed-off-by: Jon Mason &lt;jdmason@kudzu.us&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>NTB: ntb_hw_intel: Fix typo in module parameter descriptions</title>
<updated>2016-11-13T21:48:29+00:00</updated>
<author>
<name>Wei Yongjun</name>
<email>weiyj.lk@gmail.com</email>
</author>
<published>2016-08-08T09:48:42+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=49b89de41f8d97eb13a60c1865ed61fbebed0d15'/>
<id>49b89de41f8d97eb13a60c1865ed61fbebed0d15</id>
<content type='text'>
Fix typo in module parameter descriptions.

Signed-off-by: Wei Yongjun &lt;weiyj.lk@gmail.com&gt;
Acked-by: Allen Hubbe &lt;Allen.Hubbe@emc.com&gt;
Signed-off-by: Jon Mason &lt;jdmason@kudzu.us&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Fix typo in module parameter descriptions.

Signed-off-by: Wei Yongjun &lt;weiyj.lk@gmail.com&gt;
Acked-by: Allen Hubbe &lt;Allen.Hubbe@emc.com&gt;
Signed-off-by: Jon Mason &lt;jdmason@kudzu.us&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>NTB: ntb_hw_intel: use local variable pdev</title>
<updated>2016-08-05T14:34:13+00:00</updated>
<author>
<name>Allen Hubbe</name>
<email>Allen.Hubbe@emc.com</email>
</author>
<published>2016-07-22T13:38:23+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=95f1464f695055c72de6044d7c8a2a7a1e0c7ea2'/>
<id>95f1464f695055c72de6044d7c8a2a7a1e0c7ea2</id>
<content type='text'>
Clean up duplicated expression by replacing it with the equivalent local
variable pdev.

Signed-off-by: Allen Hubbe &lt;Allen.Hubbe@emc.com&gt;
Acked-by: Dave Jiang &lt;dave.jiang@intel.com&gt;
Signed-off-by: Jon Mason &lt;jdmason@kudzu.us&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Clean up duplicated expression by replacing it with the equivalent local
variable pdev.

Signed-off-by: Allen Hubbe &lt;Allen.Hubbe@emc.com&gt;
Acked-by: Dave Jiang &lt;dave.jiang@intel.com&gt;
Signed-off-by: Jon Mason &lt;jdmason@kudzu.us&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>NTB: ntb_hw_intel: show BAR size in debugfs info</title>
<updated>2016-08-05T14:33:47+00:00</updated>
<author>
<name>Allen Hubbe</name>
<email>Allen.Hubbe@emc.com</email>
</author>
<published>2016-07-22T13:38:22+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=4089527388808ca380af908fdbdd3d723cc9e751'/>
<id>4089527388808ca380af908fdbdd3d723cc9e751</id>
<content type='text'>
It will be useful to know the hardware configured BAR size to diagnose
issues with NTB memory windows.

Signed-off-by: Allen Hubbe &lt;Allen.Hubbe@emc.com&gt;
Acked-by: Dave Jiang &lt;dave.jiang@intel.com&gt;
Signed-off-by: Jon Mason &lt;jdmason@kudzu.us&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
It will be useful to know the hardware configured BAR size to diagnose
issues with NTB memory windows.

Signed-off-by: Allen Hubbe &lt;Allen.Hubbe@emc.com&gt;
Acked-by: Dave Jiang &lt;dave.jiang@intel.com&gt;
Signed-off-by: Jon Mason &lt;jdmason@kudzu.us&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>NTB: Fix macro parameter conflict with field name</title>
<updated>2016-01-22T00:53:10+00:00</updated>
<author>
<name>Allen Hubbe</name>
<email>Allen.Hubbe@emc.com</email>
</author>
<published>2016-01-21T17:53:50+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=03beaec80d57e7a540b1990188f8a97a076da6de'/>
<id>03beaec80d57e7a540b1990188f8a97a076da6de</id>
<content type='text'>
If the parameter given to the macro is replaced throughout the macro as
it is evaluated.  The intent is that the macro parameter should replace
the only the first parameter to container_of().  However, the way the
macro was written, it would also inadvertantly replace a structure field
name.  If a parameter of any other name is given to the macro, it will
fail to compile, if the structure does not contain a field of the same
name.  At worst, it will compile, and hide improper access of an
unintended field in the structure.

Change the macro parameter name, so it does not conflict with the
structure field name.

Signed-off-by: Allen Hubbe &lt;Allen.Hubbe@emc.com&gt;
Acked-by: Dave Jiang &lt;dave.jiang@intel.com&gt;
Signed-off-by: Jon Mason &lt;jdmason@kudzu.us&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
If the parameter given to the macro is replaced throughout the macro as
it is evaluated.  The intent is that the macro parameter should replace
the only the first parameter to container_of().  However, the way the
macro was written, it would also inadvertantly replace a structure field
name.  If a parameter of any other name is given to the macro, it will
fail to compile, if the structure does not contain a field of the same
name.  At worst, it will compile, and hide improper access of an
unintended field in the structure.

Change the macro parameter name, so it does not conflict with the
structure field name.

Signed-off-by: Allen Hubbe &lt;Allen.Hubbe@emc.com&gt;
Acked-by: Dave Jiang &lt;dave.jiang@intel.com&gt;
Signed-off-by: Jon Mason &lt;jdmason@kudzu.us&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>NTB: Clear property bits in BAR value</title>
<updated>2016-01-11T14:51:17+00:00</updated>
<author>
<name>Dave Jiang</name>
<email>dave.jiang@intel.com</email>
</author>
<published>2015-11-19T21:00:54+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=703872c2c53b57ac14563e64c2df086ef57690f9'/>
<id>703872c2c53b57ac14563e64c2df086ef57690f9</id>
<content type='text'>
The lower bits read from a BAR register will contain property bits
that we do not care about. Clear those so that we can use the BAR
values for limit and xlat registers.

Reported-by: Conrad Meyer &lt;cem@freebsd.org&gt;
Signed-off-by: Dave Jiang &lt;dave.jiang@intel.com&gt;
Signed-off-by: Jon Mason &lt;jdmason@kudzu.us&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The lower bits read from a BAR register will contain property bits
that we do not care about. Clear those so that we can use the BAR
values for limit and xlat registers.

Reported-by: Conrad Meyer &lt;cem@freebsd.org&gt;
Signed-off-by: Dave Jiang &lt;dave.jiang@intel.com&gt;
Signed-off-by: Jon Mason &lt;jdmason@kudzu.us&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>NTB: unify translation addresses</title>
<updated>2015-11-08T21:11:21+00:00</updated>
<author>
<name>Dave Jiang</name>
<email>dave.jiang@intel.com</email>
</author>
<published>2015-09-24T20:03:05+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=8b782fab4da771c97a198f6cb496d124dace36fd'/>
<id>8b782fab4da771c97a198f6cb496d124dace36fd</id>
<content type='text'>
There is no need for the upstream and downstream addresses to be different
for the NTB configs. Go to using a single set of address. It is still
possible to configure them differently using module parameter override
however.

Signed-off-by: Dave Jiang &lt;dave.jiang@intel.com&gt;
Acked and Tested-by: Allen Hubbe &lt;Allen.Hubbe@emc.com&gt;
Signed-off-by: Jon Mason &lt;jdmason@kudzu.us&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
There is no need for the upstream and downstream addresses to be different
for the NTB configs. Go to using a single set of address. It is still
possible to configure them differently using module parameter override
however.

Signed-off-by: Dave Jiang &lt;dave.jiang@intel.com&gt;
Acked and Tested-by: Allen Hubbe &lt;Allen.Hubbe@emc.com&gt;
Signed-off-by: Jon Mason &lt;jdmason@kudzu.us&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>NTB: Fix range check on memory window index</title>
<updated>2015-09-07T19:27:12+00:00</updated>
<author>
<name>Allen Hubbe</name>
<email>Allen.Hubbe@emc.com</email>
</author>
<published>2015-08-31T13:31:00+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=9a07826f99034202dad589285a47132685d9538b'/>
<id>9a07826f99034202dad589285a47132685d9538b</id>
<content type='text'>
The range check must exclude the upper bound.

Signed-off-by: Allen Hubbe &lt;Allen.Hubbe@emc.com&gt;
Signed-off-by: Jon Mason &lt;jdmason@kudzu.us&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The range check must exclude the upper bound.

Signed-off-by: Allen Hubbe &lt;Allen.Hubbe@emc.com&gt;
Signed-off-by: Jon Mason &lt;jdmason@kudzu.us&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>NTB: Improve index handling in B2B MW workaround</title>
<updated>2015-09-07T19:27:12+00:00</updated>
<author>
<name>Allen Hubbe</name>
<email>Allen.Hubbe@emc.com</email>
</author>
<published>2015-08-31T13:30:59+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=2aa2a77a489deda473c99a4c15074d092718912c'/>
<id>2aa2a77a489deda473c99a4c15074d092718912c</id>
<content type='text'>
Check that b2b_mw_idx is in range of the number of memory windows when
initializing the device.  The workaround is considered to be in effect
only if the device b2b_idx is exactly UINT_MAX, instead of any index
past the last memory window.

Only print B2B MW workaround information in debugfs if the workaround is
in effect.

Signed-off-by: Allen Hubbe &lt;Allen.Hubbe@emc.com&gt;
Signed-off-by: Jon Mason &lt;jdmason@kudzu.us&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Check that b2b_mw_idx is in range of the number of memory windows when
initializing the device.  The workaround is considered to be in effect
only if the device b2b_idx is exactly UINT_MAX, instead of any index
past the last memory window.

Only print B2B MW workaround information in debugfs if the workaround is
in effect.

Signed-off-by: Allen Hubbe &lt;Allen.Hubbe@emc.com&gt;
Signed-off-by: Jon Mason &lt;jdmason@kudzu.us&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>NTB: Add PCI Device IDs for Broadwell Xeon</title>
<updated>2015-09-07T19:17:08+00:00</updated>
<author>
<name>Dave Jiang</name>
<email>dave.jiang@intel.com</email>
</author>
<published>2015-07-13T12:07:18+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=0a5d19d9f046d770776508fdde959d2a42bce9f7'/>
<id>0a5d19d9f046d770776508fdde959d2a42bce9f7</id>
<content type='text'>
Adding PCI Device IDs for B2B (back to back), RP (root port, primary),
and TB (transparent bridge, secondary) devices.

Signed-off-by: Dave Jiang &lt;dave.jiang@intel.com&gt;
Signed-off-by: Jon Mason &lt;jdmason@kudzu.us&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Adding PCI Device IDs for B2B (back to back), RP (root port, primary),
and TB (transparent bridge, secondary) devices.

Signed-off-by: Dave Jiang &lt;dave.jiang@intel.com&gt;
Signed-off-by: Jon Mason &lt;jdmason@kudzu.us&gt;
</pre>
</div>
</content>
</entry>
</feed>
