linux.git/drivers/net/dsa, branch v5.4-rc2

net: dsa: sja1105: Fix sleeping while atomic in .port_hwtstamp_set

2019-10-02T16:19:53+00:00

Currently this stack trace can be seen with CONFIG_DEBUG_ATOMIC_SLEEP=y:

[   41.568348] BUG: sleeping function called from invalid context at kernel/locking/mutex.c:909
[   41.576757] in_atomic(): 1, irqs_disabled(): 0, pid: 208, name: ptp4l
[   41.583212] INFO: lockdep is turned off.
[   41.587123] CPU: 1 PID: 208 Comm: ptp4l Not tainted 5.3.0-rc6-01445-ge950f2d4bc7f-dirty #1827
[   41.599873] [] (unwind_backtrace) from [] (show_stack+0x10/0x14)
[   41.607584] [] (show_stack) from [] (dump_stack+0xd4/0x100)
[   41.614863] [] (dump_stack) from [] (___might_sleep+0x1c8/0x2b4)
[   41.622574] [] (___might_sleep) from [] (__mutex_lock+0x48/0xab8)
[   41.630368] [] (__mutex_lock) from [] (mutex_lock_nested+0x1c/0x24)
[   41.638340] [] (mutex_lock_nested) from [] (sja1105_static_config_reload+0x30/0x27c)
[   41.647779] [] (sja1105_static_config_reload) from [] (sja1105_hwtstamp_set+0x108/0x1cc)
[   41.657562] [] (sja1105_hwtstamp_set) from [] (dev_ifsioc+0x18c/0x330)
[   41.665788] [] (dev_ifsioc) from [] (dev_ioctl+0x320/0x6e8)
[   41.673064] [] (dev_ioctl) from [] (sock_ioctl+0x334/0x5e8)
[   41.680340] [] (sock_ioctl) from [] (do_vfs_ioctl+0xb0/0xa10)
[   41.687789] [] (do_vfs_ioctl) from [] (ksys_ioctl+0x34/0x58)
[   41.695151] [] (ksys_ioctl) from [] (ret_fast_syscall+0x0/0x28)
[   41.702768] Exception stack(0xe8495fa8 to 0xe8495ff0)
[   41.707796] 5fa0:                   beff4a8c 00000001 00000011 000089b0 beff4a8c beff4a80
[   41.715933] 5fc0: beff4a8c 00000001 0000000c 00000036 b6fa98c8 004e19c1 00000001 00000000
[   41.724069] 5fe0: 004dcedc beff4a6c 004c0738 b6e7af4c
[   41.729860] BUG: scheduling while atomic: ptp4l/208/0x00000002
[   41.735682] INFO: lockdep is turned off.

Enabling RX timestamping will logically disturb the fastpath (processing
of meta frames). Replace bool hwts_rx_en with a bit that is checked
atomically from the fastpath and temporarily unset from the sleepable
context during a change of the RX timestamping process (a destructive
operation anyways, requires switch reset).
If found unset, the fastpath (net/dsa/tag_sja1105.c) will just drop any
received meta frame and not take the meta_lock at all.

Fixes: a602afd200f5 ("net: dsa: sja1105: Expose PTP timestamping ioctls to userspace")
Signed-off-by: Vladimir Oltean 
Signed-off-by: David S. Miller

net: dsa: sja1105: Initialize the meta_lock

2019-10-02T16:19:53+00:00

Otherwise, with CONFIG_DEBUG_SPINLOCK=y, this stack trace gets printed
when enabling RX timestamping and receiving a PTP frame:

[  318.537078] INFO: trying to register non-static key.
[  318.542040] the code is fine but needs lockdep annotation.
[  318.547500] turning off the locking correctness validator.
[  318.552972] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 5.3.0-13257-g0825b0669811-dirty #1962
[  318.561283] Hardware name: Freescale LS1021A
[  318.565566] [] (unwind_backtrace) from [] (show_stack+0x10/0x14)
[  318.573289] [] (show_stack) from [] (dump_stack+0xd4/0x100)
[  318.580579] [] (dump_stack) from [] (register_lock_class+0x728/0x734)
[  318.588731] [] (register_lock_class) from [] (__lock_acquire+0x78/0x25cc)
[  318.597227] [] (__lock_acquire) from [] (lock_acquire+0xd8/0x234)
[  318.605033] [] (lock_acquire) from [] (_raw_spin_lock+0x44/0x54)
[  318.612755] [] (_raw_spin_lock) from [] (sja1105_rcv+0x1f8/0x4e8)
[  318.620561] [] (sja1105_rcv) from [] (dsa_switch_rcv+0x80/0x204)
[  318.628283] [] (dsa_switch_rcv) from [] (__netif_receive_skb_one_core+0x50/0x6c)
[  318.637386] [] (__netif_receive_skb_one_core) from [] (netif_receive_skb_internal+0xac/0x264)
[  318.647611] [] (netif_receive_skb_internal) from [] (napi_gro_receive+0x1d8/0x338)
[  318.656887] [] (napi_gro_receive) from [] (gfar_clean_rx_ring+0x328/0x724)
[  318.665472] [] (gfar_clean_rx_ring) from [] (gfar_poll_rx_sq+0x34/0x94)
[  318.673795] [] (gfar_poll_rx_sq) from [] (net_rx_action+0x128/0x4f8)
[  318.681860] [] (net_rx_action) from [] (__do_softirq+0x148/0x5ac)
[  318.689666] [] (__do_softirq) from [] (irq_exit+0x160/0x170)
[  318.697040] [] (irq_exit) from [] (__handle_domain_irq+0x60/0xb4)
[  318.704847] [] (__handle_domain_irq) from [] (gic_handle_irq+0x58/0x9c)
[  318.713172] [] (gic_handle_irq) from [] (__irq_svc+0x70/0x98)
[  318.720622] Exception stack(0xc2001f18 to 0xc2001f60)
[  318.725656] 1f00:                                                       00000001 00000006
[  318.733805] 1f20: 00000000 c20165c0 ffffe000 c2010cac c2010cf4 00000001 00000000 c2010c88
[  318.741955] 1f40: c1f7a5a8 00000000 00000000 c2001f68 c03ba140 c030a288 200e0013 ffffffff
[  318.750110] [] (__irq_svc) from [] (arch_cpu_idle+0x24/0x3c)
[  318.757486] [] (arch_cpu_idle) from [] (do_idle+0x1b8/0x2a4)
[  318.764859] [] (do_idle) from [] (cpu_startup_entry+0x18/0x1c)
[  318.772407] [] (cpu_startup_entry) from [] (start_kernel+0x4cc/0x4fc)

Fixes: 844d7edc6a34 ("net: dsa: sja1105: Add a global sja1105_tagger_data structure")
Signed-off-by: Vladimir Oltean 
Signed-off-by: David S. Miller

net: dsa: rtl8366: Check VLAN ID and not ports

2019-10-02T16:09:23+00:00

There has been some confusion between the port number and
the VLAN ID in this driver. What we need to check for
validity is the VLAN ID, nothing else.

The current confusion came from assigning a few default
VLANs for default routing and we need to rewrite that
properly.

Instead of checking if the port number is a valid VLAN
ID, check the actual VLAN IDs passed in to the callback
one by one as expected.

Fixes: d8652956cf37 ("net: dsa: realtek-smi: Add Realtek SMI driver")
Signed-off-by: Linus Walleij 
Signed-off-by: David S. Miller

net: dsa: rtl8366rb: add missing of_node_put after calling of_get_child_by_name

2019-10-01T17:02:56+00:00

of_node_put needs to be called when the device node which is got
from of_get_child_by_name finished using.
irq_domain_add_linear() also calls of_node_get() to increase refcount,
so irq_domain will not be affected when it is released.

Fixes: d8652956cf37 ("net: dsa: realtek-smi: Add Realtek SMI driver")
Signed-off-by: Wen Yang 
Cc: Linus Walleij 
Cc: Andrew Lunn 
Cc: Vivien Didelot 
Cc: Florian Fainelli 
Cc: "David S. Miller" 
Cc: netdev@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Reviewed-by: Linus Walleij 
Signed-off-by: David S. Miller

net: dsa: sja1105: Prevent leaking memory

2019-10-01T00:24:43+00:00

In sja1105_static_config_upload, in two cases memory is leaked: when
static_config_buf_prepare_for_upload fails and when sja1105_inhibit_tx
fails. In both cases config_buf should be released.

Fixes: 8aa9ebccae87 ("net: dsa: Introduce driver for NXP SJA1105 5-port L2 switch")
Fixes: 1a4c69406cc1 ("net: dsa: sja1105: Prevent PHY jabbering during switch reset")
Signed-off-by: Navid Emamdoost 
Signed-off-by: Vladimir Oltean 
Signed-off-by: David S. Miller

net: dsa: sja1105: Ensure PTP time for rxtstamp reconstruction is not in the past

2019-10-01T00:20:50+00:00

Sometimes the PTP synchronization on the switch 'jumps':

  ptp4l[11241.155]: rms    8 max   16 freq -21732 +/-  11 delay   742 +/-   0
  ptp4l[11243.157]: rms    7 max   17 freq -21731 +/-  10 delay   744 +/-   0
  ptp4l[11245.160]: rms 33592410 max 134217731 freq +192422 +/- 8530253 delay   743 +/-   0
  ptp4l[11247.163]: rms 811631 max 964131 freq +10326 +/- 557785 delay   743 +/-   0
  ptp4l[11249.166]: rms 261936 max 533876 freq -304323 +/- 126371 delay   744 +/-   0
  ptp4l[11251.169]: rms 48700 max 57740 freq -20218 +/- 30532 delay   744 +/-   0
  ptp4l[11253.171]: rms 14570 max 30163 freq  -5568 +/- 7563 delay   742 +/-   0
  ptp4l[11255.174]: rms 2914 max 3440 freq -22001 +/- 1667 delay   744 +/-   1
  ptp4l[11257.177]: rms  811 max 1710 freq -22653 +/- 451 delay   744 +/-   1
  ptp4l[11259.180]: rms  177 max  218 freq -21695 +/-  89 delay   741 +/-   0
  ptp4l[11261.182]: rms   45 max   92 freq -21677 +/-  32 delay   742 +/-   0
  ptp4l[11263.186]: rms   14 max   32 freq -21733 +/-  11 delay   742 +/-   0
  ptp4l[11265.188]: rms    9 max   14 freq -21725 +/-  12 delay   742 +/-   0
  ptp4l[11267.191]: rms    9 max   16 freq -21727 +/-  13 delay   742 +/-   0
  ptp4l[11269.194]: rms    6 max   15 freq -21726 +/-   9 delay   743 +/-   0
  ptp4l[11271.197]: rms    8 max   15 freq -21728 +/-  11 delay   743 +/-   0
  ptp4l[11273.200]: rms    6 max   12 freq -21727 +/-   8 delay   743 +/-   0
  ptp4l[11275.202]: rms    9 max   17 freq -21720 +/-  11 delay   742 +/-   0
  ptp4l[11277.205]: rms    9 max   18 freq -21725 +/-  12 delay   742 +/-   0

Background: the switch only offers partial RX timestamps (24 bits) and
it is up to the driver to read the PTP clock to fill those timestamps up
to 64 bits. But the PTP clock readout needs to happen quickly enough (in
0.135 seconds, in fact), otherwise the PTP clock will wrap around 24
bits, condition which cannot be detected.

Looking at the 'max 134217731' value on output line 3, one can see that
in hex it is 0x8000003. Because the PTP clock resolution is 8 ns,
that means 0x1000000 in ticks, which is exactly 2^24. So indeed this is
a PTP clock wraparound, but the reason might be surprising.

What is going on is that sja1105_tstamp_reconstruct(priv, now, ts)
expects a "now" time that is later than the "ts" was snapshotted at.
This, of course, is obvious: we read the PTP time _after_ the partial RX
timestamp was received. However, the workqueue is processing frames from
a skb queue and reuses the same PTP time, read once at the beginning.
Normally the skb queue only contains one frame and all goes well. But
when the skb queue contains two frames, the second frame that gets
dequeued might have been partially timestamped by the RX MAC _after_ we
had read our PTP time initially.

The code was originally like that due to concerns that SPI access for
PTP time readout is a slow process, and we are time-constrained anyway
(aka: premature optimization). But some timing analysis reveals that the
time spent until the RX timestamp is completely reconstructed is 1 order
of magnitude lower than the 0.135 s deadline even under worst-case
conditions. So we can afford to read the PTP time for each frame in the
RX timestamping queue, which of course ensures that the full PTP time is
in the partial timestamp's future.

Fixes: f3097be21bf1 ("net: dsa: sja1105: Add a state machine for RX timestamping")
Signed-off-by: Vladimir Oltean 
Signed-off-by: David S. Miller

net: dsa: qca8k: Use up to 7 ports for all operations

2019-09-30T18:06:38+00:00

The QCA8K family supports up to 7 ports. So use the existing
QCA8K_NUM_PORTS define to allocate the switch structure and limit all
operations with the switch ports.

This was not an issue until commit 0394a63acfe2 ("net: dsa: enable and
disable all ports") disabled all unused ports. Since the unused ports 7-11
are outside of the correct register range on this switch some registers
were rewritten with invalid content.

Fixes: 6b93fb46480a ("net-next: dsa: add new driver for qca8xxx family")
Fixes: a0c02161ecfc ("net: dsa: variable number of ports")
Fixes: 0394a63acfe2 ("net: dsa: enable and disable all ports")
Signed-off-by: Michal Vokáč 
Reviewed-by: Andrew Lunn 
Signed-off-by: David S. Miller

net: dsa: microchip: Always set regmap stride to 1

2019-09-27T18:21:07+00:00

The regmap stride is set to 1 for regmap describing 8bit registers already.
However, for 16/32/64bit registers, the stride is 2/4/8 respectively. This
is not correct, as the switch protocol supports unaligned register reads
and writes and the KSZ87xx even uses such unaligned register accesses to
read e.g. MIB counter.

This patch fixes MIB counter access on KSZ87xx.

Signed-off-by: Marek Vasut 
Cc: Andrew Lunn 
Cc: David S. Miller 
Cc: Florian Fainelli 
Cc: George McCollister 
Cc: Tristram Ha 
Cc: Vivien Didelot 
Cc: Woojung Huh 
Fixes: 46558d601cb6 ("net: dsa: microchip: Initial SPI regmap support")
Fixes: 255b59ad0db2 ("net: dsa: microchip: Factor out regmap config generation into common header")
Reviewed-by: George McCollister 
Tested-by: George McCollister 
Signed-off-by: David S. Miller

net: dsa: qca8k: Fix port enable for CPU port

2019-09-27T08:30:58+00:00

The CPU port does not have a PHY connected to it. So calling
phy_support_asym_pause() results in an Opps. As with other DSA
drivers, add a guard that the port is a user port.

Reported-by: Michal Vokáč 
Fixes: 0394a63acfe2 ("net: dsa: enable and disable all ports")
Signed-off-by: Andrew Lunn 
Tested-by: Michal Vokáč 
Signed-off-by: David S. Miller

net: dsa: Use the correct style for SPDX License Identifier

2019-09-22T22:25:08+00:00

This patch corrects the SPDX License Identifier style
in header file for Distributed Switch Architecture drivers.
For C header files Documentation/process/license-rules.rst
mandates C-like comments (opposed to C source files where
C++ style should be used)

Changes made by using a script provided by Joe Perches here:
https://lkml.org/lkml/2019/2/7/46.

Suggested-by: Joe Perches 
Signed-off-by: Nishad Kamdar 
Reviewed-by: Vivien Didelot 
Reviewed-by: Florian Fainelli 
Signed-off-by: Jakub Kicinski