linux.git/drivers/net/dsa/microchip, branch v6.0-rc2

net: dsa: microchip: ksz9477: fix fdb_dump last invalid entry

2022-08-17T19:09:01+00:00

In the ksz9477_fdb_dump function it reads the ALU control register and
exit from the timeout loop if there is valid entry or search is
complete. After exiting the loop, it reads the alu entry and report to
the user space irrespective of entry is valid. It works till the valid
entry. If the loop exited when search is complete, it reads the alu
table. The table returns all ones and it is reported to user space. So
bridge fdb show gives ff:ff:ff:ff:ff:ff as last entry for every port.
To fix it, after exiting the loop the entry is reported only if it is
valid one.

Fixes: b987e98e50ab ("dsa: add DSA switch driver for Microchip KSZ9477")
Signed-off-by: Arun Ramadoss 
Reviewed-by: Vladimir Oltean 
Link: https://lore.kernel.org/r/20220816105516.18350-1-arun.ramadoss@microchip.com
Signed-off-by: Jakub Kicinski

net: dsa: microchip: add support for phylink mac config

2022-07-27T08:39:17+00:00

This patch add support for phylink mac config for ksz series of
switches. All the files ksz8795, ksz9477 and lan937x uses the ksz common
xmii function. Instead of calling from the individual files, it is moved
to the ksz common phylink mac config function.

Signed-off-by: Arun Ramadoss 
Signed-off-by: David S. Miller

net: dsa: microchip: ksz8795: use common xmii function

2022-07-27T08:39:17+00:00

This patch updates the ksz8795 cpu configuration to use the ksz common
xmii set functions.

Signed-off-by: Arun Ramadoss 
Signed-off-by: David S. Miller

net: dsa: microchip: ksz9477: use common xmii function

2022-07-27T08:39:17+00:00

In ksz9477.c file, configuring the xmii register is performed based on
the flag NEW_XMII. The flag is reset for ksz9893 switch and set for
other switch. This patch uses the ksz common xmii set and get function.
The bit values are configured based on the chip id.

Signed-off-by: Arun Ramadoss 
Signed-off-by: David S. Miller

net: dsa: microchip: apply rgmii tx and rx delay in phylink mac config

2022-07-27T08:39:17+00:00

This patch read the rgmii tx and rx delay from device tree and stored it
in the ksz_port.  It applies the rgmii delay to the xmii tune adjust
register based on the interface selected in phylink mac config. There
are two rgmii port in LAN937x and value to be loaded in the register
vary depends on the port selected.

Signed-off-by: Arun Ramadoss 
Signed-off-by: David S. Miller

net: dsa: microchip: lan937x: add support for configuing xMII register

2022-07-27T08:39:17+00:00

This patch add the common ksz_set_xmii function for ksz series switch
and update the lan937x code phylink mac config. The register address for
the ksz8795 is Port 5 Interface control 6 and for all other switch is
xMII Control 1.
The bit value for selecting the interface is same for
KSZ8795 and KSZ9893 are same. The bit values for KSZ9477 and lan973x are
same. So, this patch add the bit value for each switches in
ksz_chip_data and configure the registers based on the chip id.

Signed-off-by: Arun Ramadoss 
Signed-off-by: David S. Miller

net: dsa: microchip: add support for common phylink mac link up

2022-07-27T08:39:17+00:00

This patch add the support for common phylink mac link up for the ksz
series switch. The register address, bit position and values are
configured based on the chip id to the dev->info structure.

Signed-off-by: Arun Ramadoss 
Signed-off-by: David S. Miller

net: dsa: microchip: add common duplex and flow control function

2022-07-27T08:39:17+00:00

This patch add common function for configuring the Full/Half duplex and
transmit/receive flow control. KSZ8795 uses the Global control register
4 for configuring the duplex and flow control, whereas all other KSZ9477
based switch uses the xMII Control 0 register.

Signed-off-by: Arun Ramadoss 
Signed-off-by: David S. Miller

net: dsa: microchip: add common ksz port xmii speed selection function

2022-07-27T08:39:17+00:00

This patch adds the function for configuring the 100/10Mbps speed
selection for the ksz switches. KSZ8795 switch uses Global control 4
register 0x06 bit 4 for choosing 100/10Mpbs. Other switches uses xMII
control 1 0xN300 for it.
For KSZ8795, if the bit is set then 10Mbps is chosen and if bit is
clear then 100Mbps chosen. For all other switches it is other way
around, if the bit is set then 100Mbps is chosen.
So, this patch add the generic function for ksz switch to select the
100/10Mbps speed selection. While configuring, first it disables the
gigabit functionality and then configure the respective speed.

Signed-off-by: Arun Ramadoss 
Signed-off-by: David S. Miller

net: dsa: microchip: add common gigabit set and get function

2022-07-27T08:39:16+00:00

This patch add helper function for setting and getting the gigabit
enable for the ksz series switch. KSZ8795 switch has different register
address compared to all other ksz switches. KSZ8795 series uses the Port
5 Interface control 6 Bit 6 for configuring the 1Gbps or 100/10Mbps
speed selection. All other switches uses the xMII control 1 0xN301
register Bit6 for gigabit.
Further, for KSZ8795 & KSZ9893 switches if bit 1 then 1Gbps is chosen
and if bit 0 then 100/10Mbps is chosen. It is other way around for
other switches bit 0 is for 1Gbps. So, this patch implements the common
function for configuring the gigabit set and get capability.

Signed-off-by: Arun Ramadoss 
Reviewed-by: Vladimir Oltean 
Signed-off-by: David S. Miller