<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux.git/drivers/mtd, branch v6.16-rc2</title>
<subtitle>Linux kernel source tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/'/>
<entry>
<title>treewide, timers: Rename from_timer() to timer_container_of()</title>
<updated>2025-06-08T07:07:37+00:00</updated>
<author>
<name>Ingo Molnar</name>
<email>mingo@kernel.org</email>
</author>
<published>2025-05-09T05:51:14+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=41cb08555c4164996d67c78b3bf1c658075b75f1'/>
<id>41cb08555c4164996d67c78b3bf1c658075b75f1</id>
<content type='text'>
Move this API to the canonical timer_*() namespace.

[ tglx: Redone against pre rc1 ]

Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Link: https://lore.kernel.org/all/aB2X0jCKQO56WdMt@gmail.com

</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Move this API to the canonical timer_*() namespace.

[ tglx: Redone against pre rc1 ]

Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Link: https://lore.kernel.org/all/aB2X0jCKQO56WdMt@gmail.com

</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'mtd/for-6.16' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux</title>
<updated>2025-06-02T18:08:17+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2025-06-02T18:08:17+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=4c3b7df78443403bff2532299f21eb4cbdf059e2'/>
<id>4c3b7df78443403bff2532299f21eb4cbdf059e2</id>
<content type='text'>
Pull MTD updates from Miquel Raynal:
 "A big core MTD change is the introduction of a new class to always
  register a master device. This is a problem that has been there
  forever: the "master" device was not always present depending on a
  number of heuristics such as the presence of fixed partitions and the
  absence of a Kconfig symbol to force its presence. This was a problem
  for runtime PM operations which might not have the "master" device
  available in all situation.

  The SPI NAND subsystem has seen the introduction of DTR operations
  (the equivalent of DDR transfers), which involved quite a few
  preparation patches for clarifying macro names.

  In the raw NAND subsystem, the brcmnand driver has been "fixed" for
  old legacy SoCs with an update of the -&gt;exec_op() hook, there has been
  the introduction of a new controller driver named Loongson-1, and the
  Qualcomm driver has received quite a few misc fixes as well as a new
  compatible.

  Finally, Macornix SPI NOR entries have been cleaned-up and some SFDP
  table fixups for Macronix MX25L3255E have been merged.

  Aside from this, there is the usual load of misc improvement, fixes,
  and yaml conversion"

* tag 'mtd/for-6.16' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux: (42 commits)
  mtd: rawnand: brcmnand: legacy exec_op implementation
  mtd: rawnand: sunxi: Add randomizer configuration in sunxi_nfc_hw_ecc_write_chunk
  mtd: nand: brcmnand: fix NAND timeout when accessing eMMC
  mtd: nand: sunxi: Add randomizer configuration before randomizer enable
  mtd: spinand: esmt: fix id code for F50D1G41LB
  mtd: rawnand: brcmnand: remove unused parameters
  mtd: core: always create master device
  mtd: rawnand: loongson1: Fix inconsistent refcounting in ls1x_nand_chip_init()
  mtd: rawnand: loongson1: Fix error code in ls1x_nand_dma_transfer()
  mtd: rawnand: qcom: Fix read len for onfi param page
  mtd: rawnand: qcom: Fix last codeword read in qcom_param_page_type_exec()
  mtd: rawnand: qcom: Pass 18 bit offset from NANDc base to BAM base
  dt-bindings: mtd: qcom,nandc: Document the SDX75 NAND controller
  mtd: bcm47xxnflash: Add error handling for bcm47xxnflash_ops_bcm4706_ctl_cmd()
  mtd: rawnand: Use non-hybrid PCI devres API
  mtd: nand: ecc-mxic: Fix use of uninitialized variable ret
  mtd: spinand: winbond: Add support for W35N02JW and W35N04JW chips
  mtd: spinand: winbond: Add octal support
  mtd: spinand: winbond: Add support for W35N01JW in single mode
  mtd: spinand: winbond: Rename DTR variants
  ...
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pull MTD updates from Miquel Raynal:
 "A big core MTD change is the introduction of a new class to always
  register a master device. This is a problem that has been there
  forever: the "master" device was not always present depending on a
  number of heuristics such as the presence of fixed partitions and the
  absence of a Kconfig symbol to force its presence. This was a problem
  for runtime PM operations which might not have the "master" device
  available in all situation.

  The SPI NAND subsystem has seen the introduction of DTR operations
  (the equivalent of DDR transfers), which involved quite a few
  preparation patches for clarifying macro names.

  In the raw NAND subsystem, the brcmnand driver has been "fixed" for
  old legacy SoCs with an update of the -&gt;exec_op() hook, there has been
  the introduction of a new controller driver named Loongson-1, and the
  Qualcomm driver has received quite a few misc fixes as well as a new
  compatible.

  Finally, Macornix SPI NOR entries have been cleaned-up and some SFDP
  table fixups for Macronix MX25L3255E have been merged.

  Aside from this, there is the usual load of misc improvement, fixes,
  and yaml conversion"

* tag 'mtd/for-6.16' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux: (42 commits)
  mtd: rawnand: brcmnand: legacy exec_op implementation
  mtd: rawnand: sunxi: Add randomizer configuration in sunxi_nfc_hw_ecc_write_chunk
  mtd: nand: brcmnand: fix NAND timeout when accessing eMMC
  mtd: nand: sunxi: Add randomizer configuration before randomizer enable
  mtd: spinand: esmt: fix id code for F50D1G41LB
  mtd: rawnand: brcmnand: remove unused parameters
  mtd: core: always create master device
  mtd: rawnand: loongson1: Fix inconsistent refcounting in ls1x_nand_chip_init()
  mtd: rawnand: loongson1: Fix error code in ls1x_nand_dma_transfer()
  mtd: rawnand: qcom: Fix read len for onfi param page
  mtd: rawnand: qcom: Fix last codeword read in qcom_param_page_type_exec()
  mtd: rawnand: qcom: Pass 18 bit offset from NANDc base to BAM base
  dt-bindings: mtd: qcom,nandc: Document the SDX75 NAND controller
  mtd: bcm47xxnflash: Add error handling for bcm47xxnflash_ops_bcm4706_ctl_cmd()
  mtd: rawnand: Use non-hybrid PCI devres API
  mtd: nand: ecc-mxic: Fix use of uninitialized variable ret
  mtd: spinand: winbond: Add support for W35N02JW and W35N04JW chips
  mtd: spinand: winbond: Add octal support
  mtd: spinand: winbond: Add support for W35N01JW in single mode
  mtd: spinand: winbond: Rename DTR variants
  ...
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'nand/for-6.16' into mtd/next</title>
<updated>2025-06-02T16:39:50+00:00</updated>
<author>
<name>Miquel Raynal</name>
<email>miquel.raynal@bootlin.com</email>
</author>
<published>2025-06-02T16:39:50+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=aa702923258f2ce5e259b9cb8e746090bb6bf126'/>
<id>aa702923258f2ce5e259b9cb8e746090bb6bf126</id>
<content type='text'>
The SPI NAND subsystem has seen the introduction of DTR operations (the
equivalent of DDR transfers), which involved quite a few preparation
patches for clarifying macro names.

In the raw NAND subsystem, the brcmnand driver has been "fixed" for old
legacy SoCs with an update of the -&gt;exec_op() hook, there has been the
introduction of a new controller driver named Loongson-1, and the
Qualcomm driver has received quite a few misc fixes as well as a new
compatible.

Aside from this, there is the usual load of misc improvement and fixes.
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The SPI NAND subsystem has seen the introduction of DTR operations (the
equivalent of DDR transfers), which involved quite a few preparation
patches for clarifying macro names.

In the raw NAND subsystem, the brcmnand driver has been "fixed" for old
legacy SoCs with an update of the -&gt;exec_op() hook, there has been the
introduction of a new controller driver named Loongson-1, and the
Qualcomm driver has received quite a few misc fixes as well as a new
compatible.

Aside from this, there is the usual load of misc improvement and fixes.
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'spi-nor/for-6.16' into mtd/next</title>
<updated>2025-06-02T16:39:35+00:00</updated>
<author>
<name>Miquel Raynal</name>
<email>miquel.raynal@bootlin.com</email>
</author>
<published>2025-06-02T16:39:35+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=73c4699a35e61a1fff315a25f4299c0b4074944a'/>
<id>73c4699a35e61a1fff315a25f4299c0b4074944a</id>
<content type='text'>
SPI NOR changes for 6.16

Notable changes:

- Cleanup some Macronix flash entries.

- Add SFDP table fixups for Macronix MX25L3255E.
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
SPI NOR changes for 6.16

Notable changes:

- Cleanup some Macronix flash entries.

- Add SFDP table fixups for Macronix MX25L3255E.
</pre>
</div>
</content>
</entry>
<entry>
<title>mtd: rawnand: brcmnand: legacy exec_op implementation</title>
<updated>2025-05-26T09:32:33+00:00</updated>
<author>
<name>Álvaro Fernández Rojas</name>
<email>noltari@gmail.com</email>
</author>
<published>2025-05-21T08:03:25+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=3bfb22cecfe6b6f0d8ee56ef4b533cf68599c5d9'/>
<id>3bfb22cecfe6b6f0d8ee56ef4b533cf68599c5d9</id>
<content type='text'>
Commit 3c8260ce7663 ("mtd: rawnand: brcmnand: exec_op implementation")
removed legacy interface functions, breaking &lt; v5.0 controllers support.
In order to fix older controllers we need to add an alternative exec_op
implementation which doesn't rely on low level registers.

Fixes: 3c8260ce7663 ("mtd: rawnand: brcmnand: exec_op implementation")
Signed-off-by: Álvaro Fernández Rojas &lt;noltari@gmail.com&gt;
Reviewed-by: David Regan &lt;dregan@broadcom.com&gt;
Reviewed-by: Florian Fainelli &lt;florian.fainelli@broadcom.com&gt;
Reviewed-by: William Zhang &lt;william.zhang@broadcom.com&gt;
Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Commit 3c8260ce7663 ("mtd: rawnand: brcmnand: exec_op implementation")
removed legacy interface functions, breaking &lt; v5.0 controllers support.
In order to fix older controllers we need to add an alternative exec_op
implementation which doesn't rely on low level registers.

Fixes: 3c8260ce7663 ("mtd: rawnand: brcmnand: exec_op implementation")
Signed-off-by: Álvaro Fernández Rojas &lt;noltari@gmail.com&gt;
Reviewed-by: David Regan &lt;dregan@broadcom.com&gt;
Reviewed-by: Florian Fainelli &lt;florian.fainelli@broadcom.com&gt;
Reviewed-by: William Zhang &lt;william.zhang@broadcom.com&gt;
Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>mtd: rawnand: sunxi: Add randomizer configuration in sunxi_nfc_hw_ecc_write_chunk</title>
<updated>2025-05-26T09:30:46+00:00</updated>
<author>
<name>Wentao Liang</name>
<email>vulab@iscas.ac.cn</email>
</author>
<published>2025-05-26T03:43:44+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=44ed1f5ff73e9e115b6f5411744d5a22ea1c855b'/>
<id>44ed1f5ff73e9e115b6f5411744d5a22ea1c855b</id>
<content type='text'>
The function sunxi_nfc_hw_ecc_write_chunk() calls the
sunxi_nfc_hw_ecc_write_chunk(), but does not call the configuration
function sunxi_nfc_randomizer_config(). Consequently, the randomization
might not conduct correctly, which will affect the lifespan of NAND flash.
A proper implementation can be found in sunxi_nfc_hw_ecc_write_page_dma().

Add the sunxi_nfc_randomizer_config() to config randomizer.

Fixes: 4be4e03efc7f ("mtd: nand: sunxi: add randomizer support")
Cc: stable@vger.kernel.org # v4.6
Signed-off-by: Wentao Liang &lt;vulab@iscas.ac.cn&gt;
Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The function sunxi_nfc_hw_ecc_write_chunk() calls the
sunxi_nfc_hw_ecc_write_chunk(), but does not call the configuration
function sunxi_nfc_randomizer_config(). Consequently, the randomization
might not conduct correctly, which will affect the lifespan of NAND flash.
A proper implementation can be found in sunxi_nfc_hw_ecc_write_page_dma().

Add the sunxi_nfc_randomizer_config() to config randomizer.

Fixes: 4be4e03efc7f ("mtd: nand: sunxi: add randomizer support")
Cc: stable@vger.kernel.org # v4.6
Signed-off-by: Wentao Liang &lt;vulab@iscas.ac.cn&gt;
Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>mtd: nand: brcmnand: fix NAND timeout when accessing eMMC</title>
<updated>2025-05-23T14:48:41+00:00</updated>
<author>
<name>David Regan</name>
<email>dregan@broadcom.com</email>
</author>
<published>2025-05-22T17:25:17+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=528b541b71cf03e263272b051b70696f92258e9d'/>
<id>528b541b71cf03e263272b051b70696f92258e9d</id>
<content type='text'>
When booting a board to NAND and accessing NAND while eMMC
transactions are occurring the NAND will sometimes timeout. This
is due to both NAND and eMMC controller sharing the same data bus
on BCMBCA chips. Fix is to extend NAND timeout to allow eMMC
transactions time to complete.

Signed-off-by: David Regan &lt;dregan@broadcom.com&gt;
Reviewed-by: William Zhang &lt;william.zhang@broadcom.com&gt;
Reviewed-by: Florian Fainelli &lt;florian.fainelli@broadcom.com&gt;
Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
When booting a board to NAND and accessing NAND while eMMC
transactions are occurring the NAND will sometimes timeout. This
is due to both NAND and eMMC controller sharing the same data bus
on BCMBCA chips. Fix is to extend NAND timeout to allow eMMC
transactions time to complete.

Signed-off-by: David Regan &lt;dregan@broadcom.com&gt;
Reviewed-by: William Zhang &lt;william.zhang@broadcom.com&gt;
Reviewed-by: Florian Fainelli &lt;florian.fainelli@broadcom.com&gt;
Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>mtd: nand: sunxi: Add randomizer configuration before randomizer enable</title>
<updated>2025-05-20T15:32:20+00:00</updated>
<author>
<name>Wentao Liang</name>
<email>vulab@iscas.ac.cn</email>
</author>
<published>2025-05-19T15:42:24+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=4a5a99bc79cdc4be63933653682b0261a67a0c9f'/>
<id>4a5a99bc79cdc4be63933653682b0261a67a0c9f</id>
<content type='text'>
In sunxi_nfc_hw_ecc_read_chunk(), the sunxi_nfc_randomizer_enable() is
called without the config of randomizer. A proper implementation can be
found in sunxi_nfc_hw_ecc_read_chunks_dma().

Add sunxi_nfc_randomizer_config() before the start of randomization.

Fixes: 4be4e03efc7f ("mtd: nand: sunxi: add randomizer support")
Cc: stable@vger.kernel.org # v4.6
Signed-off-by: Wentao Liang &lt;vulab@iscas.ac.cn&gt;
Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
In sunxi_nfc_hw_ecc_read_chunk(), the sunxi_nfc_randomizer_enable() is
called without the config of randomizer. A proper implementation can be
found in sunxi_nfc_hw_ecc_read_chunks_dma().

Add sunxi_nfc_randomizer_config() before the start of randomization.

Fixes: 4be4e03efc7f ("mtd: nand: sunxi: add randomizer support")
Cc: stable@vger.kernel.org # v4.6
Signed-off-by: Wentao Liang &lt;vulab@iscas.ac.cn&gt;
Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>mtd: spinand: esmt: fix id code for F50D1G41LB</title>
<updated>2025-05-16T14:53:58+00:00</updated>
<author>
<name>George Moussalem</name>
<email>george.moussalem@outlook.com</email>
</author>
<published>2025-05-15T17:46:05+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=dd26402642a0899fde59ea6b0852fad3d799b4cc'/>
<id>dd26402642a0899fde59ea6b0852fad3d799b4cc</id>
<content type='text'>
Upon detecting the ID for the ESMT F50D1G41LB chip, the fifth byte
returned is always 0x00 instead of the expected JEDEC continuation code
of 0x7f. This causes detection to fail:

[    0.304399] spi-nand spi0.0: unknown raw ID c8117f7f00
[    0.508943] spi-nand: probe of spi0.0 failed with error -524

So let's revert back to the 4 byte ID code for this chip
specifically.

Fixes: 4bd14b2fd8a8 ("mtd: spinand: esmt: Extend IDs to 5 bytes")
Signed-off-by: George Moussalem &lt;george.moussalem@outlook.com&gt;
Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Upon detecting the ID for the ESMT F50D1G41LB chip, the fifth byte
returned is always 0x00 instead of the expected JEDEC continuation code
of 0x7f. This causes detection to fail:

[    0.304399] spi-nand spi0.0: unknown raw ID c8117f7f00
[    0.508943] spi-nand: probe of spi0.0 failed with error -524

So let's revert back to the 4 byte ID code for this chip
specifically.

Fixes: 4bd14b2fd8a8 ("mtd: spinand: esmt: Extend IDs to 5 bytes")
Signed-off-by: George Moussalem &lt;george.moussalem@outlook.com&gt;
Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>mtd: rawnand: brcmnand: remove unused parameters</title>
<updated>2025-05-16T14:53:42+00:00</updated>
<author>
<name>Álvaro Fernández Rojas</name>
<email>noltari@gmail.com</email>
</author>
<published>2025-05-14T06:14:54+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=56fce75470041b5b0d92ae10637416e1a4cceb1b'/>
<id>56fce75470041b5b0d92ae10637416e1a4cceb1b</id>
<content type='text'>
last_cmd and last_byte are now unused brcmnand_host members.
last_addr is only written and never read so we can remove it too.

Signed-off-by: Álvaro Fernández Rojas &lt;noltari@gmail.com&gt;
Reviewed-by: Florian Fainelli &lt;florian.fainelli@broadcom.com&gt;
Reviewed-by: William Zhang &lt;william.zhang@broadcom.com&gt;
Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
last_cmd and last_byte are now unused brcmnand_host members.
last_addr is only written and never read so we can remove it too.

Signed-off-by: Álvaro Fernández Rojas &lt;noltari@gmail.com&gt;
Reviewed-by: Florian Fainelli &lt;florian.fainelli@broadcom.com&gt;
Reviewed-by: William Zhang &lt;william.zhang@broadcom.com&gt;
Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
</pre>
</div>
</content>
</entry>
</feed>
