linux.git/drivers/i2c/busses, branch v6.7

i2c: aspeed: Handle the coalesced stop conditions with the start conditions.

2023-12-19T20:54:57+00:00

Some masters may drive the transfers with low enough latency between
the nak/stop phase of the current command and the start/address phase
of the following command that the interrupts are coalesced by the
time we process them.
Handle the stop conditions before processing SLAVE_MATCH to fix the
complaints that sometimes occur below.

"aspeed-i2c-bus 1e78a040.i2c-bus: irq handled != irq. Expected
0x00000086, but was 0x00000084"

Fixes: f9eb91350bb2 ("i2c: aspeed: added slave support for Aspeed I2C driver")
Signed-off-by: Quan Nguyen 
Reviewed-by: Andrew Jeffery 
Reviewed-by: Andi Shyti 
Signed-off-by: Wolfram Sang

i2c: rk3x: fix potential spinlock recursion on poll

2023-12-19T17:23:01+00:00

Possible deadlock scenario (on reboot):
rk3x_i2c_xfer_common(polling)
    -> rk3x_i2c_wait_xfer_poll()
        -> rk3x_i2c_irq(0, i2c);
            --> spin_lock(&i2c->lock);
            ...
        
        -> rk3x_i2c_irq(0, i2c);
            --> spin_lock(&i2c->lock); (deadlock here)

Store the IRQ number and disable/enable it around the polling transfer.
This patch has been tested on NanoPC-T4.

Signed-off-by: Jensen Huang 
Reviewed-by: Heiko Stuebner 
Reviewed-by: Andi Shyti 
Signed-off-by: Wolfram Sang

i2c: qcom-geni: fix missing clk_disable_unprepare() and geni_se_resources_off()

2023-12-19T17:14:17+00:00

Add missing clk_disable_unprepare() and geni_se_resources_off() in the error
path in geni_i2c_probe().

Fixes: 14d02fbadb5d ("i2c: qcom-geni: add desc struct to prepare support for I2C Master Hub variant")
Signed-off-by: Yang Yingliang 
Reviewed-by: Andi Shyti 
Signed-off-by: Wolfram Sang

i2c: ocores: Move system PM hooks to the NOIRQ phase

2023-11-13T17:43:42+00:00

When an I2C device contains a wake IRQ subordinate to a regmap-irq chip,
the regmap-irq code must be able to perform I2C transactions during
suspend_device_irqs() and resume_device_irqs(). Therefore, the bus must
be suspended/resumed during the NOIRQ phase.

Signed-off-by: Samuel Holland 
Acked-by: Peter Korsgaard 
Reviewed-by: Andi Shyti 
Signed-off-by: Wolfram Sang

i2c: designware: Fix corrupted memory seen in the ISR

2023-11-13T09:51:14+00:00

When running on a many core ARM64 server, errors were
happening in the ISR that looked like corrupted memory. These
corruptions would fix themselves if small delays were inserted
in the ISR. Errors reported by the driver included "i2c_designware
APMC0D0F:00: i2c_dw_xfer_msg: invalid target address" and
"i2c_designware APMC0D0F:00:controller timed out" during
in-band IPMI SSIF stress tests.

The problem was determined to be memory writes in the driver were not
becoming visible to all cores when execution rapidly shifted between
cores, like when a register write immediately triggers an ISR.
Processors with weak memory ordering, like ARM64, make no
guarantees about the order normal memory writes become globally
visible, unless barrier instructions are used to control ordering.

To solve this, regmap accessor functions configured by this driver
were changed to use non-relaxed forms of the low-level register
access functions, which include a barrier on platforms that require
it. This assures memory writes before a controller register access are
visible to all cores. The community concluded defaulting to correct
operation outweighed defaulting to the small performance gains from
using relaxed access functions. Being a low speed device added weight to
this choice of default register access behavior.

Signed-off-by: Jan Bottorff 
Acked-by: Jarkko Nikula 
Tested-by: Serge Semin 
Reviewed-by: Serge Semin 
Signed-off-by: Wolfram Sang

Revert "i2c: pxa: move to generic GPIO recovery"

2023-11-13T01:52:29+00:00

This reverts commit 0b01392c18b9993a584f36ace1d61118772ad0ca.

Conversion of PXA to generic I2C recovery, makes the I2C bus completely
lock up if recovery pinctrl is present in the DT and I2C recovery is
enabled.

So, until the generic I2C recovery can also work with PXA lets revert
to have working I2C and I2C recovery again.

Signed-off-by: Robert Marko 
Cc: stable@vger.kernel.org # 5.11+
Acked-by: Andi Shyti 
Acked-by: Russell King (Oracle) 
Acked-by: Linus Walleij 
Signed-off-by: Wolfram Sang

i2c: cp2615: Fix 'assignment to __be16' warning

2023-11-08T09:27:17+00:00

While the preamble field _is_ technically big-endian, its value is always 0x2A2A,
which is the same in either endianness. However, to avoid generating a warning,
we should still call `htons()` explicitly.

Signed-off-by: Bence Csókás 
Signed-off-by: Wolfram Sang

i2c: designware: Disable TX_EMPTY irq while waiting for block length byte

2023-11-08T09:19:48+00:00

During SMBus block data read process, we have seen high interrupt rate
because of TX_EMPTY irq status while waiting for block length byte (the
first data byte after the address phase). The interrupt handler does not
do anything because the internal state is kept as STATUS_WRITE_IN_PROGRESS.
Hence, we should disable TX_EMPTY IRQ until I2C DesignWare receives
first data byte from I2C device, then re-enable it to resume SMBus
transaction.

It takes 0.789 ms for host to receive data length from slave.
Without the patch, i2c_dw_isr() is called 99 times by TX_EMPTY interrupt.
And it is none after applying the patch.

Cc: stable@vger.kernel.org
Co-developed-by: Chuong Tran 
Signed-off-by: Chuong Tran 
Signed-off-by: Tam Nguyen 
Acked-by: Jarkko Nikula 
Reviewed-by: Serge Semin 
Signed-off-by: Wolfram Sang

i2c: iproc: handle invalid slave state

2023-11-08T09:16:35+00:00

Add the code to handle an invalid state when both bits S_RX_EVENT
(indicating a transaction) and S_START_BUSY (indicating the end
of transaction - transition of START_BUSY from 1 to 0) are set in
the interrupt status register during a slave read.

Signed-off-by: Roman Bacik 
Fixes: 1ca1b4516088 ("i2c: iproc: handle Master aborted error")
Acked-by: Ray Jui 
Signed-off-by: Wolfram Sang

Merge tag 'i2c-for-6.7-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux

2023-11-05T18:41:14+00:00

Pull i2c updates from Wolfram Sang:
 "I2C has largely driver updates for 6.7, i.e. feature additions (like
  adding transfers while in atomic mode), using new helpers (like
  devm_clk_get_enabled), new IDs, documentation fixes and additions...
  you name it.

  The core got a memleak fix and better support for nested muxes"

* tag 'i2c-for-6.7-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux: (53 commits)
  i2c: s3c2410: make i2c_s3c_irq_nextbyte() void
  i2c: qcom-geni: add ACPI device id for sc8180x
  Documentation: i2c: add fault code for not supporting 10 bit addresses
  i2c: sun6i-p2wi: Prevent potential division by zero
  i2c: mux: demux-pinctrl: Convert to use sysfs_emit_at() API
  i2c: i801: Use new helper acpi_use_parent_companion
  ACPI: Add helper acpi_use_parent_companion
  MAINTAINERS: add YAML file for i2c-demux-pinctrl
  i2c: core: fix lockdep warning for sparsely nested adapter chain
  i2c: axxia: eliminate kernel-doc warnings
  dt-bindings: i2c: i2c-demux-pinctrl: Convert to json-schema
  i2c: stm32f7: Use devm_clk_get_enabled()
  i2c: stm32f4: Use devm_clk_get_enabled()
  i2c: stm32f7: add description of atomic in struct stm32f7_i2c_dev
  i2c: fix memleak in i2c_new_client_device()
  i2c: exynos5: Calculate t_scl_l, t_scl_h according to i2c spec
  i2c: i801: Simplify class-based client device instantiation
  i2c: exynos5: add support for atomic transfers
  i2c: at91-core: Use devm_clk_get_enabled()
  eeprom: at24: add ST M24C64-D Additional Write lockable page support
  ...