<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux.git/drivers/gpu, branch v5.1-rc4</title>
<subtitle>Linux kernel source tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/'/>
<entry>
<title>Merge tag 'drm-intel-fixes-2019-04-04' of git://anongit.freedesktop.org/drm/drm-intel into drm-fixes</title>
<updated>2019-04-05T00:45:32+00:00</updated>
<author>
<name>Dave Airlie</name>
<email>airlied@redhat.com</email>
</author>
<published>2019-04-05T00:45:27+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=23b5f422e8f42d9d3b7063c05c839a8b0ff5adf5'/>
<id>23b5f422e8f42d9d3b7063c05c839a8b0ff5adf5</id>
<content type='text'>
Only one fix for DSC (backoff after drm_modeset_lock deadlock)
and GVT's fixes including vGPU display plane size calculation,
shadow mm pin count, error recovery path for workload create
and one kerneldoc fix.

Signed-off-by: Dave Airlie &lt;airlied@redhat.com&gt;

From: Rodrigo Vivi &lt;rodrigo.vivi@intel.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20190404161116.GA14522@intel.com
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Only one fix for DSC (backoff after drm_modeset_lock deadlock)
and GVT's fixes including vGPU display plane size calculation,
shadow mm pin count, error recovery path for workload create
and one kerneldoc fix.

Signed-off-by: Dave Airlie &lt;airlied@redhat.com&gt;

From: Rodrigo Vivi &lt;rodrigo.vivi@intel.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20190404161116.GA14522@intel.com
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'drm-fixes-5.1' of git://people.freedesktop.org/~agd5f/linux into drm-fixes</title>
<updated>2019-04-05T00:42:13+00:00</updated>
<author>
<name>Dave Airlie</name>
<email>airlied@redhat.com</email>
</author>
<published>2019-04-05T00:42:08+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=2ded18812bb17da13e68a425053ab10c4457707a'/>
<id>2ded18812bb17da13e68a425053ab10c4457707a</id>
<content type='text'>
Fixes for 5.1:
- Fix for pcie dpm
- Powerplay fixes for vega20
- Fix vbios display on reboot if driver display state is retained
- Gfx9 resume robustness fix

Signed-off-by: Dave Airlie &lt;airlied@redhat.com&gt;
From: Alex Deucher &lt;alexdeucher@gmail.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20190404042939.3386-1-alexander.deucher@amd.com
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Fixes for 5.1:
- Fix for pcie dpm
- Powerplay fixes for vega20
- Fix vbios display on reboot if driver display state is retained
- Gfx9 resume robustness fix

Signed-off-by: Dave Airlie &lt;airlied@redhat.com&gt;
From: Alex Deucher &lt;alexdeucher@gmail.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20190404042939.3386-1-alexander.deucher@amd.com
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'gvt-fixes-2019-04-04' of https://github.com/intel/gvt-linux into drm-intel-fixes</title>
<updated>2019-04-04T01:00:42+00:00</updated>
<author>
<name>Rodrigo Vivi</name>
<email>rodrigo.vivi@intel.com</email>
</author>
<published>2019-04-04T01:00:41+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=57cbec02f9b10992319ca578797c8059ac47d71e'/>
<id>57cbec02f9b10992319ca578797c8059ac47d71e</id>
<content type='text'>
gvt-fixes-2019-04-04

- Fix shadow mm pin count (Yan)
- Fix cmd parser error path recover (Yan)
- Fix vGPU display plane size calculation (Xiong)
- Fix kerneldoc (Chris)

Signed-off-by: Rodrigo Vivi &lt;rodrigo.vivi@intel.com&gt;
From: Zhenyu Wang &lt;zhenyuw@linux.intel.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20190404003957.GB8327@zhen-hp.sh.intel.com
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
gvt-fixes-2019-04-04

- Fix shadow mm pin count (Yan)
- Fix cmd parser error path recover (Yan)
- Fix vGPU display plane size calculation (Xiong)
- Fix kerneldoc (Chris)

Signed-off-by: Rodrigo Vivi &lt;rodrigo.vivi@intel.com&gt;
From: Zhenyu Wang &lt;zhenyuw@linux.intel.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20190404003957.GB8327@zhen-hp.sh.intel.com
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/i915/gvt: Fix kerneldoc typo for intel_vgpu_emulate_hotplug</title>
<updated>2019-04-04T00:45:45+00:00</updated>
<author>
<name>Chris Wilson</name>
<email>chris@chris-wilson.co.uk</email>
</author>
<published>2019-02-05T20:30:33+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=cf9ed66671ec5f6cacc7b6efbad9d7c9e5e31776'/>
<id>cf9ed66671ec5f6cacc7b6efbad9d7c9e5e31776</id>
<content type='text'>
drivers/gpu/drm/i915/gvt/display.c:457: warning: Function parameter or member 'connected' not described in 'intel_vgpu_emulate_hotplug'
drivers/gpu/drm/i915/gvt/display.c:457: warning: Excess function parameter 'conncted' description in 'intel_vgpu_emulate_hotplug'

Fixes: 1ca20f33df42 ("drm/i915/gvt: add hotplug emulation")
Signed-off-by: Chris Wilson &lt;chris@chris-wilson.co.uk&gt;
Cc: Hang Yuan &lt;hang.yuan@linux.intel.com&gt;
Cc: Zhenyu Wang &lt;zhenyuw@linux.intel.com&gt;
Cc: Zhi Wang &lt;zhi.a.wang@intel.com&gt;
Signed-off-by: Zhenyu Wang &lt;zhenyuw@linux.intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
drivers/gpu/drm/i915/gvt/display.c:457: warning: Function parameter or member 'connected' not described in 'intel_vgpu_emulate_hotplug'
drivers/gpu/drm/i915/gvt/display.c:457: warning: Excess function parameter 'conncted' description in 'intel_vgpu_emulate_hotplug'

Fixes: 1ca20f33df42 ("drm/i915/gvt: add hotplug emulation")
Signed-off-by: Chris Wilson &lt;chris@chris-wilson.co.uk&gt;
Cc: Hang Yuan &lt;hang.yuan@linux.intel.com&gt;
Cc: Zhenyu Wang &lt;zhenyuw@linux.intel.com&gt;
Cc: Zhi Wang &lt;zhi.a.wang@intel.com&gt;
Signed-off-by: Zhenyu Wang &lt;zhenyuw@linux.intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/i915/gvt: Correct the calculation of plane size</title>
<updated>2019-04-04T00:44:37+00:00</updated>
<author>
<name>Xiong Zhang</name>
<email>xiong.y.zhang@intel.com</email>
</author>
<published>2019-03-25T08:29:19+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=7f1a93b1f1d1d2603a49a9e4226259db9272f305'/>
<id>7f1a93b1f1d1d2603a49a9e4226259db9272f305</id>
<content type='text'>
stride isn't in unit of pixel, it is bytes, so calculation of
plane size doesn't need to multiple bpp.

Fixes: e546e281d33d ("drm/i915/gvt: Dmabuf support for GVT-g")
Signed-off-by: Xiong Zhang &lt;xiong.y.zhang@intel.com&gt;
Signed-off-by: Zhenyu Wang &lt;zhenyuw@linux.intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
stride isn't in unit of pixel, it is bytes, so calculation of
plane size doesn't need to multiple bpp.

Fixes: e546e281d33d ("drm/i915/gvt: Dmabuf support for GVT-g")
Signed-off-by: Xiong Zhang &lt;xiong.y.zhang@intel.com&gt;
Signed-off-by: Zhenyu Wang &lt;zhenyuw@linux.intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amdgpu: remove unnecessary rlc reset function on gfx9</title>
<updated>2019-04-02T21:23:16+00:00</updated>
<author>
<name>Le Ma</name>
<email>le.ma@amd.com</email>
</author>
<published>2019-04-01T10:08:30+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=d939f44d4a7f910755165458da20407d2139f581'/>
<id>d939f44d4a7f910755165458da20407d2139f581</id>
<content type='text'>
The rlc reset function is not necessary during gfx9 initialization/resume phase.
And this function would even cause rlc fw loading failed on some gfx9 ASIC.
Remove this function safely with verification well on Vega/Raven platform.

Signed-off-by: Le Ma &lt;le.ma@amd.com&gt;
Reviewed-by: Feifei Xu &lt;Feifei.Xu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The rlc reset function is not necessary during gfx9 initialization/resume phase.
And this function would even cause rlc fw loading failed on some gfx9 ASIC.
Remove this function safely with verification well on Vega/Raven platform.

Signed-off-by: Le Ma &lt;le.ma@amd.com&gt;
Reviewed-by: Feifei Xu &lt;Feifei.Xu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/i915: Always backoff after a drm_modeset_lock() deadlock</title>
<updated>2019-04-01T17:22:31+00:00</updated>
<author>
<name>Chris Wilson</name>
<email>chris@chris-wilson.co.uk</email>
</author>
<published>2019-03-29T16:51:52+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=a145b5b0e48783d0cd3ee605ed00b133d5c8ffed'/>
<id>a145b5b0e48783d0cd3ee605ed00b133d5c8ffed</id>
<content type='text'>
If drm_modeset_lock() reports a deadlock it sets the ctx-&gt;contexted
field and insists that the caller calls drm_modeset_backoff() or else it
generates a WARN on cleanup.

&lt;4&gt; [1601.870376] WARNING: CPU: 3 PID: 8445 at drivers/gpu/drm/drm_modeset_lock.c:228 drm_modeset_drop_locks+0x35/0x40
&lt;4&gt; [1601.870395] Modules linked in: vgem snd_hda_codec_hdmi snd_hda_codec_realtek snd_hda_codec_generic x86_pkg_temp_thermal i915 coretemp crct10dif_pclmul
&lt;6&gt; [1601.870403] Console: switching
&lt;4&gt; [1601.870403]  snd_hda_intel
&lt;4&gt; [1601.870406] to colour frame buffer device 320x90
&lt;4&gt; [1601.870406]  crc32_pclmul snd_hda_codec snd_hwdep ghash_clmulni_intel e1000e snd_hda_core cdc_ether ptp usbnet mii pps_core snd_pcm i2c_i801 mei_me mei prime_numbers
&lt;4&gt; [1601.870422] CPU: 3 PID: 8445 Comm: cat Tainted: G     U            5.0.0-rc7-CI-CI_DRM_5650+ #1
&lt;4&gt; [1601.870424] Hardware name: Intel Corporation Ice Lake Client Platform/IceLake U DDR4 SODIMM PD RVP TLC, BIOS ICLSFWR1.R00.2402.AD3.1810170014 10/17/2018
&lt;4&gt; [1601.870427] RIP: 0010:drm_modeset_drop_locks+0x35/0x40
&lt;4&gt; [1601.870430] Code: 29 48 8b 43 60 48 8d 6b 60 48 39 c5 74 19 48 8b 43 60 48 8d b8 70 ff ff ff e8 87 ff ff ff 48 8b 43 60 48 39 c5 75 e7 5b 5d c3 &lt;0f&gt; 0b eb d3 0f 1f 80 00 00 00 00 41 56 41 55 41 54 55 53 48 8b 6f
&lt;4&gt; [1601.870432] RSP: 0018:ffffc90000d67ce8 EFLAGS: 00010282
&lt;4&gt; [1601.870435] RAX: 00000000ffffffdd RBX: ffffc90000d67d00 RCX: 5dbbe23d00000000
&lt;4&gt; [1601.870437] RDX: 0000000000000000 RSI: 0000000093e6194a RDI: ffffc90000d67d00
&lt;4&gt; [1601.870439] RBP: ffff88849e62e678 R08: 0000000003b7329a R09: 0000000000000001
&lt;4&gt; [1601.870441] R10: 0000000000000000 R11: 0000000000000000 R12: ffff888492100410
&lt;4&gt; [1601.870442] R13: ffff88849ea50958 R14: ffff8884a67eb028 R15: ffff8884a67eb028
&lt;4&gt; [1601.870445] FS:  00007fa7a27745c0(0000) GS:ffff8884aff80000(0000) knlGS:0000000000000000
&lt;4&gt; [1601.870447] CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
&lt;4&gt; [1601.870449] CR2: 000055af07e66000 CR3: 00000004a8cc2006 CR4: 0000000000760ee0
&lt;4&gt; [1601.870451] DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000
&lt;4&gt; [1601.870453] DR3: 0000000000000000 DR6: 00000000fffe0ff0 DR7: 0000000000000400
&lt;4&gt; [1601.870454] PKRU: 55555554
&lt;4&gt; [1601.870456] Call Trace:
&lt;4&gt; [1601.870505]  i915_dsc_fec_support_show+0x91/0x190 [i915]
&lt;4&gt; [1601.870522]  seq_read+0xdb/0x3c0
&lt;4&gt; [1601.870531]  full_proxy_read+0x51/0x80
&lt;4&gt; [1601.870538]  __vfs_read+0x31/0x190
&lt;4&gt; [1601.870546]  ? __se_sys_newfstat+0x3c/0x60
&lt;4&gt; [1601.870552]  vfs_read+0x9e/0x150
&lt;4&gt; [1601.870557]  ksys_read+0x50/0xc0
&lt;4&gt; [1601.870564]  do_syscall_64+0x55/0x190
&lt;4&gt; [1601.870569]  entry_SYSCALL_64_after_hwframe+0x49/0xbe
&lt;4&gt; [1601.870572] RIP: 0033:0x7fa7a226d081
&lt;4&gt; [1601.870574] Code: fe ff ff 48 8d 3d 67 9c 0a 00 48 83 ec 08 e8 a6 4c 02 00 66 0f 1f 44 00 00 48 8d 05 81 08 2e 00 8b 00 85 c0 75 13 31 c0 0f 05 &lt;48&gt; 3d 00 f0 ff ff 77 57 f3 c3 0f 1f 44 00 00 41 54 55 49 89 d4 53
&lt;4&gt; [1601.870576] RSP: 002b:00007ffcc05140c8 EFLAGS: 00000246 ORIG_RAX: 0000000000000000
&lt;4&gt; [1601.870579] RAX: ffffffffffffffda RBX: 0000000000020000 RCX: 00007fa7a226d081
&lt;4&gt; [1601.870581] RDX: 0000000000020000 RSI: 000055af07e63000 RDI: 0000000000000007
&lt;4&gt; [1601.870583] RBP: 0000000000020000 R08: 000000000000007b R09: 0000000000000000
&lt;4&gt; [1601.870585] R10: 000055af07e60010 R11: 0000000000000246 R12: 000055af07e63000
&lt;4&gt; [1601.870587] R13: 0000000000000007 R14: 000055af07e634bf R15: 0000000000020000

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109745
Fixes: e845f099f1c6 ("drm/i915/dsc: Add Per connector debugfs node for DSC support/enable")
Signed-off-by: Chris Wilson &lt;chris@chris-wilson.co.uk&gt;
Cc: Rodrigo Vivi &lt;rodrigo.vivi@intel.com&gt;
Cc: Ville Syrjala &lt;ville.syrjala@linux.intel.com&gt;
Cc: Anusha Srivatsa &lt;anusha.srivatsa@intel.com&gt;
Cc: Lyude Paul &lt;lyude@redhat.com&gt;
Cc: Manasi Navare &lt;manasi.d.navare@intel.com&gt;
Reviewed-by: Manasi Navare &lt;manasi.d.navare@intel.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20190329165152.29259-1-chris@chris-wilson.co.uk
(cherry picked from commit ee6df5694a9a2e30566ae05e9c145a0f6d5e087f)
Signed-off-by: Rodrigo Vivi &lt;rodrigo.vivi@intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
If drm_modeset_lock() reports a deadlock it sets the ctx-&gt;contexted
field and insists that the caller calls drm_modeset_backoff() or else it
generates a WARN on cleanup.

&lt;4&gt; [1601.870376] WARNING: CPU: 3 PID: 8445 at drivers/gpu/drm/drm_modeset_lock.c:228 drm_modeset_drop_locks+0x35/0x40
&lt;4&gt; [1601.870395] Modules linked in: vgem snd_hda_codec_hdmi snd_hda_codec_realtek snd_hda_codec_generic x86_pkg_temp_thermal i915 coretemp crct10dif_pclmul
&lt;6&gt; [1601.870403] Console: switching
&lt;4&gt; [1601.870403]  snd_hda_intel
&lt;4&gt; [1601.870406] to colour frame buffer device 320x90
&lt;4&gt; [1601.870406]  crc32_pclmul snd_hda_codec snd_hwdep ghash_clmulni_intel e1000e snd_hda_core cdc_ether ptp usbnet mii pps_core snd_pcm i2c_i801 mei_me mei prime_numbers
&lt;4&gt; [1601.870422] CPU: 3 PID: 8445 Comm: cat Tainted: G     U            5.0.0-rc7-CI-CI_DRM_5650+ #1
&lt;4&gt; [1601.870424] Hardware name: Intel Corporation Ice Lake Client Platform/IceLake U DDR4 SODIMM PD RVP TLC, BIOS ICLSFWR1.R00.2402.AD3.1810170014 10/17/2018
&lt;4&gt; [1601.870427] RIP: 0010:drm_modeset_drop_locks+0x35/0x40
&lt;4&gt; [1601.870430] Code: 29 48 8b 43 60 48 8d 6b 60 48 39 c5 74 19 48 8b 43 60 48 8d b8 70 ff ff ff e8 87 ff ff ff 48 8b 43 60 48 39 c5 75 e7 5b 5d c3 &lt;0f&gt; 0b eb d3 0f 1f 80 00 00 00 00 41 56 41 55 41 54 55 53 48 8b 6f
&lt;4&gt; [1601.870432] RSP: 0018:ffffc90000d67ce8 EFLAGS: 00010282
&lt;4&gt; [1601.870435] RAX: 00000000ffffffdd RBX: ffffc90000d67d00 RCX: 5dbbe23d00000000
&lt;4&gt; [1601.870437] RDX: 0000000000000000 RSI: 0000000093e6194a RDI: ffffc90000d67d00
&lt;4&gt; [1601.870439] RBP: ffff88849e62e678 R08: 0000000003b7329a R09: 0000000000000001
&lt;4&gt; [1601.870441] R10: 0000000000000000 R11: 0000000000000000 R12: ffff888492100410
&lt;4&gt; [1601.870442] R13: ffff88849ea50958 R14: ffff8884a67eb028 R15: ffff8884a67eb028
&lt;4&gt; [1601.870445] FS:  00007fa7a27745c0(0000) GS:ffff8884aff80000(0000) knlGS:0000000000000000
&lt;4&gt; [1601.870447] CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
&lt;4&gt; [1601.870449] CR2: 000055af07e66000 CR3: 00000004a8cc2006 CR4: 0000000000760ee0
&lt;4&gt; [1601.870451] DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000
&lt;4&gt; [1601.870453] DR3: 0000000000000000 DR6: 00000000fffe0ff0 DR7: 0000000000000400
&lt;4&gt; [1601.870454] PKRU: 55555554
&lt;4&gt; [1601.870456] Call Trace:
&lt;4&gt; [1601.870505]  i915_dsc_fec_support_show+0x91/0x190 [i915]
&lt;4&gt; [1601.870522]  seq_read+0xdb/0x3c0
&lt;4&gt; [1601.870531]  full_proxy_read+0x51/0x80
&lt;4&gt; [1601.870538]  __vfs_read+0x31/0x190
&lt;4&gt; [1601.870546]  ? __se_sys_newfstat+0x3c/0x60
&lt;4&gt; [1601.870552]  vfs_read+0x9e/0x150
&lt;4&gt; [1601.870557]  ksys_read+0x50/0xc0
&lt;4&gt; [1601.870564]  do_syscall_64+0x55/0x190
&lt;4&gt; [1601.870569]  entry_SYSCALL_64_after_hwframe+0x49/0xbe
&lt;4&gt; [1601.870572] RIP: 0033:0x7fa7a226d081
&lt;4&gt; [1601.870574] Code: fe ff ff 48 8d 3d 67 9c 0a 00 48 83 ec 08 e8 a6 4c 02 00 66 0f 1f 44 00 00 48 8d 05 81 08 2e 00 8b 00 85 c0 75 13 31 c0 0f 05 &lt;48&gt; 3d 00 f0 ff ff 77 57 f3 c3 0f 1f 44 00 00 41 54 55 49 89 d4 53
&lt;4&gt; [1601.870576] RSP: 002b:00007ffcc05140c8 EFLAGS: 00000246 ORIG_RAX: 0000000000000000
&lt;4&gt; [1601.870579] RAX: ffffffffffffffda RBX: 0000000000020000 RCX: 00007fa7a226d081
&lt;4&gt; [1601.870581] RDX: 0000000000020000 RSI: 000055af07e63000 RDI: 0000000000000007
&lt;4&gt; [1601.870583] RBP: 0000000000020000 R08: 000000000000007b R09: 0000000000000000
&lt;4&gt; [1601.870585] R10: 000055af07e60010 R11: 0000000000000246 R12: 000055af07e63000
&lt;4&gt; [1601.870587] R13: 0000000000000007 R14: 000055af07e634bf R15: 0000000000020000

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109745
Fixes: e845f099f1c6 ("drm/i915/dsc: Add Per connector debugfs node for DSC support/enable")
Signed-off-by: Chris Wilson &lt;chris@chris-wilson.co.uk&gt;
Cc: Rodrigo Vivi &lt;rodrigo.vivi@intel.com&gt;
Cc: Ville Syrjala &lt;ville.syrjala@linux.intel.com&gt;
Cc: Anusha Srivatsa &lt;anusha.srivatsa@intel.com&gt;
Cc: Lyude Paul &lt;lyude@redhat.com&gt;
Cc: Manasi Navare &lt;manasi.d.navare@intel.com&gt;
Reviewed-by: Manasi Navare &lt;manasi.d.navare@intel.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20190329165152.29259-1-chris@chris-wilson.co.uk
(cherry picked from commit ee6df5694a9a2e30566ae05e9c145a0f6d5e087f)
Signed-off-by: Rodrigo Vivi &lt;rodrigo.vivi@intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/i915/gvt: do not let pin count of shadow mm go negative</title>
<updated>2019-03-29T02:27:42+00:00</updated>
<author>
<name>Yan Zhao</name>
<email>yan.y.zhao@intel.com</email>
</author>
<published>2019-03-27T04:55:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=663a50ceac75c2208d2ad95365bc8382fd42f44d'/>
<id>663a50ceac75c2208d2ad95365bc8382fd42f44d</id>
<content type='text'>
shadow mm's pin count got increased in workload preparation phase, which
is after workload scanning.
it will get decreased in complete_current_workload() anyway after
workload completion.
Sometimes, if a workload meets a scanning error, its shadow mm pin count
will not get increased but will get decreased in the end.
This patch lets shadow mm's pin count not go below 0.

Fixes: 2707e4446688 ("drm/i915/gvt: vGPU graphics memory virtualization")
Cc: zhenyuw@linux.intel.com
Cc: stable@vger.kernel.org #4.14+
Signed-off-by: Yan Zhao &lt;yan.y.zhao@intel.com&gt;
Signed-off-by: Zhenyu Wang &lt;zhenyuw@linux.intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
shadow mm's pin count got increased in workload preparation phase, which
is after workload scanning.
it will get decreased in complete_current_workload() anyway after
workload completion.
Sometimes, if a workload meets a scanning error, its shadow mm pin count
will not get increased but will get decreased in the end.
This patch lets shadow mm's pin count not go below 0.

Fixes: 2707e4446688 ("drm/i915/gvt: vGPU graphics memory virtualization")
Cc: zhenyuw@linux.intel.com
Cc: stable@vger.kernel.org #4.14+
Signed-off-by: Yan Zhao &lt;yan.y.zhao@intel.com&gt;
Signed-off-by: Zhenyu Wang &lt;zhenyuw@linux.intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/i915/gvt: do not deliver a workload if its creation fails</title>
<updated>2019-03-29T02:26:53+00:00</updated>
<author>
<name>Yan Zhao</name>
<email>yan.y.zhao@intel.com</email>
</author>
<published>2019-03-27T04:54:51+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=dade58ed5af6365ac50ff4259c2a0bf31219e285'/>
<id>dade58ed5af6365ac50ff4259c2a0bf31219e285</id>
<content type='text'>
in workload creation routine, if any failure occurs, do not queue this
workload for delivery. if this failure is fatal, enter into failsafe
mode.

Fixes: 6d76303553ba ("drm/i915/gvt: Move common vGPU workload creation into scheduler.c")
Cc: stable@vger.kernel.org #4.19+
Cc: zhenyuw@linux.intel.com
Signed-off-by: Yan Zhao &lt;yan.y.zhao@intel.com&gt;
Signed-off-by: Zhenyu Wang &lt;zhenyuw@linux.intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
in workload creation routine, if any failure occurs, do not queue this
workload for delivery. if this failure is fatal, enter into failsafe
mode.

Fixes: 6d76303553ba ("drm/i915/gvt: Move common vGPU workload creation into scheduler.c")
Cc: stable@vger.kernel.org #4.19+
Cc: zhenyuw@linux.intel.com
Signed-off-by: Yan Zhao &lt;yan.y.zhao@intel.com&gt;
Signed-off-by: Zhenyu Wang &lt;zhenyuw@linux.intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'drm-intel-fixes-2019-03-28' of git://anongit.freedesktop.org/drm/drm-intel into drm-fixes</title>
<updated>2019-03-29T00:45:11+00:00</updated>
<author>
<name>Dave Airlie</name>
<email>airlied@redhat.com</email>
</author>
<published>2019-03-29T00:38:25+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=0271ab11790cd5ab8ec38e0e669e13c1009f271a'/>
<id>0271ab11790cd5ab8ec38e0e669e13c1009f271a</id>
<content type='text'>
drm/i915 fixes for v5.2-rc3:
- fix mmap range checks
- fix gvt ppgtt mm LRU list access races
- fix selftest error pointer check
- fix a macro definition (pre-emptive for potential further backports)
- fix one AML SKU ULX status

Signed-off-by: Dave Airlie &lt;airlied@redhat.com&gt;

From: Jani Nikula &lt;jani.nikula@intel.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/87sgv6ao7a.fsf@intel.com
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
drm/i915 fixes for v5.2-rc3:
- fix mmap range checks
- fix gvt ppgtt mm LRU list access races
- fix selftest error pointer check
- fix a macro definition (pre-emptive for potential further backports)
- fix one AML SKU ULX status

Signed-off-by: Dave Airlie &lt;airlied@redhat.com&gt;

From: Jani Nikula &lt;jani.nikula@intel.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/87sgv6ao7a.fsf@intel.com
</pre>
</div>
</content>
</entry>
</feed>
