linux.git/drivers/gpu, branch v4.5-rc6 Linux kernel source tree drm/nouveau/disp/dp: ensure sink is powered up before attempting link training 2016-02-25T03:15:43+00:00 Ben Skeggs bskeggs@redhat.com 2016-02-17T22:14:19+00:00 95664e66fad964c3dd7945d6edfb1d0931844664 This can happen under some annoying circumstances, and is a quick fix until more substantial changes can be made. Fixed eDP mode changes on (at least) the Lenovo P50. Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Cc: stable@vger.kernel.org 
This can happen under some annoying circumstances, and is a quick fix
until more substantial changes can be made.

Fixed eDP mode changes on (at least) the Lenovo P50.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Cc: stable@vger.kernel.org
drm/nouveau: platform: Fix deferred probe 2016-02-25T02:20:59+00:00 Thierry Reding treding@nvidia.com 2016-02-24T17:34:43+00:00 870571a5698b2e9d0f4d2e5c6245967b582aab45 The error cleanup paths aren't quite correct and will crash upon deferred probe. Cc: stable@vger.kernel.org # v4.3+ Reviewed-by: Ben Skeggs <bskeggs@redhat.com> Reviewed-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Dave Airlie <airlied@redhat.com> 
The error cleanup paths aren't quite correct and will crash upon
deferred probe.

Cc: stable@vger.kernel.org # v4.3+
Reviewed-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Merge tag 'drm-intel-fixes-2016-02-22' of git://anongit.freedesktop.org/drm-intel into drm-fixes 2016-02-24T22:22:43+00:00 Dave Airlie airlied@redhat.com 2016-02-24T22:22:43+00:00 398cb0c93b18b625703db30d874351e6d4cc645a This is a bit large, but it really helps Skylake bugs we are seeing on a number of laptops. Most of the commits are quite similar, ensuring the display power doesn't vanish under us during hardware access. Also do note that it's not just Skylake that's affected. * tag 'drm-intel-fixes-2016-02-22' of git://anongit.freedesktop.org/drm-intel: drm/i915/gen9: Verify and enforce dc6 state writes drm/i915/gen9: Check for DC state mismatch drm/i915/skl: Ensure HW is powered during DDB HW state readout drm/i915/lvds: Ensure the HW is powered during HW state readout drm/i915/hdmi: Ensure the HW is powered during HW state readout drm/i915/dsi: Ensure the HW is powered during HW state readout drm/i915/dp: Ensure the HW is powered during HW state readout drm/i915: Ensure the HW is powered when accessing the CRC HW block drm/i915/ddi: Ensure the HW is powered during HW state readout drm/i915/crt: Ensure the HW is powered during HW state readout drm/i915: Ensure the HW is powered during HW access in assert_pipe drm/i915: Ensure the HW is powered when disabling VGA drm/i915/ibx: Ensure the HW is powered during PLL HW readout drm/i915: Ensure the HW is powered during display pipe HW readout drm/i915: Add helper to get a display power ref if it was already enabled 
This is a bit large, but it really helps Skylake bugs we are seeing
on a number of laptops.

Most of the commits are quite similar, ensuring the display power
doesn't vanish under us during hardware access. Also do note that it's
not just Skylake that's affected.

* tag 'drm-intel-fixes-2016-02-22' of git://anongit.freedesktop.org/drm-intel:
  drm/i915/gen9: Verify and enforce dc6 state writes
  drm/i915/gen9: Check for DC state mismatch
  drm/i915/skl: Ensure HW is powered during DDB HW state readout
  drm/i915/lvds: Ensure the HW is powered during HW state readout
  drm/i915/hdmi: Ensure the HW is powered during HW state readout
  drm/i915/dsi: Ensure the HW is powered during HW state readout
  drm/i915/dp: Ensure the HW is powered during HW state readout
  drm/i915: Ensure the HW is powered when accessing the CRC HW block
  drm/i915/ddi: Ensure the HW is powered during HW state readout
  drm/i915/crt: Ensure the HW is powered during HW state readout
  drm/i915: Ensure the HW is powered during HW access in assert_pipe
  drm/i915: Ensure the HW is powered when disabling VGA
  drm/i915/ibx: Ensure the HW is powered during PLL HW readout
  drm/i915: Ensure the HW is powered during display pipe HW readout
  drm/i915: Add helper to get a display power ref if it was already enabled
drm/amdgpu: disable direct VM updates when vm_debug is set 2016-02-24T17:46:06+00:00 Christian König christian.koenig@amd.com 2016-02-19T09:03:03+00:00 6378076bcfdcd1d4f8d726d08d3fa044736873eb That should make user space bugs more obvious. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> 
That should make user space bugs more obvious.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
amdgpu: fix NULL pointer dereference at tonga_check_states_equal 2016-02-24T17:46:05+00:00 Bradley Pankow btpankow@gmail.com 2016-02-23T01:11:47+00:00 827108d08070c7515c14eb47e5fa03f59cfe38cf The event_data passed from pem_fini was not cleared upon initialization. This caused NULL checks to pass and cast_const_phw_tonga_power_state to attempt to dereference an invalid pointer. Clear the event_data in pem_init and pem_fini before calling pem_handle_event. Reviewed-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Bradley Pankow <btpankow@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
The event_data passed from pem_fini was not cleared upon initialization.
This caused NULL checks to pass and cast_const_phw_tonga_power_state to
attempt to dereference an invalid pointer. Clear the event_data in
pem_init and pem_fini before calling pem_handle_event.

Reviewed-by:  Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Bradley Pankow <btpankow@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/i915/gen9: Verify and enforce dc6 state writes 2016-02-22T16:37:43+00:00 Mika Kuoppala mika.kuoppala@linux.intel.com 2016-02-18T15:58:09+00:00 9b18572e83bfd5378b3fcff3acf123f7bddf558a It has been observed that sometimes disabling the dc6 fails and dc6 state pops back up, brief moment after disabling. This has to be dmc save/restore timing issue or other bug in the way dc states are handled. Try to work around this issue as we don't have firmware fix yet available. Verify that the value we wrote for the dmc sticks, and also enforce it by rewriting it, if it didn't. v2: Zero rereads on rewrite for extra paranoia (Imre) Testcase: kms_flip/basic-flip-vs-dpms References: https://bugs.freedesktop.org/show_bug.cgi?id=93768 Cc: Patrik Jakobsson <patrik.jakobsson@linux.intel.com> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Cc: Imre Deak <imre.deak@intel.com> Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com> Reviewed-by: Imre Deak <imre.deak@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1455811089-27884-1-git-send-email-mika.kuoppala@intel.com (cherry picked from commit 779cb5d3ddd72950ec726f86e38f7575c7fbdd4c) Signed-off-by: Jani Nikula <jani.nikula@intel.com> 
It has been observed that sometimes disabling the dc6 fails
and dc6 state pops back up, brief moment after disabling. This
has to be dmc save/restore timing issue or other bug in the
way dc states are handled.

Try to work around this issue as we don't have firmware fix
yet available. Verify that the value we wrote for the dmc sticks,
and also enforce it by rewriting it, if it didn't.

v2: Zero rereads on rewrite for extra paranoia (Imre)

Testcase: kms_flip/basic-flip-vs-dpms
References: https://bugs.freedesktop.org/show_bug.cgi?id=93768
Cc: Patrik Jakobsson <patrik.jakobsson@linux.intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1455811089-27884-1-git-send-email-mika.kuoppala@intel.com
(cherry picked from commit 779cb5d3ddd72950ec726f86e38f7575c7fbdd4c)
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
drm/i915/gen9: Check for DC state mismatch 2016-02-22T16:37:25+00:00 Patrik Jakobsson patrik.jakobsson@linux.intel.com 2016-02-18T15:21:11+00:00 9b6f20984c5402af06e13cde64b5fe7c31853d1a The DMC can incorrectly run off and allow DC states on it's own. We don't know the root-cause for this yet but this patch makes it more visible. Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com> Signed-off-by: Patrik Jakobsson <patrik.jakobsson@linux.intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1455808874-22089-2-git-send-email-mika.kuoppala@intel.com (cherry picked from commit 832dba889e27487c3087149f1039acc3feb89003) Signed-off-by: Jani Nikula <jani.nikula@intel.com> 
The DMC can incorrectly run off and allow DC states on it's own. We
don't know the root-cause for this yet but this patch makes it more
visible.

Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: Patrik Jakobsson <patrik.jakobsson@linux.intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1455808874-22089-2-git-send-email-mika.kuoppala@intel.com
(cherry picked from commit 832dba889e27487c3087149f1039acc3feb89003)
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
drm/radeon/pm: adjust display configuration after powerstate 2016-02-22T16:31:09+00:00 Alex Deucher alexander.deucher@amd.com 2016-02-19T23:05:10+00:00 39d4275058baf53e89203407bf3841ff2c74fa32 set_power_state defaults to no displays, so we need to update the display configuration after setting up the powerstate on the first call. In most cases this is not an issue since ends up getting called multiple times at any given modeset and the proper order is achieved in the display changed handling at the top of the function. Reviewed-by: Christian König <christian.koenig@amd.com> Acked-by: Jordan Lazare <Jordan.Lazare@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org 
set_power_state defaults to no displays, so we need to update
the display configuration after setting up the powerstate on the
first call. In most cases this is not an issue since ends up
getting called multiple times at any given modeset and the proper
order is achieved in the display changed handling at the top of
the function.

Reviewed-by: Christian König <christian.koenig@amd.com>
Acked-by: Jordan Lazare <Jordan.Lazare@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
drm/amdgpu/pm: adjust display configuration after powerstate 2016-02-22T16:31:02+00:00 Alex Deucher alexander.deucher@amd.com 2016-02-19T22:55:31+00:00 8e7cedc6f7fe762ffe6e348502be34b11fa79298 set_power_state defaults to no displays, so we need to update the display configuration after setting up the powerstate on the first call. In most cases this is not an issue since ends up getting called multiple times at any given modeset and the proper order is achieved in the display changed handling at the top of the function. Reviewed-by: Christian König <christian.koenig@amd.com> Acked-by: Jordan Lazare <Jordan.Lazare@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org 
set_power_state defaults to no displays, so we need to update
the display configuration after setting up the powerstate on the
first call. In most cases this is not an issue since ends up
getting called multiple times at any given modeset and the proper
order is achieved in the display changed handling at the top of
the function.

Reviewed-by: Christian König <christian.koenig@amd.com>
Acked-by: Jordan Lazare <Jordan.Lazare@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
drm/amdgpu/pm: add some checks for PX 2016-02-22T16:30:56+00:00 Alex Deucher alexander.deucher@amd.com 2016-02-19T20:30:15+00:00 0c67df48597f0e60eaf7f187ee38f6ccce56561e I.e., doesn't make sense to change power states or check the temperature when the asic is powered off. Reviewed-by: Christian König <christian.koenig@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
I.e., doesn't make sense to change power states or check the
temperature when the asic is powered off.

Reviewed-by: Christian König <christian.koenig@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>