linux.git/drivers/gpu/drm, branch v3.3-rc4

drm/radeon/kms: fix MSI re-arm on rv370+

2012-02-14T13:36:23+00:00

MSI_REARM_EN register is a write only trigger register.
There is no need RMW when re-arming.

May fix:
https://bugs.freedesktop.org/show_bug.cgi?id=41668

Signed-off-by: Alex Deucher 
CC: stable@vger.kernel.org
Signed-off-by: Dave Airlie

drm/radeon/kms/atom: bios scratch reg handling updates

2012-02-14T10:56:51+00:00

- Add missing DFP6 connection state handling
- crtc routing bits not used on DCE4+

Noticed by sylware on phoronix.

Signed-off-by: Alex Deucher 
Signed-off-by: Dave Airlie

drm/radeon/kms: drop lock in return path of radeon_fence_count_emitted.

2012-02-14T10:56:16+00:00

Silly bad return path.

Reported-and-Tested-by: Mikko Vinni
Reviewed-by: Alex Deucher 
CC: stable@vger.kernel.org
Signed-off-by: Dave Airlie

Merge branch 'drm-intel-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/keithp/linux into drm-fixes

2012-02-10T08:35:19+00:00

* 'drm-intel-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/keithp/linux:
  drm/i915: fixup interlaced bits clearing in PIPECONF on PCH_SPLIT (v2)
  drm/i915: no lvds quirk for AOpen MP45
  drm/i915: Force explicit bpp selection for intel_dp_link_required
  drm/i915: fixup interlaced bits clearing in PIPECONF on PCH_SPLIT
  drm/i915:: Disable FBC on SandyBridge

drm/i915: fixup interlaced bits clearing in PIPECONF on PCH_SPLIT (v2)

2012-02-08T21:54:18+00:00

An identical patch has been merged for i9xx_crtc_mode_set:

Commit 59df7b1771c150163e522f33c638096ab0efbf42
Author: Christian Schmidt 
Date:   Mon Dec 19 20:03:33 2011 +0100

    drm/intel: Fix initialization if startup happens in interlaced mode [v2]

But that one neglected to fix up the ironlake+ path.

This should fix the issue reported by Alfonso Fiore where booting with
only a HDMI cable connected to his TV failed to display anything. The
issue is that the bios set up things for 1080i and used the pannel
fitter to scale up the lower progressive resolutions. We failed to
clear the interlace bit in the PIPEACONF register, resulting in havoc.

v2: Be more paranoid and just unconditionally clear the field before
setting new values.

Cc: Peter Ross 
Cc: Alfonso Fiore 
Signed-Off-by: Daniel Vetter 

Signed-off-by: Keith Packard

drm/i915: no lvds quirk for AOpen MP45

2012-02-08T17:20:49+00:00

According to a bug report, it doesn't have one.

Cc: stable@kernel.org
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=44263
Acked-by: Chris Wilson 
Signed-Off-by: Daniel Vetter 

Signed-off-by: Keith Packard

drm/i915: Force explicit bpp selection for intel_dp_link_required

2012-02-06T22:34:29+00:00

It is never correct to use intel_crtc->bpp in intel_dp_link_required,
so instead pass an explicit bpp in to this function. This patch
only supports 18bpp and 24bpp modes, which means that 10bpc modes will
be computed incorrectly. Fixing that will require more extensive
changes, and so must be addressed separately from this bugfix.

intel_dp_link_required is called from intel_dp_mode_valid and
intel_dp_mode_fixup.

* intel_dp_mode_valid is called to list supported modes; in this case,
  the current crtc values cannot be relevant as the modes in question
  may never be selected. Thus, using intel_crtc->bpp is never right.

* intel_dp_mode_fixup is called during mode setting, but it is run
  well before ironlake_crtc_mode_set is called to set intel_crtc->bpp,
  so using intel_crtc-bpp in this path can only ever get a stale
  value.

Cc: Lubos Kolouch 
Cc: Adam Jackson 
Cc: stable@vger.kernel.org
Reviewed-by: Daniel Vetter 
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=42263
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=44881
Tested-by: Dave Airlie 
Tested-by: camalot@picnicpark.org (Dell Latitude 6510)
Tested-by: Roland Dreier 
Signed-off-by: Keith Packard

drm/radeon: do not continue after error from r600_ib_test

2012-02-03T10:15:03+00:00

This return statement got dropped while fixing the conflicts introduced
in 7a7e8734ac3.

Reviewed-by: Alex Deucher 
Signed-off-by: Dave Airlie

drivers/gpu/drm/drm_ioc32.c: initialize all fields

2012-02-03T09:47:32+00:00

The c32 structure is allocated on the stack and its idx field is not
initialized before copying it to user level.  This patch takes the value
from the result of the ioctl, as done for the other fields.

Signed-off-by: Julia Lawall 
Signed-off-by: Dave Airlie

drm/radeon/kms/blit: fix blit copy for very large buffers

2012-02-02T15:54:48+00:00

Evergreen and NI blit copy was broken if the buffer maps to a rectangle
whose one dimension is 16384 (max dimension allowed by these chips).
In the mainline kernel, the problem is exposed only when buffers are
very large (1G), but it's still a problem. The problem could be exposed
for smaller buffers if anyone modifies the algorithm for rectangle
construction in r600_blit_create_rect() (the reason why someone would
modify that algorithm is to tune the performance of buffer moves).

The root cause was in i2f() function which only operated on range between
0 and 16383. Fix this by extending the range of i2f() function to 0 to
32767.

While at it improve the function so that the range can be easily
extended in the future (if it becomes necessary), cleanup lines
over 80 characters, and replace in-line comments with one strategic
comment that explains the crux of the function.

Credits to michel@daenzer.net for pointing out the root cause of
the bug.

v2: Fix I2F_MAX_INPUT constant definition goof and warn only once
    if input argument is out of range. Edit the comment a little
    bit to avoid some linguistic confusion and make it look better
    in general.

Signed-off-by: Ilija Hadzic 
Reviewed-by: Alex Deucher 
Reviewed-by: Michel Dänzer 
Signed-off-by: Dave Airlie