linux.git/drivers/gpu/drm/verisilicon, branch master Linux kernel source tree drm: verisilicon: make vs_dc_platform_driver static 2026-03-25T14:21:23+00:00 Icenowy Zheng zhengxingda@iscas.ac.cn 2026-03-24T06:08:06+00:00 e6fbe345b592731479dc2fa48b0b644820fba34e The platform_driver struct isn't export and is only used for module init/exit functions generated by module_platform_driver() macro. Make it static to prevent namespace pollution. Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202603180616.TM6qYvIY-lkp@intel.com/ Signed-off-by: Icenowy Zheng <zhengxingda@iscas.ac.cn> Reviewed-by: Thomas Zimmermann <tzimmermann@suse.de> Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Link: https://patch.msgid.link/20260324060806.2047121-1-zhengxingda@iscas.ac.cn 
The platform_driver struct isn't export and is only used for module
init/exit functions generated by module_platform_driver() macro.

Make it static to prevent namespace pollution.

Reported-by: kernel test robot <lkp@intel.com>
Closes: https://lore.kernel.org/oe-kbuild-all/202603180616.TM6qYvIY-lkp@intel.com/
Signed-off-by: Icenowy Zheng <zhengxingda@iscas.ac.cn>
Reviewed-by: Thomas Zimmermann <tzimmermann@suse.de>
Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
Link: https://patch.msgid.link/20260324060806.2047121-1-zhengxingda@iscas.ac.cn
drm: verisilicon: suppress snprintf warning for pixel clock name 2026-02-09T09:44:36+00:00 Icenowy Zheng zhengxingda@iscas.ac.cn 2026-02-07T01:32:55+00:00 f2edbafc6cb905caec2b231e8e2226b4c75daad9 Although it's generally expected that the pixel clock ID will only have one decimal digit, this isn't enforced in vs_dc.c source code, and the compiler will argue about the buffer being not long enough. Enlarge the snprintf() buffer for generating pixel clock name to be enough for a UINT_MAX pixel clock ID in order to suppress the compiler warning. Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202602060154.ONBYvM9m-lkp@intel.com/ Signed-off-by: Icenowy Zheng <zhengxingda@iscas.ac.cn> Reviewed-by: Thomas Zimmermann <tzimmermann@suse.de> Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Link: https://patch.msgid.link/20260207013255.2075294-1-zhengxingda@iscas.ac.cn 
Although it's generally expected that the pixel clock ID will only have
one decimal digit, this isn't enforced in vs_dc.c source code, and the
compiler will argue about the buffer being not long enough.

Enlarge the snprintf() buffer for generating pixel clock name to be
enough for a UINT_MAX pixel clock ID in order to suppress the compiler
warning.

Reported-by: kernel test robot <lkp@intel.com>
Closes: https://lore.kernel.org/oe-kbuild-all/202602060154.ONBYvM9m-lkp@intel.com/
Signed-off-by: Icenowy Zheng <zhengxingda@iscas.ac.cn>
Reviewed-by: Thomas Zimmermann <tzimmermann@suse.de>
Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
Link: https://patch.msgid.link/20260207013255.2075294-1-zhengxingda@iscas.ac.cn
drm: verisilicon: add a driver for Verisilicon display controllers 2026-02-05T08:50:28+00:00 Icenowy Zheng uwu@icenowy.me 2026-01-29T02:39:17+00:00 dbf21777caa8b8c88c12f7f036b01208fec0d55a This is a from-scratch driver targeting Verisilicon DC-series display controllers, which feature self-identification functionality like their GC-series GPUs. Only DC8200 is being supported now, and only the main framebuffer is set up (as the DRM primary plane). Support for more DC models and more features is my further targets. As the display controller is delivered to SoC vendors as a whole part, this driver does not use component framework and extra bridges inside a SoC is expected to be implemented as dedicated bridges (this driver properly supports bridge chaining). Signed-off-by: Icenowy Zheng <uwu@icenowy.me> Signed-off-by: Icenowy Zheng <zhengxingda@iscas.ac.cn> Tested-by: Han Gao <gaohan@iscas.ac.cn> Tested-by: Michal Wilczynski <m.wilczynski@samsung.com> Reviewed-by: Thomas Zimmermann <tzimmermann@suse.de> Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Link: https://patch.msgid.link/20260129023922.1527729-4-zhengxingda@iscas.ac.cn 
This is a from-scratch driver targeting Verisilicon DC-series display
controllers, which feature self-identification functionality like their
GC-series GPUs.

Only DC8200 is being supported now, and only the main framebuffer is set
up (as the DRM primary plane). Support for more DC models and more
features is my further targets.

As the display controller is delivered to SoC vendors as a whole part,
this driver does not use component framework and extra bridges inside a
SoC is expected to be implemented as dedicated bridges (this driver
properly supports bridge chaining).

Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
Signed-off-by: Icenowy Zheng <zhengxingda@iscas.ac.cn>
Tested-by: Han Gao <gaohan@iscas.ac.cn>
Tested-by: Michal Wilczynski <m.wilczynski@samsung.com>
Reviewed-by: Thomas Zimmermann <tzimmermann@suse.de>
Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
Link: https://patch.msgid.link/20260129023922.1527729-4-zhengxingda@iscas.ac.cn