linux.git/drivers/gpu/drm/msm/msm_gpu.h, branch v5.8

Merge tag 'drm-next-msm-5.8-2020-06-08' of git://anongit.freedesktop.org/drm/drm

2020-06-08T18:33:38+00:00

Pull drm msm updates from Dave Airlie:
 "This tree has been in next for a couple of weeks, but Rob missed an
  arm32 build issue, so I was awaiting the tree with a patch reverted.

   - new gpu support: a405, a640, a650

   - dpu: color processing support

   - mdp5: support for msm8x36 (the thing with a405)

   - some prep work for per-context pagetables (ie the part that does
     not depend on in-flight iommu patches)

   - last but not least, UABI update for submit ioctl to support syncobj
     (from Bas)"

* tag 'drm-next-msm-5.8-2020-06-08' of git://anongit.freedesktop.org/drm/drm: (30 commits)
  Revert "drm/msm/dpu: add support for clk and bw scaling for display"
  drm/msm/a6xx: skip HFI set freq if GMU is powered down
  drm/msm: Update the MMU helper function APIs
  drm/msm: Refactor address space initialization
  drm/msm: Attach the IOMMU device during initialization
  drm/msm/dpu: dpu_setup_dspp_pcc() can be static
  drm/msm/a6xx: a6xx_hfi_send_start() can be static
  drm/msm/a4xx: add a405_registers for a405 device
  drm/msm/a4xx: add adreno a405 support
  drm/msm/a6xx: update a6xx_hw_init for A640 and A650
  drm/msm/a6xx: enable GMU log
  drm/msm/a6xx: update pdc/rscc GMU registers for A640/A650
  drm/msm/a6xx: A640/A650 GMU firmware path
  drm/msm/a6xx: HFI v2 for A640 and A650
  drm/msm/a6xx: add A640/A650 to gpulist
  drm/msm/a6xx: use msm_gem for GMU memory objects
  drm/msm: add internal MSM_BO_MAP_PRIV flag
  drm/msm: add msm_gem_get_and_pin_iova_range
  drm/msm: Check for powered down HW in the devfreq callbacks
  drm/msm/dpu: update bandwidth threshold check
  ...

drm/msm: Refactor address space initialization

2020-05-23T20:38:16+00:00

Refactor how address space initialization works. Instead of having the
address space function create the MMU object (and thus require separate but
equal functions for gpummu and iommu) use a single function and pass the
MMU struct in. Make the generic code cleaner by using target specific
functions to create the address space so a2xx can do its own thing in its
own space.  For all the other targets use a generic helper to initialize
IOMMU but leave the door open for newer targets to use customization
if they need it.

Reviewed-by: Rob Clark 
Signed-off-by: Jordan Crouse 
Tested-by: Shawn Guo 
[squash in rebase fixups]
Signed-off-by: Rob Clark

drm: convert .debugfs_init() hook to return void.

2020-03-18T16:53:28+00:00

As a result of commit 987d65d01356 (drm: debugfs: make
drm_debugfs_create_files() never fail) and changes to various debugfs
functions in drm/core and across various drivers, there is no need for
the drm_driver.debugfs_init() hook to have a return value. Therefore,
declare it as void.

This also includes refactoring all users of the .debugfs_init() hook to
return void across the subsystem.

v2: include changes to the hook and drivers that use it in one patch to
prevent driver breakage and enable individual successful compilation of
this change.

References: https://lists.freedesktop.org/archives/dri-devel/2020-February/257183.html
Signed-off-by: Wambui Karuga 
Reviewed-by: Greg Kroah-Hartman 
Signed-off-by: Daniel Vetter 
Link: https://patchwork.freedesktop.org/patch/msgid/20200310133121.27913-18-wambui.karugax@gmail.com

drm/msm/gpu: add support for ocmem interconnect path

2020-01-02T22:20:42+00:00

Some A3xx and all A4xx Adreno GPUs do not have GMEM inside the GPU core
and must use the On Chip MEMory (OCMEM) in order to be functional.
There's a separate interconnect path that needs to be setup to OCMEM.
Add support for this second path to the GPU core.

In the downstream MSM 3.4 sources, the two interconnect paths for the
GPU are between:

  - MSM_BUS_MASTER_GRAPHICS_3D and MSM_BUS_SLAVE_EBI_CH0
  - MSM_BUS_MASTER_V_OCMEM_GFX3D and MSM_BUS_SLAVE_OCMEM

Signed-off-by: Brian Masney 
Reviewed-by: Bjorn Andersson 
Signed-off-by: Rob Clark

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 234

2019-06-19T15:09:07+00:00

Based on 1 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license version 2 as
  published by the free software foundation this program is
  distributed in the hope that it will be useful but without any
  warranty without even the implied warranty of merchantability or
  fitness for a particular purpose see the gnu general public license
  for more details you should have received a copy of the gnu general
  public license along with this program if not see http www gnu org
  licenses

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 503 file(s).

Signed-off-by: Thomas Gleixner 
Reviewed-by: Alexios Zavras 
Reviewed-by: Allison Randal 
Reviewed-by: Enrico Weigelt 
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190602204653.811534538@linutronix.de
Signed-off-by: Greg Kroah-Hartman

drm/msm: add param to retrieve # of GPU faults (global)

2019-04-19T18:50:00+00:00

For KHR_robustness, userspace wants to know two things, the count of GPU
faults globally, and the count of faults attributed to a given context.
This patch providees the former, and the next patch provides the latter.

Signed-off-by: Rob Clark 
Reviewed-by: Jordan Crouse

drm/msm/a6xx: Add support for an interconnect path

2019-02-19T13:50:12+00:00

Try to get the interconnect path for the GPU and vote for the maximum
bandwidth to support all frequencies. This is needed for performance.
Later we will want to scale the bandwidth based on the frequency to
also optimize for power but that will require some device tree
infrastructure that does not yet exist.

v6: use icc_set_bw() instead of icc_set()
v5: Remove hardcoded interconnect name and just use the default
v4: Don't use a port string at all to skip the need for names in the DT
v3: Use macros and change port string per Georgi Djakov

Signed-off-by: Jordan Crouse 
Acked-by: Rob Clark 
Reviewed-by: Evan Green 
Signed-off-by: Georgi Djakov 
Signed-off-by: Greg Kroah-Hartman

drm/msm/gpu: Remove hardcoded interrupt name

2019-01-24T20:36:32+00:00

Every GPU core only has one interrupt so there isn't any
value in looking up the interrupt by name. Remove the name (which
is legacy anyway) and use platform_get_irq() instead.

Signed-off-by: Jordan Crouse 
Reviewed-by: Douglas Anderson 
Signed-off-by: Rob Clark

drm/msm/gpu: fix building without debugfs

2019-01-24T20:36:24+00:00

When debugfs is disabled, but coredump is turned on, the adreno driver fails to build:

drivers/gpu/drm/msm/adreno/a3xx_gpu.c:460:4: error: 'struct msm_gpu_funcs' has no member named 'show'
   .show = adreno_show,
    ^~~~
drivers/gpu/drm/msm/adreno/a3xx_gpu.c:460:11: note: (near initialization for 'funcs.base')
drivers/gpu/drm/msm/adreno/a3xx_gpu.c:460:11: error: initialization of 'void (*)(struct msm_gpu *, struct msm_gem_submit *, struct msm_file_private *)' from incompatible pointer type 'void (*)(struct msm_gpu *, struct msm_gpu_state *, struct drm_printer *)' [-Werror=incompatible-pointer-types]
drivers/gpu/drm/msm/adreno/a3xx_gpu.c:460:11: note: (near initialization for 'funcs.base.submit')
drivers/gpu/drm/msm/adreno/a4xx_gpu.c:546:4: error: 'struct msm_gpu_funcs' has no member named 'show'
drivers/gpu/drm/msm/adreno/a5xx_gpu.c:1460:4: error: 'struct msm_gpu_funcs' has no member named 'show'
drivers/gpu/drm/msm/adreno/a6xx_gpu.c:769:4: error: 'struct msm_gpu_funcs' has no member named 'show'
drivers/gpu/drm/msm/msm_gpu.c: In function 'msm_gpu_devcoredump_read':
drivers/gpu/drm/msm/msm_gpu.c:289:12: error: 'const struct msm_gpu_funcs' has no member named 'show'

Adjust the #ifdef to make it build again.

Fixes: c0fec7f562ec ("drm/msm/gpu: Capture the GPU state on a GPU hang")
Signed-off-by: Arnd Bergmann 
Signed-off-by: Rob Clark

drm/msm: Optimize adreno_show_object()

2018-12-11T18:07:03+00:00

When the userspace tries to read the crashstate dump, the read side
implementation in the driver currently ascii85 encodes all the binary
buffers and it does this each time the read system call is called.
A userspace tool like cat typically does a page by page read and the
number of read calls depends on the size of the data captured by the
driver. This is certainly not desirable and does not scale well with
large captures.

This patch encodes the buffer only once in the read path. With this there
is an immediate >10X speed improvement in crashstate save time.

Signed-off-by: Sharat Masetty 
Reviewed-by: Jordan Crouse 
Signed-off-by: Rob Clark