linux.git/drivers/gpu/drm/amd, branch v4.7-rc6 Linux kernel source tree drm/amd/powerplay: workaround for UVD clock issue 2016-06-29T16:12:26+00:00 Rex Zhu Rex.Zhu@amd.com 2016-06-28T08:22:07+00:00 a7f14a184e0e8e94becfc3f9608f6b0f9c339572 workaround issue that when uvd dpm disabled, uvd clock remain high on polaris10. Manually turn off the clocks. Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Ken Wang <Qingqing.Wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
workaround issue that when uvd dpm disabled,
uvd clock remain high on polaris10. Manually turn
off the clocks.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: add ACLK_CNTL setting for polaris10 2016-06-29T16:10:31+00:00 Ken Wang Qingqing.Wang@amd.com 2016-06-28T05:28:50+00:00 d9d533c1483c4daf76e7e720c35896a430563ff8 This is a temporary workaround for early boards. Signed-off-by: Ken Wang <Qingqing.Wang@amd.com> Reviewed-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
This is a temporary workaround for early boards.

Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/powerplay: fix issue uvd dpm can't enabled on Polaris11. 2016-06-29T16:10:02+00:00 Rex Zhu Rex.Zhu@amd.com 2016-06-27T09:30:24+00:00 0636e0d666e0238fa22348172c20a49f42a94395 1. Populate correct value of VDDCI voltage for SMC SAMU, VCE, and UVD levels depending on whether VDDCi control is SVI2 or GPIO. 2. Populate SMC ACPI minimum voltage using VBIOS boot SCLK and MCLK When static voltage is configured as VDDCI, driver still tries to program a voltage for MM minVoltage using VDDC-VDDCI delta requirement. minVoltage should be set as boot up voltage. Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
1. Populate correct value of VDDCI voltage for SMC SAMU, VCE,
   and UVD levels depending on whether VDDCi control is SVI2 or GPIO.
2. Populate SMC ACPI minimum voltage using VBIOS boot SCLK and MCLK

When static voltage is configured as VDDCI, driver still tries to program
a voltage for MM minVoltage using VDDC-VDDCI delta requirement.
minVoltage should be set as boot up voltage.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/powerplay: Workaround for Memory EDC Error on Polaris10. 2016-06-29T16:09:27+00:00 Rex Zhu Rex.Zhu@amd.com 2016-06-27T06:46:47+00:00 3a8bd717ee3e0508fc0dd517b97e950989e15f8c Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/powerplay: Update CKS on/ CKS off voltage offset calculation 2016-06-23T18:15:10+00:00 Rex Zhu Rex.Zhu@amd.com 2016-06-22T13:00:09+00:00 0812a945fbb814e7946fbe6ddcc81d054c8b6c91 CKS on/off voltage offset calculation algorithm takes in a few coefficients. We need to update them for polaris to latest coefficients to align with BB. Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
CKS on/off voltage offset calculation algorithm takes in a few coefficients.
We need to update them for polaris to latest coefficients to align with BB.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/powerplay: disable FFC. 2016-06-23T18:14:30+00:00 Rex Zhu Rex.Zhu@amd.com 2016-06-23T03:05:00+00:00 83a7af6dcfd2d84066c6d19bf2bd837f7be4a5ca SMC need use VBI signal for MCLK switching Send 2 x frame time as vbi timeout Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
SMC need use VBI signal for MCLK switching
Send 2 x frame time as vbi timeout

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/powerplay: add some definition for FFC feature on polaris. 2016-06-23T18:14:12+00:00 Rex Zhu Rex.Zhu@amd.com 2016-06-23T02:58:26+00:00 02bae045f3b3bc5681f075be0a8b1313147d1df2 Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/powerplay: enable clock stretch feature for polaris 2016-06-21T14:22:42+00:00 Rex Zhu Rex.Zhu@amd.com 2016-06-07T10:39:06+00:00 270d013659ddab52a6fd0eacae452c422d08aa39 Power saving feature which reduces the amount of voltage needed for specific engine clocks. Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
Power saving feature which reduces the amount of
voltage needed for specific engine clocks.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu/gfx8: update golden setting for polaris10 2016-06-21T14:22:42+00:00 Rex Zhu Rex.Zhu@amd.com 2016-06-07T06:09:56+00:00 92d1576859577b94eafaea9b64f78ab99fe20a78 Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/powerplay: enable avfs feature for polaris 2016-06-21T14:22:41+00:00 Rex Zhu Rex.Zhu@amd.com 2016-06-08T11:39:42+00:00 432c3a3ca794bd2301425cb58bf097fc26690c17 avfs feature is for voltage control based on gpu system clock on polaris10 Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
avfs feature is for voltage control based on
gpu system clock on polaris10

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>