linux.git/drivers/gpu/drm/amd, branch v4.20-rc4

drm/amdgpu: Enable HDP memory light sleep

2018-11-20T19:40:15+00:00

Due to the register name and setting change of HDP
memory light sleep on Vega20,change accordingly in
the driver.

Signed-off-by: Kenneth Feng 
Reviewed-by: Evan Quan 
Signed-off-by: Alex Deucher

drm/amd/pp: handle negative values when reading OD

2018-11-19T21:07:58+00:00

Reading the sysfs files pp_sclk_od and pp_mclk_od return the
percentage difference between the VBIOS-provided default
frequency and the current (possibly user-set) frequency in
the highest SCLK and MCLK DPM states, respectively.

Writing to these files provides an easy mechanism for
setting a higher-than-default maximum frequency. We
normally only allow values >= 0 to be written here.

However, with the addition of pp_od_clk_voltage, we now
allow users to set custom DPM tables. If they then set
the maximum DPM state to something less than the default,
later reads of pp_*_od should return a negative value.
The highest DPM state is now less than the VBIOS-provided
default, so the percentage is negative.

The math to calculate this was originally performed with
unsigned values, meaning reads that should return negative
values returned meaningless data. This patch corrects that
issue and normalizes how all of the calculations are done
across the various hwmgr types.

Acked-by: Alex Deucher 
Signed-off-by: Joseph Greathouse 
Signed-off-by: Alex Deucher

drm/amdgpu: Add missing firmware entry for HAINAN

2018-11-19T21:07:31+00:00

Due to lack of MODULE_FIRMWARE() with hainan_mc.bin, the driver
doesn't work properly in initrd.  Let's add it.

Bugzilla: https://bugzilla.suse.com/show_bug.cgi?id=1116239
Fixes: 8eaf2b1faaf4 ("drm/amdgpu: switch firmware path for SI parts")
Cc: 
Reviewed-by: Christian König 
Signed-off-by: Takashi Iwai 
Signed-off-by: Alex Deucher

drm/amd/powerplay: disable Vega20 DS related features

2018-11-19T21:07:15+00:00

Disable these features on Vega20 for now.

Signed-off-by: Evan Quan 
Acked-by: Feifei Xu
Signed-off-by: Alex Deucher

drm/amdgpu: Fix oops when pp_funcs->switch_power_profile is unset

2018-11-19T21:05:52+00:00

On Vega20 and other pre-production GPUs, powerplay is not enabled yet.
Check for NULL pointers before calling pp_funcs function pointers.

Also affects Kaveri.

CC: Joerg Roedel 
Signed-off-by: Felix Kuehling 
Reviewed-by: Alex Deucher 
Tested-by: Joerg Roedel 
Signed-off-by: Alex Deucher 
Cc: stable@vger.kernel.org

drm/amd/display: Support amdgpu "max bpc" connector property (v2)

2018-11-15T22:48:31+00:00

[Why]
Many panels support more than 8bpc but some modes are unavailable while
running at greater than 8bpc due to DP/HDMI bandwidth constraints.

Support for more than 8bpc was added recently in the driver but it
defaults to the maximum supported bpc - locking out these modes.

This should be a user configurable option such that the user can select
what bpc configuration they would like.

[How]
This patch adds support for getting and setting the amdgpu driver
specific "max bpc" property on the connector.

It also adds support for limiting the output bpc based on the property
value. The default limitation is the lowest value in the range, 8bpc.
This was the old value before the range was uncapped.

This patch should be updated/replaced later once common drm support
for max bpc lands.

Bugzilla: https://bugs.freedesktop.org/108542
Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=201585
Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=200645
Fixes: e03fd3f300f6 ("drm/amd/display: Do not limit color depth to 8bpc")

v2: rebase on upstream (Alex)

Signed-off-by: Nicholas Kazlauskas 
Acked-by: Alex Deucher 
Reviewed-by: Harry Wentland 
Signed-off-by: Alex Deucher

drm/amdgpu: Add amdgpu "max bpc" connector property (v2)

2018-11-15T22:48:15+00:00

[Why]
Many panels support more than 8bpc but some modes are unavailable while
running at greater than 8bpc due to DP/HDMI bandwidth constraints.

Support for more than 8bpc was added recently in the driver but it
defaults to the maximum supported bpc - locking out these modes.

This should be a user configurable option such that the user can select
what bpc configuration they would like.

[How]
This patch introduces the "max bpc" amdgpu driver specific connector
property so the user can limit the maximum bpc. It ranges from 8 to 16.

This doesn't directly set the preferred bpc for the panel since it
follows Intel's existing driver conventions.

This proprety should be removed once common drm support for max bpc
lands.

v2: rebase on upstream (Alex)

Signed-off-by: Nicholas Kazlauskas 
Acked-by: Alex Deucher 
Reviewed-by: Harry Wentland 
Signed-off-by: Alex Deucher

drm/amdgpu: fix huge page handling on Vega10

2018-11-13T15:21:00+00:00

We accidentially set the huge flag on the parent instead of the childs.
This caused some VM faults under memory pressure.

Signed-off-by: Christian König 
Acked-by: Alex Deucher 
Tested-by: Samuel Pitoiset 
Reviewed-by: Felix Kuehling 
Signed-off-by: Alex Deucher 
Cc: stable@vger.kernel.org

drm/amd/pp: Fix truncated clock value when set watermark

2018-11-13T15:20:41+00:00

the clk value should be tranferred to MHz first and
then transfer to uint16. otherwise, the clock value
will be truncated.

Reviewed-by: Alex Deucher 
Reported-by: Hersen Wu 
Signed-off-by: Rex Zhu 
Signed-off-by: Alex Deucher 
Cc: stable@vger.kernel.org

drm/amdgpu: fix bug with IH ring setup

2018-11-13T14:38:28+00:00

The bug limits the IH ring wptr address to 40bit. When the system memory
is bigger than 1TB, the bus address is more than 40bit, this causes the
interrupt cannot be handled and cleared correctly.

Reviewed-by: Christian König 
Signed-off-by: Philip Yang 
Reviewed-by: Alex Deucher 
Signed-off-by: Alex Deucher