linux.git/drivers/gpu/drm/amd/ras, branch master

treewide: refresh kmalloc_obj() conversions

2026-09-05T04:37:00+00:00

This is another run of the Coccinelle script for converting kmalloc()
family of allocations to kmalloc_obj() via the existing rules in
scripts/coccinelle/api/kmalloc_objs.cocci

This catches both the set of kmalloc() uses added since the first
kmalloc_obj() conversions in v7.0 and adds a large group missed in the
first pass due to Coccinelle not interacting well with the cleanup.h
scoped_...() family of macros[1]. I worked around this with spatch's
"--macro-file" argument to a file with all the scoped_...() macros mapped
to Coccinelle's YACFE_ITERATOR[2] as that was the closest viable control
flow indicator I could find.

Build tested allmodconfig on x86, arm64, arm, loongarch, mips, powerpc,
riscv, and s390 with no new warnings.

Link: https://lore.kernel.org/lkml/202609021314.8A9C0B8@keescook/ [1]
Link: https://github.com/coccinelle/coccinelle/blob/master/standard.h [2]
Signed-off-by: Kees Cook

drm/amd/ras: Handle the lack of mca address case for uniras

2026-08-06T16:46:23+00:00

For specific old eeprom data, mca address is not stored, get mca
address from physical address(pa) and then convert it into pa in
current nps mode.
Also set cur_nps early so the record carries the target nps even
when the conversion returns early.

Signed-off-by: Tao Zhou 
Reviewed-by: Hawking Zhang 
Signed-off-by: Alex Deucher

drm/amd/ras: add get_die_id for uniras umc v12

2026-08-06T16:46:18+00:00

For legacy ras eeprom format(only existed on nps1 system), die id
(node instance) is not stored, we get it from mca address and
physical address (pa) here, and now we can calculate pa in any
nps mode for legacy ras eeprom data as well.
It only applies to num_umc == 16 / UMC_VRAM_TYPE_HBM parts.

Also factor out __ras_umc_eeprom_rec2nps_addr() so the die id can
be passed in.

Signed-off-by: Tao Zhou 
Reviewed-by: Hawking Zhang 
Signed-off-by: Alex Deucher

drm/amd/ras: track debug mode for query mode

2026-08-06T16:45:50+00:00

The RAS manager uses the rascore debug mode setting to control whether
MCA data is read directly or collected through PMFW MCA polling and
ClearMcaOnRead. Track that debug mode state in ras_mgr so
amdgpu_ras_get_error_query_mode() can classify queries as direct or
firmware-backed.

Limit the PMFW polling wait in recovery to firmware-backed MODE1 fatal
recovery so other reset paths, such as MODE2, do not pay the delay
unnecessarily.

Signed-off-by: Xiang Liu 
Reviewed-by: Hawking Zhang 
Signed-off-by: Alex Deucher

drm/amd/ras: move some umc v12 specific functions to ras_umc.c

2026-08-06T16:44:36+00:00

So we can reuse these functions across different ASICs.
In order to simplify code, rename some functions as well.

Signed-off-by: Tao Zhou 
Reviewed-by: Hawking Zhang 
Signed-off-by: Alex Deucher

drm/amd/ras: rename core ras_* files and update include guards

2026-08-06T13:25:58+00:00

Rename selected RAS core source and header filenames to drop
redundant ras_ prefixes in file names only.

Update related build object names, header include references, and
include guard macros in renamed headers.

Function/type prefixes and runtime behavior are unchanged.

No functional change intended.

Signed-off-by: YiPeng Chai 
Reviewed-by: Hawking Zhang 
Signed-off-by: Alex Deucher

drm/amd/ras: rename rascore directory to core

2026-08-06T13:25:11+00:00

Rename the RAS core directory from rascore to core and update
build-path references accordingly.

The change is mechanical and done with git rename semantics so
history tracking is preserved.

No functional change intended.

Signed-off-by: YiPeng Chai 
Reviewed-by: Hawking Zhang 
Signed-off-by: Alex Deucher

drm/amd/ras: add device lost check to early exit psp cmd wait loop

2026-07-28T23:17:32+00:00

Add device lost status check in PSP fence wait loop to exit
polling early when GPU device lost

Signed-off-by: Ce Sun 
Reviewed-by: Lijo Lazar 
Signed-off-by: Alex Deucher

drm/amdgpu/ras: use vram_base_offset for UMC inject address

2026-07-28T23:17:31+00:00

Cover both XGMI hive offset and A+A platform MC FB offset in one calculation.

Signed-off-by: Stanley.Yang 
Reviewed-by: Tao Zhou 
Signed-off-by: Alex Deucher

drm/amd/ras: detect old ras eeprom format

2026-07-28T22:52:39+00:00

Handler of some formats will be implemented in the future.

UMC_CHANNEL_IDX_V2 is a flag to indicate v2 format channel index stored
in eeprom, the flag was retired in v3 and save_nps is introduced in v3,
so they have no conflict.

eeprom format v1: store channel index within a umc instance in eeprom
    range in UMC v12: 0 ~ 7
eeprom format v2: store global channel index in eeprom
    range in UMC v12: 0 ~ 127

v2: change the bit range of save_nps from [40:47] to [40:46],
    UMC_CHANNEL_IDX_V2 use bit 47.

    use RAS_DEV_WARN_RATELIMITED for retire record check, avoid log
    noise.

Signed-off-by: Tao Zhou 
Reviewed-by: Hawking Zhang 
Signed-off-by: Alex Deucher