linux.git/drivers/gpu/drm/amd/pm, branch v7.1-rc4

drm/amdgpu/pm: align Hawaii mclk workaround with radeon

2026-05-05T14:15:11+00:00

Align the hawaii mclk workaround with radeon and windows.

Link: https://gitlab.freedesktop.org/drm/amd/-/work_items/1816
Fixes: 9f4b35411cfe ("drm/amd/powerplay: add CI asics support to smumgr (v3)")
Reviewed-by: Timur Kristóf 
Reviewed-by: Kent Russell 
Signed-off-by: Alex Deucher 
(cherry picked from commit 9649528b637f668c5af9f2b83ca4ad8576ae2121)
Cc: stable@vger.kernel.org

drm/amdgpu/pm: add missing revision check for CI

2026-05-05T14:14:52+00:00

The ci_populate_all_memory_levels() workaround only
applies to revision 0 SKUs.

Link: https://gitlab.freedesktop.org/drm/amd/-/work_items/1816
Fixes: 9f4b35411cfe ("drm/amd/powerplay: add CI asics support to smumgr (v3)")
Reviewed-by: Timur Kristóf 
Reviewed-by: Kent Russell 
Signed-off-by: Alex Deucher 
(cherry picked from commit 1db15ba8f72f400bbad8ae0ce24fafc43429d4bd)
Cc: stable@vger.kernel.org

drm/amd/pm: Add fine grained flag to SMU v13.0.6

2026-04-28T19:51:18+00:00

Gfx clock is fine grained on SMU v13.0.6/12 SOCs. Add the flag to report
clock frequencies correctly.

Fixes: 7380228401c4 ("drm/amd/pm: Use generic dpm table for SMUv13 SOCs")
Signed-off-by: Lijo Lazar 
Reviewed-by: Asad Kamal 
Signed-off-by: Alex Deucher 
(cherry picked from commit d4871d837bbf70173f63426a84fa80b39e408b9e)

drm/amd/pm: Update emit clock logic

2026-04-28T19:46:30+00:00

If only one level is enabled in clock table, there is no need to
follow the fine grained clock logic which expects a minimum of
two levels (min/max).

Signed-off-by: Lijo Lazar 
Reviewed-by: Asad Kamal 
Signed-off-by: Alex Deucher 
(cherry picked from commit 7f19097af1496dd908a044ca95862f32d05f02df)

drm/amd/pm: fix missing fine-grained dpm table flag on aldebaran

2026-04-24T15:09:43+00:00

Add the missing SMU_DPM_TABLE_FINE_GRAINED flag to aldebaran DPM table.
This fixes the pp_dpm_sclk node issue caused by missing flag configuration.

Fixes: 7ea1c722fe1d ("drm/amd/pm: Use common helper for aldebaran dpm table")
Signed-off-by: Yang Wang 
Reviewed-by: Hawking Zhang 
Signed-off-by: Alex Deucher 
(cherry picked from commit 3427dea3a48ebddb491a26093f3627384b3cb2c2)

drm/amd/pm: add od table upload error message parsing for smu v14.0.x

2026-04-17T18:53:02+00:00

parse and print detailed reasons for od table upload failures to
help users understand error causes.

example:
$ echo "0 30 40" | sudo tee fan_curve
$ echo "1 40 30" | sudo tee fan_curve
$ echo "c" | sudo tee fan_curve

kernel log:
[   75.040174] amdgpu 0000:0a:00.0: Failed to upload overdrive table, ret:-5
[   75.040178] amdgpu 0000:0a:00.0: Invalid overdrive table content: OD_FAN_CURVE_PWM_ERROR (13)
[   75.040181] amdgpu 0000:0a:00.0: Failed to upload overdrive table!

Signed-off-by: Yang Wang 
Reviewed-by: Lijo Lazar 
Signed-off-by: Alex Deucher

drm/amd/pm: add read arg support to smu_cmn_update_table

2026-04-17T18:52:47+00:00

Extend the smu_cmn_update_table function to support reading a 32-bit return
argument from the SMU firmware during table transfer operations.

- Rename the original function to smu_cmn_update_table_read_arg
- Add a uint32_t *read_arg output parameter to capture firmware response
- Pass the read_arg pointer to the SMU message command
- Keep full backward compatibility using a macro wrapper for the old API

This allows the driver to retrieve status codes, results, or configuration
feedback from the SMU firmware after table data transfer.

No functional changes for existing users of the original smu_cmn_update_table()
API.

Signed-off-by: Yang Wang 
Reviewed-by: Lijo Lazar 
Signed-off-by: Alex Deucher

drm/amd/pm: fix runtime PM imbalance issue in amdgpu_pm.c

2026-04-17T18:51:15+00:00

Fix runtime PM counter imbalance to prevent device from failing to enter low power state

Fixes: a50d32c41fb2 ("drm/amd/pm: Deprecate print_clock_levels interface")
Signed-off-by: Yang Wang 
Reviewed-by: Lijo Lazar 
Signed-off-by: Alex Deucher

drm/amd/pm: Fix mode2 reset ACK handling on aldebaran v2

2026-04-17T18:50:26+00:00

aldebaran_mode2_reset() sends a mode2 reset message and waits for
an acknowledgment from the SMU.

The current ACK handling is incorrect.

The wait loop runs only when ret is -ETIME. But after a successful
async send, ret is 0. Because of this, the loop is skipped and the
code does not wait for the reset acknowledgment.

Also, the code checks for ret != 1 after calling
smu_msg_wait_response(). However, smu_msg_wait_response() returns
0 on success and negative error codes on failure. So checking
against 1 is wrong.

Return -EOPNOTSUPP when the firmware does not support this reset
message.

Fix this by setting ret to -ETIME before entering the wait loop,
checking for ret != 0 after getting the SMU response, and returning
-EOPNOTSUPP when the firmware does not support the message.

v2:
- Update ACK check to use ret != 0 instead of ret != 1, since
  smu_msg_wait_response() returns 0 on success (Feifei)
- Remove unnecessary handling for ret == 0

Fixes: e42569d02acb ("drm/amd/pm: Modify mode2 msg sequence on aldebaran")
Reported-by: Dan Carpenter 
Cc: Feifei Xu 
Cc: Lijo Lazar 
Cc: Hawking Zhang 
Cc: Alex Deucher 
Cc: Christian König 
Signed-off-by: Srinivasan Shanmugam 
Reviewed-by: Feifei Xu 
Signed-off-by: Alex Deucher

drm/amd/pm: smu7: Remove stale error check in smu7_hwmgr_backend_init

2026-04-17T18:49:54+00:00

smu7_hwmgr_backend_init() is responsible for initializing the SMU7 power
management backend. It allocates and sets up the backend structure,
initializes voltage tables, configures dependency tables, and prepares
platform-specific power and clock parameters.

The function follows a typical pattern where each initialization step
returns a status in "result", and failures are handled via a common
"goto fail" path that performs cleanup.

Commit 2c21648bb814 ("drm/amd/pm/smu7: Remove non-functional SMU7
voltage dependency on DAL") removed a function call in this
initialization sequence, but left behind the corresponding error check.

As a result, "result" is checked twice without being updated in between:

    result = smu7_init_voltage_dependency_on_display_clock_table(hwmgr);
    if (result)
        goto fail;

    ...

    if (result)
        goto fail;

The second check is redundant and unreachable for any new failure, since
no operation modifies "result" between the two checks. This triggers a
Smatch warning about a duplicate zero check and reduces code clarity.

Remove the stale error check to keep the control flow correct and
readable.

Fixes: 9f49e3d4cb86 ("drm/amd/pm/smu7: Remove non-functional SMU7 voltage dependency on DAL")
Reported-by: Dan Carpenter 
Cc: Timur Kristóf 
Cc: Christian König 
Cc: Alex Deucher 
Signed-off-by: Srinivasan Shanmugam 
Reviewed-by: Timur Kristóf 
Signed-off-by: Alex Deucher