<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux.git/drivers/gpu/drm/amd/pm, branch v6.6-rc2</title>
<subtitle>Linux kernel source tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/'/>
<entry>
<title>drm/amdgpu: fix retry loop test</title>
<updated>2023-09-11T22:19:03+00:00</updated>
<author>
<name>Dan Carpenter</name>
<email>dan.carpenter@linaro.org</email>
</author>
<published>2023-09-06T10:54:38+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=81cc8779cf46d6323c83475706b61d9552230274'/>
<id>81cc8779cf46d6323c83475706b61d9552230274</id>
<content type='text'>
This loop will exit with "retry" set to -1 if it fails but the code
checks for if "retry" is zero.  Fix this by changing post-op to a
pre-op.  --retry vs retry--.

Fixes: e01eeffc3f86 ("drm/amd/pm: avoid driver getting empty metrics table for the first time")
Reviewed-by: Evan Quan &lt;evan.quan@amd.com&gt;
Signed-off-by: Dan Carpenter &lt;dan.carpenter@linaro.org&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This loop will exit with "retry" set to -1 if it fails but the code
checks for if "retry" is zero.  Fix this by changing post-op to a
pre-op.  --retry vs retry--.

Fixes: e01eeffc3f86 ("drm/amd/pm: avoid driver getting empty metrics table for the first time")
Reviewed-by: Evan Quan &lt;evan.quan@amd.com&gt;
Signed-off-by: Dan Carpenter &lt;dan.carpenter@linaro.org&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amdgpu: Add SMU v13.0.6 default reset methods</title>
<updated>2023-08-31T22:05:43+00:00</updated>
<author>
<name>Lijo Lazar</name>
<email>lijo.lazar@amd.com</email>
</author>
<published>2023-07-19T08:01:47+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=05347402d1c1e52924786cd0c0326080c33e00dc'/>
<id>05347402d1c1e52924786cd0c0326080c33e00dc</id>
<content type='text'>
For APUs with SMU v13.0.6, mode-2 reset is kept as default and for
others mode-1 is the default reset method.

Signed-off-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Reviewed-by: Asad Kamal &lt;asad.kamal@amd.com&gt;
Tested-by: Asad Kamal &lt;asad.kamal@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
For APUs with SMU v13.0.6, mode-2 reset is kept as default and for
others mode-1 is the default reset method.

Signed-off-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Reviewed-by: Asad Kamal &lt;asad.kamal@amd.com&gt;
Tested-by: Asad Kamal &lt;asad.kamal@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amd/pm: fix debugfs pm_info output</title>
<updated>2023-08-31T22:02:30+00:00</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2023-08-18T19:18:07+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=a7dd9b97fd5b12549721bbdc7977b5671870f4bb'/>
<id>a7dd9b97fd5b12549721bbdc7977b5671870f4bb</id>
<content type='text'>
Print both input and avg power.

Fixes: 47f1724db4fe ("drm/amd: Introduce `AMDGPU_PP_SENSOR_GPU_INPUT_POWER`")
Reviewed-by: Guchun Chen &lt;guchun.chen@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Print both input and avg power.

Fixes: 47f1724db4fe ("drm/amd: Introduce `AMDGPU_PP_SENSOR_GPU_INPUT_POWER`")
Reviewed-by: Guchun Chen &lt;guchun.chen@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amd/pm: Fix critical temp unit of SMU v13.0.6</title>
<updated>2023-08-31T21:59:32+00:00</updated>
<author>
<name>Asad Kamal</name>
<email>asad.kamal@amd.com</email>
</author>
<published>2023-08-18T10:23:36+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=e1c0d2e7066b5675cb62daa2f7cb3899756f789c'/>
<id>e1c0d2e7066b5675cb62daa2f7cb3899756f789c</id>
<content type='text'>
Critical Temperature needs to be reported in
millidegree Celsius.

Signed-off-by: Asad Kamal &lt;asad.kamal@amd.com&gt;
Reviewed-by: Yang Wang &lt;kevinyang.wang@amd.com&gt;
Reviewed-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Critical Temperature needs to be reported in
millidegree Celsius.

Signed-off-by: Asad Kamal &lt;asad.kamal@amd.com&gt;
Reviewed-by: Yang Wang &lt;kevinyang.wang@amd.com&gt;
Reviewed-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amd/pm: Add critical temp for GC v9.4.3</title>
<updated>2023-08-31T21:53:41+00:00</updated>
<author>
<name>Asad Kamal</name>
<email>asad.kamal@amd.com</email>
</author>
<published>2023-08-12T14:22:10+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=1836bb0a9d09b42ca1e56e90814eb70658aa7c96'/>
<id>1836bb0a9d09b42ca1e56e90814eb70658aa7c96</id>
<content type='text'>
Add critical temperature message support func for smu v13.0.6
and expose critical temperature as part of hw mon attributes
for GC v9.4.3

v2:
Added comment for pmfw version requirement &amp; move the check
to get_thermal_temperature_range function

Signed-off-by: Asad Kamal &lt;asad.kamal@amd.com&gt;
Reviewed-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add critical temperature message support func for smu v13.0.6
and expose critical temperature as part of hw mon attributes
for GC v9.4.3

v2:
Added comment for pmfw version requirement &amp; move the check
to get_thermal_temperature_range function

Signed-off-by: Asad Kamal &lt;asad.kamal@amd.com&gt;
Reviewed-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amd/pm: Update SMUv13.0.6 PMFW headers</title>
<updated>2023-08-31T21:53:32+00:00</updated>
<author>
<name>Asad Kamal</name>
<email>asad.kamal@amd.com</email>
</author>
<published>2023-08-12T13:42:20+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=85609153102ea402e860657e04df4b839b4212ca'/>
<id>85609153102ea402e860657e04df4b839b4212ca</id>
<content type='text'>
Update PMFW interface headers for updated metrics table and
critical temperature message

Signed-off-by: Asad Kamal &lt;asad.kamal@amd.com&gt;
Reviewed-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Update PMFW interface headers for updated metrics table and
critical temperature message

Signed-off-by: Asad Kamal &lt;asad.kamal@amd.com&gt;
Reviewed-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amdgpu/pm: Add notification for no DC support</title>
<updated>2023-08-31T21:52:10+00:00</updated>
<author>
<name>Bokun Zhang</name>
<email>bokun.zhang@amd.com</email>
</author>
<published>2023-08-14T21:06:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=89df3dbeee40216ff23c1556bdfa8e653f296020'/>
<id>89df3dbeee40216ff23c1556bdfa8e653f296020</id>
<content type='text'>
- There is a DPM issue where if DC is not present,
  FCLK will stay at low level.
  We need to send a SMU message to configure the DPM

- Reuse smu_v13_0_notify_display_change() for this purpose

Reviewed-by: Evan Quan &lt;evan.quan@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Bokun Zhang &lt;bokun.zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
- There is a DPM issue where if DC is not present,
  FCLK will stay at low level.
  We need to send a SMU message to configure the DPM

- Reuse smu_v13_0_notify_display_change() for this purpose

Reviewed-by: Evan Quan &lt;evan.quan@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Bokun Zhang &lt;bokun.zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amd/pm: Update pci link speed for smu v13.0.6</title>
<updated>2023-08-16T15:34:37+00:00</updated>
<author>
<name>Asad Kamal</name>
<email>asad.kamal@amd.com</email>
</author>
<published>2023-08-10T14:08:40+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=f1d1abd616ba008ca679af0e793217ec11c55113'/>
<id>f1d1abd616ba008ca679af0e793217ec11c55113</id>
<content type='text'>
Update pcie link speed registers for smu v13.0.6 &amp;
populate gpu metric table with pcie link speed rather than
gen for smu v13_0_0, smu v13_0_6 &amp; smu v13_0_7

v2:
Update ESM register address
Used macro to convert pcie gen to speed

v3:
Chaged macro to inline function for pcie gen to speed

Signed-off-by: Asad Kamal &lt;asad.kamal@amd.com&gt;
Reviewed-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Update pcie link speed registers for smu v13.0.6 &amp;
populate gpu metric table with pcie link speed rather than
gen for smu v13_0_0, smu v13_0_6 &amp; smu v13_0_7

v2:
Update ESM register address
Used macro to convert pcie gen to speed

v3:
Chaged macro to inline function for pcie gen to speed

Signed-off-by: Asad Kamal &lt;asad.kamal@amd.com&gt;
Reviewed-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amd/pm: allow the user to force BACO on smu v13.0.0/7</title>
<updated>2023-08-16T15:34:30+00:00</updated>
<author>
<name>Kenneth Feng</name>
<email>kenneth.feng@amd.com</email>
</author>
<published>2023-08-15T08:55:16+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=e49311c44a6e5066c117715aadd48d06badfd144'/>
<id>e49311c44a6e5066c117715aadd48d06badfd144</id>
<content type='text'>
allow the user to force BACO on smu v13.0.0/7

Signed-off-by: Kenneth Feng &lt;kenneth.feng@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
allow the user to force BACO on smu v13.0.0/7

Signed-off-by: Kenneth Feng &lt;kenneth.feng@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amd/pm: Update pci link width for smu v13.0.6</title>
<updated>2023-08-16T15:34:00+00:00</updated>
<author>
<name>Asad Kamal</name>
<email>asad.kamal@amd.com</email>
</author>
<published>2023-08-10T12:44:54+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=1d02ae4ebd672a1140948e36daa5258b9b620434'/>
<id>1d02ae4ebd672a1140948e36daa5258b9b620434</id>
<content type='text'>
Update addresses of PCIE link width registers,
&amp; link width format used to populate gpu metrics
table for smu v13.0.6

v2:
Removed ESM register update

v3:
Updated patch subject and message

Signed-off-by: Asad Kamal &lt;asad.kamal@amd.com&gt;
Reviewed-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Update addresses of PCIE link width registers,
&amp; link width format used to populate gpu metrics
table for smu v13.0.6

v2:
Removed ESM register update

v3:
Updated patch subject and message

Signed-off-by: Asad Kamal &lt;asad.kamal@amd.com&gt;
Reviewed-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
</feed>
