<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux.git/drivers/gpu/drm/amd/pm, branch v6.3-rc2</title>
<subtitle>Linux kernel source tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/'/>
<entry>
<title>drm/amd/pm: Enable ecc_info table support for smu v13_0_10</title>
<updated>2023-03-07T20:56:12+00:00</updated>
<author>
<name>Candice Li</name>
<email>candice.li@amd.com</email>
</author>
<published>2023-01-16T08:23:21+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=c53899138c99236482a3c25d674f44723336afa3'/>
<id>c53899138c99236482a3c25d674f44723336afa3</id>
<content type='text'>
Support EccInfoTable which includes umc ras error count and
error address.

Signed-off-by: Candice Li &lt;candice.li@amd.com&gt;
Reviewed-by: Evan Quan &lt;evan.quan@amd.com&gt;
Reviewed-by: Stanley.Yang &lt;Stanley.Yang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Support EccInfoTable which includes umc ras error count and
error address.

Signed-off-by: Candice Li &lt;candice.li@amd.com&gt;
Reviewed-by: Evan Quan &lt;evan.quan@amd.com&gt;
Reviewed-by: Stanley.Yang &lt;Stanley.Yang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amd/pm: downgrade log level upon SMU IF version mismatch</title>
<updated>2023-02-23T22:35:59+00:00</updated>
<author>
<name>Guchun Chen</name>
<email>guchun.chen@amd.com</email>
</author>
<published>2023-02-21T04:35:25+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=424b3d7582a2a4a7c45d405225ac70cff97f2e4a'/>
<id>424b3d7582a2a4a7c45d405225ac70cff97f2e4a</id>
<content type='text'>
SMU IF version mismatch as a warning message exists widely
after asic production, however, due to this log level setting,
such mismatch warning will be caught by automation test like
IGT and reported as a fake error after checking. As such mismatch
does not break anything, to reduce confusion, downgrade it from
dev_warn to dev_info.

Signed-off-by: Guchun Chen &lt;guchun.chen@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
SMU IF version mismatch as a warning message exists widely
after asic production, however, due to this log level setting,
such mismatch warning will be caught by automation test like
IGT and reported as a fake error after checking. As such mismatch
does not break anything, to reduce confusion, downgrade it from
dev_warn to dev_info.

Signed-off-by: Guchun Chen &lt;guchun.chen@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amd/pm: no pptable resetup on runpm exiting</title>
<updated>2023-02-23T22:35:59+00:00</updated>
<author>
<name>Evan Quan</name>
<email>evan.quan@amd.com</email>
</author>
<published>2023-02-21T07:21:19+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=6761c4bfee681c306bbe6599951e74826660be47'/>
<id>6761c4bfee681c306bbe6599951e74826660be47</id>
<content type='text'>
It is assumed the pptable used before runpm is same as
the one used afterwards. Thus, we can reuse the stored
copy and do not need to resetup the pptable again.

Signed-off-by: Evan Quan &lt;evan.quan@amd.com&gt;
Reviewed-by: Feifei Xu &lt;feifei.xu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
It is assumed the pptable used before runpm is same as
the one used afterwards. Thus, we can reuse the stored
copy and do not need to resetup the pptable again.

Signed-off-by: Evan Quan &lt;evan.quan@amd.com&gt;
Reviewed-by: Feifei Xu &lt;feifei.xu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amd/pm: correct the baco state setting for ArmD3 scenario</title>
<updated>2023-02-23T22:35:58+00:00</updated>
<author>
<name>Evan Quan</name>
<email>evan.quan@amd.com</email>
</author>
<published>2023-02-21T07:17:43+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=edddc6fd542ffbae680c2201bbf6763f1693db4f'/>
<id>edddc6fd542ffbae680c2201bbf6763f1693db4f</id>
<content type='text'>
The check for baco support relies on the correct baco state.

Signed-off-by: Evan Quan &lt;evan.quan@amd.com&gt;
Reviewed-by: Feifei Xu &lt;feifei.xu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The check for baco support relies on the correct baco state.

Signed-off-by: Evan Quan &lt;evan.quan@amd.com&gt;
Reviewed-by: Feifei Xu &lt;feifei.xu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amd/pm: re-enable ac/dc on smu_v13_0_0/10</title>
<updated>2023-02-23T22:35:58+00:00</updated>
<author>
<name>Kenneth Feng</name>
<email>kenneth.feng@amd.com</email>
</author>
<published>2023-02-15T06:42:08+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=d9e1e14f42337ea11b2dfc0bab99485a8f7fa210'/>
<id>d9e1e14f42337ea11b2dfc0bab99485a8f7fa210</id>
<content type='text'>
re-enable ac/dc on smu_v13_0_0/10

Signed-off-by: Kenneth Feng &lt;kenneth.feng@amd.com&gt;
Reviewed-by: Yang Wang &lt;kevinyang.wang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
re-enable ac/dc on smu_v13_0_0/10

Signed-off-by: Kenneth Feng &lt;kenneth.feng@amd.com&gt;
Reviewed-by: Yang Wang &lt;kevinyang.wang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amd/pm: avoid unaligned access warnings</title>
<updated>2023-02-16T03:25:01+00:00</updated>
<author>
<name>Jonathan Gray</name>
<email>jsg@jsg.id.au</email>
</author>
<published>2023-02-14T06:52:12+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=f989fa298c0f57070dca9816439aa2e72f1bec8d'/>
<id>f989fa298c0f57070dca9816439aa2e72f1bec8d</id>
<content type='text'>
When building on OpenBSD/arm64 with clang 15, unaligned access
warnings are seen when a union is embedded inside a packed struct.

drm/amd/pm/powerplay/hwmgr/vega20_pptable.h:136:17: error: field
  smcPPTable within 'struct _ATOM_VEGA20_POWERPLAYTABLE' is less aligned
  than 'PPTable_t' and is usually due to
  'struct _ATOM_VEGA20_POWERPLAYTABLE' being packed, which can lead to
   unaligned accesses [-Werror,-Wunaligned-access]
      PPTable_t smcPPTable;
                ^

Make PPTable_t packed to avoid this.

Signed-off-by: Jonathan Gray &lt;jsg@jsg.id.au&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
When building on OpenBSD/arm64 with clang 15, unaligned access
warnings are seen when a union is embedded inside a packed struct.

drm/amd/pm/powerplay/hwmgr/vega20_pptable.h:136:17: error: field
  smcPPTable within 'struct _ATOM_VEGA20_POWERPLAYTABLE' is less aligned
  than 'PPTable_t' and is usually due to
  'struct _ATOM_VEGA20_POWERPLAYTABLE' being packed, which can lead to
   unaligned accesses [-Werror,-Wunaligned-access]
      PPTable_t smcPPTable;
                ^

Make PPTable_t packed to avoid this.

Signed-off-by: Jonathan Gray &lt;jsg@jsg.id.au&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amd/pm: Allocate dummy table only if needed</title>
<updated>2023-02-16T03:24:08+00:00</updated>
<author>
<name>Lijo Lazar</name>
<email>lijo.lazar@amd.com</email>
</author>
<published>2023-01-19T13:13:28+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=18c4e319db02c68237021ea7d3040ef3b21f09b9'/>
<id>18c4e319db02c68237021ea7d3040ef3b21f09b9</id>
<content type='text'>
Only Navi1x requires dummy read workaround. Allocate the table in VRAM
only for Navi1x.

Signed-off-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Only Navi1x requires dummy read workaround. Allocate the table in VRAM
only for Navi1x.

Signed-off-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amd/amdgpu: implement mode2 reset on smu_v13_0_10</title>
<updated>2023-02-14T20:47:15+00:00</updated>
<author>
<name>Kenneth Feng</name>
<email>kenneth.feng@amd.com</email>
</author>
<published>2023-02-10T05:04:17+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=230dd6bb61173acccdfbf855ba907286e850cd67'/>
<id>230dd6bb61173acccdfbf855ba907286e850cd67</id>
<content type='text'>
implement mode2 reset on smu_v13_0_10

Signed-off-by: Kenneth Feng &lt;kenneth.feng@amd.com&gt;
Reviewed-by: Evan Quan &lt;evan.quan@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
implement mode2 reset on smu_v13_0_10

Signed-off-by: Kenneth Feng &lt;kenneth.feng@amd.com&gt;
Reviewed-by: Evan Quan &lt;evan.quan@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amdgpu/smu: skip pptable init under sriov</title>
<updated>2023-02-09T03:04:12+00:00</updated>
<author>
<name>Jane Jian</name>
<email>Jane.Jian@amd.com</email>
</author>
<published>2023-01-13T10:53:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=8e08e2d5d7c66e4267d84d9f6bc6c4eabd820ae3'/>
<id>8e08e2d5d7c66e4267d84d9f6bc6c4eabd820ae3</id>
<content type='text'>
sriov does not need to init pptable from amdgpu driver
we finish it from PF

Signed-off-by: Jane Jian &lt;Jane.Jian@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
sriov does not need to init pptable from amdgpu driver
we finish it from PF

Signed-off-by: Jane Jian &lt;Jane.Jian@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amd/pm/smu7: move variables to where they are used</title>
<updated>2023-02-09T03:02:38+00:00</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2023-02-06T16:47:47+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=63a9ab264a8c030482ab9e7e20b6c4c162299531'/>
<id>63a9ab264a8c030482ab9e7e20b6c4c162299531</id>
<content type='text'>
Move variable declarations to where they are used.  Fixes
a segfault on smu7 V0 structures where some tables don't
exist.

Cc: Evan Quan &lt;evan.quan@amd.com&gt;
Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/2388
Fixes: b1a9557a7d00 ("drm/amd/pm: fulfill powerplay peak profiling mode shader/memory clock settings")
Reviewed-by: Evan Quan &lt;evan.quan@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Move variable declarations to where they are used.  Fixes
a segfault on smu7 V0 structures where some tables don't
exist.

Cc: Evan Quan &lt;evan.quan@amd.com&gt;
Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/2388
Fixes: b1a9557a7d00 ("drm/amd/pm: fulfill powerplay peak profiling mode shader/memory clock settings")
Reviewed-by: Evan Quan &lt;evan.quan@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
</feed>
