<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux.git/drivers/gpu/drm/amd/pm/amdgpu_pm.c, branch v5.17</title>
<subtitle>Linux kernel source tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/'/>
<entry>
<title>drm/amd/pm: fix hwmon node of power1_label create issue</title>
<updated>2022-02-09T20:14:31+00:00</updated>
<author>
<name>Yang Wang</name>
<email>KevinYang.Wang@amd.com</email>
</author>
<published>2022-02-08T06:23:55+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=a8b1e8636a3252daa729762b2e3cc9015cc91a5c'/>
<id>a8b1e8636a3252daa729762b2e3cc9015cc91a5c</id>
<content type='text'>
it will cause hwmon node of power1_label is not created.

v2:
the hwmon node of "power1_label" is always needed for all ASICs.
and the patch will remove ASIC type check for "power1_label".

Fixes: ae07970a0621d6 ("drm/amd/pm: add support for hwmon control of slow and fast PPT limit on vangogh")

Signed-off-by: Yang Wang &lt;KevinYang.Wang@amd.com&gt;
Reviewed-by: Kenneth Feng &lt;kenneth.feng@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
it will cause hwmon node of power1_label is not created.

v2:
the hwmon node of "power1_label" is always needed for all ASICs.
and the patch will remove ASIC type check for "power1_label".

Fixes: ae07970a0621d6 ("drm/amd/pm: add support for hwmon control of slow and fast PPT limit on vangogh")

Signed-off-by: Yang Wang &lt;KevinYang.Wang@amd.com&gt;
Reviewed-by: Kenneth Feng &lt;kenneth.feng@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>amdgpu/pm: Make sysfs pm attributes as read-only for VFs</title>
<updated>2021-12-30T13:54:45+00:00</updated>
<author>
<name>Marina Nikolic</name>
<email>Marina.Nikolic@amd.com</email>
</author>
<published>2021-12-14T12:57:53+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=11c9cc95f818f0f187e9b579a7f136f532b42445'/>
<id>11c9cc95f818f0f187e9b579a7f136f532b42445</id>
<content type='text'>
== Description ==
Setting values of pm attributes through sysfs
should not be allowed in SRIOV mode.
These calls will not be processed by FW anyway,
but error handling on sysfs level should be improved.

== Changes ==
This patch prohibits performing of all set commands
in SRIOV mode on sysfs level.
It offers better error handling as calls that are
not allowed will not be propagated further.

== Test ==
Writing to any sysfs file in passthrough mode will succeed.
Writing to any sysfs file in ONEVF mode will yield error:
"calling process does not have sufficient permission to execute a command".

Signed-off-by: Marina Nikolic &lt;Marina.Nikolic@amd.com&gt;
Acked-by: Evan Quan &lt;evan.quan@amd.com&gt;
Reviewed-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
== Description ==
Setting values of pm attributes through sysfs
should not be allowed in SRIOV mode.
These calls will not be processed by FW anyway,
but error handling on sysfs level should be improved.

== Changes ==
This patch prohibits performing of all set commands
in SRIOV mode on sysfs level.
It offers better error handling as calls that are
not allowed will not be propagated further.

== Test ==
Writing to any sysfs file in passthrough mode will succeed.
Writing to any sysfs file in ONEVF mode will yield error:
"calling process does not have sufficient permission to execute a command".

Signed-off-by: Marina Nikolic &lt;Marina.Nikolic@amd.com&gt;
Acked-by: Evan Quan &lt;evan.quan@amd.com&gt;
Reviewed-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amdgpu: Enable unique_id for Aldebaran</title>
<updated>2021-12-30T13:54:43+00:00</updated>
<author>
<name>Kent Russell</name>
<email>kent.russell@amd.com</email>
</author>
<published>2021-12-13T18:15:20+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=4ad31fa15ba472866d538b3cee05708a9d8e8197'/>
<id>4ad31fa15ba472866d538b3cee05708a9d8e8197</id>
<content type='text'>
It's supported, so support the unique_id sysfs file

Signed-off-by: Kent Russell &lt;kent.russell@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
It's supported, so support the unique_id sysfs file

Signed-off-by: Kent Russell &lt;kent.russell@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>amdgpu/pm: Create shared array of power profile name strings</title>
<updated>2021-12-01T21:03:42+00:00</updated>
<author>
<name>Darren Powell</name>
<email>darren.powell@amd.com</email>
</author>
<published>2021-11-23T05:26:03+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=3867e3704f136beadf5e004b61696ef7f990bee4'/>
<id>3867e3704f136beadf5e004b61696ef7f990bee4</id>
<content type='text'>
 == Description ==
 All the power profile modes use the same strings (or a subset of)
 Creating a public array of the strings will allow sharing rather than
 duplicating for each chip
 First patch only implements change for navi10, followup with other chips

 == Changes ==
 Create a declaration of the public array in kgd_pp_interface.h
 Define the public array in amdgpu_pm.c
 Modify the implementaiton of navi10_get_power_profile_mode to use new array

 == Test ==
 LOGFILE=pp_profile_strings.test.log
 AMDGPU_PCI_ADDR=`lspci -nn | grep "VGA\|Display" | cut -d " " -f 1`
 AMDGPU_HWMON=`ls -la /sys/class/hwmon | grep $AMDGPU_PCI_ADDR | awk '{print $9}'`
 HWMON_DIR=/sys/class/hwmon/${AMDGPU_HWMON}

 lspci -nn | grep "VGA\|Display"  &gt; $LOGFILE
 FILES="pp_power_profile_mode "

 for f in $FILES
 do
   echo === $f === &gt;&gt; $LOGFILE
   cat $HWMON_DIR/device/$f &gt;&gt; $LOGFILE
 done
 cat $LOGFILE

Signed-off-by: Darren Powell &lt;darren.powell@amd.com&gt;
Reviewed-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
 == Description ==
 All the power profile modes use the same strings (or a subset of)
 Creating a public array of the strings will allow sharing rather than
 duplicating for each chip
 First patch only implements change for navi10, followup with other chips

 == Changes ==
 Create a declaration of the public array in kgd_pp_interface.h
 Define the public array in amdgpu_pm.c
 Modify the implementaiton of navi10_get_power_profile_mode to use new array

 == Test ==
 LOGFILE=pp_profile_strings.test.log
 AMDGPU_PCI_ADDR=`lspci -nn | grep "VGA\|Display" | cut -d " " -f 1`
 AMDGPU_HWMON=`ls -la /sys/class/hwmon | grep $AMDGPU_PCI_ADDR | awk '{print $9}'`
 HWMON_DIR=/sys/class/hwmon/${AMDGPU_HWMON}

 lspci -nn | grep "VGA\|Display"  &gt; $LOGFILE
 FILES="pp_power_profile_mode "

 for f in $FILES
 do
   echo === $f === &gt;&gt; $LOGFILE
   cat $HWMON_DIR/device/$f &gt;&gt; $LOGFILE
 done
 cat $LOGFILE

Signed-off-by: Darren Powell &lt;darren.powell@amd.com&gt;
Reviewed-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amd/pm: Add debugfs info for STB</title>
<updated>2021-11-22T19:58:59+00:00</updated>
<author>
<name>Andrey Grodzovsky</name>
<email>andrey.grodzovsky@amd.com</email>
</author>
<published>2021-09-24T18:24:37+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=1f5fc7a50955e20c019ddc73575d8a663301d999'/>
<id>1f5fc7a50955e20c019ddc73575d8a663301d999</id>
<content type='text'>
Add debugfs hook.

Signed-off-by: Andrey Grodzovsky &lt;andrey.grodzovsky@amd.com&gt;
Reviewed-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Reviewed-by: Luben Tuikov &lt;luben.tuikov@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add debugfs hook.

Signed-off-by: Andrey Grodzovsky &lt;andrey.grodzovsky@amd.com&gt;
Reviewed-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Reviewed-by: Luben Tuikov &lt;luben.tuikov@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amdgpu/pm: Don't show pp_power_profile_mode for unsupported devices</title>
<updated>2021-11-03T16:22:07+00:00</updated>
<author>
<name>Mario Limonciello</name>
<email>mario.limonciello@amd.com</email>
</author>
<published>2021-10-29T21:09:26+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=a750559132c64f3fa40418876bc43881e169a8f0'/>
<id>a750559132c64f3fa40418876bc43881e169a8f0</id>
<content type='text'>
For ASICs not supporting power profile mode, don't show the attribute.
Verify that the function has been implemented by the subsystem.

Suggested-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
Reviewed-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
For ASICs not supporting power profile mode, don't show the attribute.
Verify that the function has been implemented by the subsystem.

Suggested-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
Reviewed-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amdgpu/pm: look up current_level for asics without pm callback</title>
<updated>2021-10-28T18:26:13+00:00</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2021-10-25T19:02:33+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=9fac5799c8985aa0263dbed7f16f99f85c4d6cd7'/>
<id>9fac5799c8985aa0263dbed7f16f99f85c4d6cd7</id>
<content type='text'>
For asics without a callback, use the current level rather than 0xff.
This can avoid an unnecesary forced level set on older asics when
set by the user.

Reviewed-by: Kevin Wang &lt;kevinyang.wang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
For asics without a callback, use the current level rather than 0xff.
This can avoid an unnecesary forced level set on older asics when
set by the user.

Reviewed-by: Kevin Wang &lt;kevinyang.wang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amd/pm: Enable GPU metrics for One VF mode</title>
<updated>2021-10-22T03:37:52+00:00</updated>
<author>
<name>Vignesh Chander</name>
<email>Vignesh.Chander@amd.com</email>
</author>
<published>2021-10-13T02:07:17+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=ac82902df9cf448a9400ec5bb1416100b157a6c4'/>
<id>ac82902df9cf448a9400ec5bb1416100b157a6c4</id>
<content type='text'>
Enable GPU metrics feature in one VF mode.
These are only possible in one VF mode because the VF is dedicated in that case.

Signed-off-by: Vignesh Chander &lt;Vignesh.Chander@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Enable GPU metrics feature in one VF mode.
These are only possible in one VF mode because the VF is dedicated in that case.

Signed-off-by: Vignesh Chander &lt;Vignesh.Chander@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amd/amdgpu: Enable some sysnodes for guest smi</title>
<updated>2021-09-14T19:36:06+00:00</updated>
<author>
<name>Roy Sun</name>
<email>Roy.Sun@amd.com</email>
</author>
<published>2021-09-06T12:47:49+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=8a4d393ef4977dd5b937f09753d603de9e29b9bf'/>
<id>8a4d393ef4977dd5b937f09753d603de9e29b9bf</id>
<content type='text'>
Enable sysnode vclk and dclk on Navi21 asic for guest smi

Signed-off-by: Roy Sun &lt;Roy.Sun@amd.com&gt;
Reviewed-by: Emily.Deng &lt;Emily.Deng@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Enable sysnode vclk and dclk on Navi21 asic for guest smi

Signed-off-by: Roy Sun &lt;Roy.Sun@amd.com&gt;
Reviewed-by: Emily.Deng &lt;Emily.Deng@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amdgpu: enable more pm sysfs under SRIOV 1-VF mode</title>
<updated>2021-08-31T18:20:41+00:00</updated>
<author>
<name>Jiawei Gu</name>
<email>Jiawei.Gu@amd.com</email>
</author>
<published>2021-08-04T07:19:16+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=7884d0e9e30e0ba41a2d0d36de3d605fc314b532'/>
<id>7884d0e9e30e0ba41a2d0d36de3d605fc314b532</id>
<content type='text'>
Enable pp_num_states, pp_cur_state, pp_force_state, pp_table sysfs under
SRIOV 1-VF scenario.

Signed-off-by: Jiawei Gu &lt;Jiawei.Gu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Enable pp_num_states, pp_cur_state, pp_force_state, pp_table sysfs under
SRIOV 1-VF scenario.

Signed-off-by: Jiawei Gu &lt;Jiawei.Gu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
</feed>
