linux.git/drivers/gpu/drm/amd/include/soc_v1_0_enum.h, branch master Linux kernel source tree drm/amdgpu: Fix SHMEM alignment mode for GFX 12.1.0 2025-12-08T19:25:34+00:00 Mukul Joshi mukul.joshi@amd.com 2025-03-27T21:17:06+00:00 e3b8d8cc8c60db6c2be1251664da68b3e021a672 Alignment mode in SHMEM config register is only a single bit value on GFX 12.1.0 instead of 2 bits in previous asics. Add a new enum and use the correct value of SHMEM alignment mode when programming the SHMEM config register. Signed-off-by: Mukul Joshi <mukul.joshi@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
Alignment mode in SHMEM config register is only a single bit
value on GFX 12.1.0 instead of 2 bits in previous asics.
Add a new enum and use the correct value of SHMEM alignment mode
when programming the SHMEM config register.

Signed-off-by: Mukul Joshi <mukul.joshi@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: Add soc v1_0 enum header 2025-12-08T18:56:30+00:00 Hawking Zhang Hawking.Zhang@amd.com 2025-02-24T02:12:00+00:00 bc5094e27e10259df655c45629c5e234957bbfb6 Add soc v1_0 enum header Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Le Ma <le.ma@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
Add soc v1_0 enum header

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Le Ma <le.ma@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>